mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c

Dependents:   Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay

Fork of mbed-dev by mbed official

Committer:
maxxir
Date:
Tue Nov 07 16:46:29 2017 +0000
Revision:
177:619788de047e
Parent:
167:e84263d55307
To fix broken RTC on Nucleo_F103RB / STM32F103 BluePill etc..;  Used direct RTC register manipulation for STM32F1xx;  rtc_read() && rtc_write()  (native rtc_init() - works good);  also added stub for non-working on STM32F1xx rtc_read_subseconds().

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 160:d5399cc887bb 1 /* mbed Microcontroller Library
<> 160:d5399cc887bb 2 *******************************************************************************
<> 160:d5399cc887bb 3 * Copyright (c) 2017, STMicroelectronics
<> 160:d5399cc887bb 4 * All rights reserved.
<> 160:d5399cc887bb 5 *
<> 160:d5399cc887bb 6 * Redistribution and use in source and binary forms, with or without
<> 160:d5399cc887bb 7 * modification, are permitted provided that the following conditions are met:
<> 160:d5399cc887bb 8 *
<> 160:d5399cc887bb 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 160:d5399cc887bb 10 * this list of conditions and the following disclaimer.
<> 160:d5399cc887bb 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 160:d5399cc887bb 12 * this list of conditions and the following disclaimer in the documentation
<> 160:d5399cc887bb 13 * and/or other materials provided with the distribution.
<> 160:d5399cc887bb 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 160:d5399cc887bb 15 * may be used to endorse or promote products derived from this software
<> 160:d5399cc887bb 16 * without specific prior written permission.
<> 160:d5399cc887bb 17 *
<> 160:d5399cc887bb 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 160:d5399cc887bb 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 160:d5399cc887bb 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 160:d5399cc887bb 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 160:d5399cc887bb 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 160:d5399cc887bb 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 160:d5399cc887bb 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 160:d5399cc887bb 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 160:d5399cc887bb 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 160:d5399cc887bb 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 160:d5399cc887bb 28 *******************************************************************************
<> 160:d5399cc887bb 29 */
<> 160:d5399cc887bb 30 #include "mbed_assert.h"
<> 160:d5399cc887bb 31 #include "pinmap.h"
<> 160:d5399cc887bb 32 #include "PortNames.h"
<> 160:d5399cc887bb 33 #include "mbed_error.h"
<> 160:d5399cc887bb 34 #include "pin_device.h"
<> 160:d5399cc887bb 35
<> 160:d5399cc887bb 36 extern GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx);
<> 160:d5399cc887bb 37
<> 160:d5399cc887bb 38 const uint32_t ll_pin_defines[16] = {
<> 160:d5399cc887bb 39 LL_GPIO_PIN_0,
<> 160:d5399cc887bb 40 LL_GPIO_PIN_1,
<> 160:d5399cc887bb 41 LL_GPIO_PIN_2,
<> 160:d5399cc887bb 42 LL_GPIO_PIN_3,
<> 160:d5399cc887bb 43 LL_GPIO_PIN_4,
<> 160:d5399cc887bb 44 LL_GPIO_PIN_5,
<> 160:d5399cc887bb 45 LL_GPIO_PIN_6,
<> 160:d5399cc887bb 46 LL_GPIO_PIN_7,
<> 160:d5399cc887bb 47 LL_GPIO_PIN_8,
<> 160:d5399cc887bb 48 LL_GPIO_PIN_9,
<> 160:d5399cc887bb 49 LL_GPIO_PIN_10,
<> 160:d5399cc887bb 50 LL_GPIO_PIN_11,
<> 160:d5399cc887bb 51 LL_GPIO_PIN_12,
<> 160:d5399cc887bb 52 LL_GPIO_PIN_13,
<> 160:d5399cc887bb 53 LL_GPIO_PIN_14,
<> 160:d5399cc887bb 54 LL_GPIO_PIN_15
<> 160:d5399cc887bb 55 };
<> 160:d5399cc887bb 56
<> 160:d5399cc887bb 57 /**
<> 160:d5399cc887bb 58 * Configure pin (mode, speed, output type and pull-up/pull-down)
<> 160:d5399cc887bb 59 */
<> 160:d5399cc887bb 60 void pin_function(PinName pin, int data)
<> 160:d5399cc887bb 61 {
<> 160:d5399cc887bb 62 MBED_ASSERT(pin != (PinName)NC);
<> 160:d5399cc887bb 63
<> 160:d5399cc887bb 64 // Get the pin informations
<> 160:d5399cc887bb 65 uint32_t mode = STM_PIN_FUNCTION(data);
<> 160:d5399cc887bb 66 uint32_t afnum = STM_PIN_AFNUM(data);
<> 160:d5399cc887bb 67 uint32_t port = STM_PORT(pin);
<> 160:d5399cc887bb 68 uint32_t ll_pin = ll_pin_defines[STM_PIN(pin)];
<> 160:d5399cc887bb 69 uint32_t ll_mode = 0;
<> 160:d5399cc887bb 70
<> 160:d5399cc887bb 71 // Enable GPIO clock
<> 160:d5399cc887bb 72 GPIO_TypeDef *gpio = Set_GPIO_Clock(port);
<> 160:d5399cc887bb 73
<> 160:d5399cc887bb 74 /* Set default speed to high.
<> 160:d5399cc887bb 75 * For most families there are dedicated registers so it is
<> 160:d5399cc887bb 76 * not so important, register can be set at any time.
AnnaBridge 167:e84263d55307 77 * But for families like F1, speed only applies to output.
<> 160:d5399cc887bb 78 */
AnnaBridge 167:e84263d55307 79 #if defined (TARGET_STM32F1)
AnnaBridge 167:e84263d55307 80 if (mode == STM_PIN_OUTPUT) {
AnnaBridge 167:e84263d55307 81 #endif
<> 160:d5399cc887bb 82 LL_GPIO_SetPinSpeed(gpio, ll_pin, LL_GPIO_SPEED_FREQ_HIGH);
AnnaBridge 167:e84263d55307 83 #if defined (TARGET_STM32F1)
AnnaBridge 167:e84263d55307 84 }
AnnaBridge 167:e84263d55307 85 #endif
<> 160:d5399cc887bb 86
<> 160:d5399cc887bb 87 switch (mode) {
<> 160:d5399cc887bb 88 case STM_PIN_INPUT:
<> 160:d5399cc887bb 89 ll_mode = LL_GPIO_MODE_INPUT;
<> 160:d5399cc887bb 90 break;
<> 160:d5399cc887bb 91 case STM_PIN_OUTPUT:
<> 160:d5399cc887bb 92 ll_mode = LL_GPIO_MODE_OUTPUT;
<> 160:d5399cc887bb 93 break;
<> 160:d5399cc887bb 94 case STM_PIN_ALTERNATE:
<> 160:d5399cc887bb 95 ll_mode = LL_GPIO_MODE_ALTERNATE;
<> 160:d5399cc887bb 96 // In case of ALT function, also set he afnum
<> 160:d5399cc887bb 97 stm_pin_SetAFPin(gpio, pin, afnum);
<> 160:d5399cc887bb 98 break;
<> 160:d5399cc887bb 99 case STM_PIN_ANALOG:
<> 160:d5399cc887bb 100 ll_mode = LL_GPIO_MODE_ANALOG;
<> 160:d5399cc887bb 101 break;
<> 160:d5399cc887bb 102 default:
<> 160:d5399cc887bb 103 MBED_ASSERT(0);
<> 160:d5399cc887bb 104 break;
<> 160:d5399cc887bb 105 }
<> 160:d5399cc887bb 106 LL_GPIO_SetPinMode(gpio, ll_pin, ll_mode);
<> 160:d5399cc887bb 107
<> 160:d5399cc887bb 108 #if defined(GPIO_ASCR_ASC0)
<> 160:d5399cc887bb 109 /* For families where Analog Control ASC0 register is present */
<> 160:d5399cc887bb 110 if (STM_PIN_ANALOG_CONTROL(data)) {
<> 160:d5399cc887bb 111 LL_GPIO_EnablePinAnalogControl(gpio, ll_pin);
<> 160:d5399cc887bb 112 } else {
<> 160:d5399cc887bb 113 LL_GPIO_DisablePinAnalogControl(gpio, ll_pin);
<> 160:d5399cc887bb 114 }
<> 160:d5399cc887bb 115 #endif
<> 160:d5399cc887bb 116
<> 160:d5399cc887bb 117 /* For now by default use Speed HIGH for output or alt modes */
<> 160:d5399cc887bb 118 if ((mode == STM_PIN_OUTPUT) ||(mode == STM_PIN_ALTERNATE)) {
<> 160:d5399cc887bb 119 if (STM_PIN_OD(data)) {
<> 160:d5399cc887bb 120 LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_OPENDRAIN);
<> 160:d5399cc887bb 121 } else {
<> 160:d5399cc887bb 122 LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_PUSHPULL);
<> 160:d5399cc887bb 123 }
<> 160:d5399cc887bb 124 }
<> 160:d5399cc887bb 125
<> 160:d5399cc887bb 126 stm_pin_PullConfig(gpio, ll_pin, STM_PIN_PUPD(data));
<> 160:d5399cc887bb 127
<> 160:d5399cc887bb 128 stm_pin_DisconnectDebug(pin);
<> 160:d5399cc887bb 129 }
<> 160:d5399cc887bb 130
<> 160:d5399cc887bb 131 /**
<> 160:d5399cc887bb 132 * Configure pin pull-up/pull-down
<> 160:d5399cc887bb 133 */
<> 160:d5399cc887bb 134 void pin_mode(PinName pin, PinMode mode)
<> 160:d5399cc887bb 135 {
<> 160:d5399cc887bb 136 MBED_ASSERT(pin != (PinName)NC);
<> 160:d5399cc887bb 137
<> 160:d5399cc887bb 138 uint32_t port_index = STM_PORT(pin);
<> 160:d5399cc887bb 139 uint32_t ll_pin = ll_pin_defines[STM_PIN(pin)];
<> 160:d5399cc887bb 140 // Enable GPIO clock
<> 160:d5399cc887bb 141 GPIO_TypeDef *gpio = Set_GPIO_Clock(port_index);
<> 160:d5399cc887bb 142 uint32_t function = LL_GPIO_GetPinMode(gpio, ll_pin);
<> 160:d5399cc887bb 143
<> 160:d5399cc887bb 144 if ((function == LL_GPIO_MODE_OUTPUT) || (function == LL_GPIO_MODE_ALTERNATE))
<> 160:d5399cc887bb 145 {
<> 160:d5399cc887bb 146 if ((mode == OpenDrainNoPull) || (mode == OpenDrainPullUp) || (mode == OpenDrainPullDown)) {
<> 160:d5399cc887bb 147 LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_OPENDRAIN);
<> 160:d5399cc887bb 148 } else {
<> 160:d5399cc887bb 149 LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_PUSHPULL);
<> 160:d5399cc887bb 150 }
<> 160:d5399cc887bb 151 }
<> 160:d5399cc887bb 152
<> 160:d5399cc887bb 153 if ((mode == OpenDrainPullUp) || (mode == PullUp)) {
<> 160:d5399cc887bb 154 stm_pin_PullConfig(gpio, ll_pin, GPIO_PULLUP);
<> 160:d5399cc887bb 155 } else if ((mode == OpenDrainPullDown) || (mode == PullDown)) {
<> 160:d5399cc887bb 156 stm_pin_PullConfig(gpio, ll_pin, GPIO_PULLDOWN);
<> 160:d5399cc887bb 157 } else {
<> 160:d5399cc887bb 158 stm_pin_PullConfig(gpio, ll_pin, GPIO_NOPULL);
<> 160:d5399cc887bb 159 }
<> 160:d5399cc887bb 160 }