Maxim Ibragimov / mbed-dev

mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c

Dependents:   Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay

Fork of mbed-dev by mbed official

targets/TARGET_Maxim/TARGET_MAX32630/mxc/wdt2.h@177:619788de047e, 2017-11-07 (annotated)

Committer:
maxxir
Date:
Tue Nov 07 16:46:29 2017 +0000
Revision:
177:619788de047e
Parent:
157:ff67d9f36b67 
To fix broken RTC on Nucleo_F103RB / STM32F103 BluePill etc..;  Used direct RTC register manipulation for STM32F1xx;  rtc_read() && rtc_write()  (native rtc_init() - works good);  also added stub for non-working on STM32F1xx rtc_read_subseconds().

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 157:ff67d9f36b67 1 /**
<> 157:ff67d9f36b67 2 * @file
<> 157:ff67d9f36b67 3 * @brief WDT2 peripheral module API.
<> 157:ff67d9f36b67 4 */
<> 157:ff67d9f36b67 5 /* ****************************************************************************
<> 157:ff67d9f36b67 6 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 157:ff67d9f36b67 7 *
<> 157:ff67d9f36b67 8 * Permission is hereby granted, free of charge, to any person obtaining a
<> 157:ff67d9f36b67 9 * copy of this software and associated documentation files (the "Software"),
<> 157:ff67d9f36b67 10 * to deal in the Software without restriction, including without limitation
<> 157:ff67d9f36b67 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 157:ff67d9f36b67 12 * and/or sell copies of the Software, and to permit persons to whom the
<> 157:ff67d9f36b67 13 * Software is furnished to do so, subject to the following conditions:
<> 157:ff67d9f36b67 14 *
<> 157:ff67d9f36b67 15 * The above copyright notice and this permission notice shall be included
<> 157:ff67d9f36b67 16 * in all copies or substantial portions of the Software.
<> 157:ff67d9f36b67 17 *
<> 157:ff67d9f36b67 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 157:ff67d9f36b67 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 157:ff67d9f36b67 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 157:ff67d9f36b67 21 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 157:ff67d9f36b67 22 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 157:ff67d9f36b67 23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 157:ff67d9f36b67 24 * OTHER DEALINGS IN THE SOFTWARE.
<> 157:ff67d9f36b67 25 *
<> 157:ff67d9f36b67 26 * Except as contained in this notice, the name of Maxim Integrated
<> 157:ff67d9f36b67 27 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 157:ff67d9f36b67 28 * Products, Inc. Branding Policy.
<> 157:ff67d9f36b67 29 *
<> 157:ff67d9f36b67 30 * The mere transfer of this software does not imply any licenses
<> 157:ff67d9f36b67 31 * of trade secrets, proprietary technology, copyrights, patents,
<> 157:ff67d9f36b67 32 * trademarks, maskwork rights, or any other form of intellectual
<> 157:ff67d9f36b67 33 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 157:ff67d9f36b67 34 * ownership rights.
<> 157:ff67d9f36b67 35 *
<> 157:ff67d9f36b67 36 * $Date: 2016-10-10 19:54:34 -0500 (Mon, 10 Oct 2016) $
<> 157:ff67d9f36b67 37 * $Revision: 24678 $
<> 157:ff67d9f36b67 38 *
<> 157:ff67d9f36b67 39 **************************************************************************** */
<> 157:ff67d9f36b67 40
<> 157:ff67d9f36b67 41 /* Define to prevent redundant inclusion */
<> 157:ff67d9f36b67 42 #ifndef _WDT2_H
<> 157:ff67d9f36b67 43 #define _WDT2_H
<> 157:ff67d9f36b67 44
<> 157:ff67d9f36b67 45 /* **** Includes **** */
<> 157:ff67d9f36b67 46 #include "mxc_config.h"
<> 157:ff67d9f36b67 47 #include "wdt2_regs.h"
<> 157:ff67d9f36b67 48 #include "mxc_assert.h"
<> 157:ff67d9f36b67 49
<> 157:ff67d9f36b67 50 #ifdef __cplusplus
<> 157:ff67d9f36b67 51 extern "C" {
<> 157:ff67d9f36b67 52 #endif
<> 157:ff67d9f36b67 53
<> 157:ff67d9f36b67 54 /**
<> 157:ff67d9f36b67 55 * @ingroup wdttimers
<> 157:ff67d9f36b67 56 * @defgroup wdt2 Watch Dog Timer 2
<> 157:ff67d9f36b67 57 * @brief WDT2 configuration and control API.
<> 157:ff67d9f36b67 58 * @{
<> 157:ff67d9f36b67 59 */
<> 157:ff67d9f36b67 60
<> 157:ff67d9f36b67 61 /**
<> 157:ff67d9f36b67 62 * @def Definition to clear all WDT2 flags
<> 157:ff67d9f36b67 63 */
<> 157:ff67d9f36b67 64 #define WDT2_FLAGS_CLEAR_ALL (MXC_F_WDT2_FLAGS_TIMEOUT | MXC_F_WDT2_FLAGS_RESET_OUT)
<> 157:ff67d9f36b67 65 /**
<> 157:ff67d9f36b67 66 * Enumeration type to select the Watchdog Timer's Period
<> 157:ff67d9f36b67 67 */
<> 157:ff67d9f36b67 68 typedef enum {
<> 157:ff67d9f36b67 69 WDT2_PERIOD_2_25_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_25_NANO_CLKS, /**< \f$ 2^{25}\f$ Nano Ring clocks. */
<> 157:ff67d9f36b67 70 WDT2_PERIOD_2_24_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_24_NANO_CLKS, /**< \f$ 2^{24}\f$ Nano Ring clocks. */
<> 157:ff67d9f36b67 71 WDT2_PERIOD_2_23_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_23_NANO_CLKS, /**< \f$ 2^{23}\f$ Nano Ring clocks. */
<> 157:ff67d9f36b67 72 WDT2_PERIOD_2_22_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_22_NANO_CLKS, /**< \f$ 2^{22}\f$ Nano Ring clocks. */
<> 157:ff67d9f36b67 73 WDT2_PERIOD_2_21_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_21_NANO_CLKS, /**< \f$ 2^{21}\f$ Nano Ring clocks. */
<> 157:ff67d9f36b67 74 WDT2_PERIOD_2_20_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_20_NANO_CLKS, /**< \f$ 2^{20}\f$ Nano Ring clocks. */
<> 157:ff67d9f36b67 75 WDT2_PERIOD_2_19_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_19_NANO_CLKS, /**< \f$ 2^{19}\f$ Nano Ring clocks. */
<> 157:ff67d9f36b67 76 WDT2_PERIOD_2_18_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_18_NANO_CLKS, /**< \f$ 2^{18}\f$ Nano Ring clocks. */
<> 157:ff67d9f36b67 77 WDT2_PERIOD_2_17_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_17_NANO_CLKS, /**< \f$ 2^{17}\f$ Nano Ring clocks. */
<> 157:ff67d9f36b67 78 WDT2_PERIOD_2_16_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_16_NANO_CLKS, /**< \f$ 2^{16}\f$ Nano Ring clocks. */
<> 157:ff67d9f36b67 79 WDT2_PERIOD_2_15_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_15_NANO_CLKS, /**< \f$ 2^{15}\f$ Nano Ring clocks. */
<> 157:ff67d9f36b67 80 WDT2_PERIOD_2_14_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_14_NANO_CLKS, /**< \f$ 2^{14}\f$ Nano Ring clocks. */
<> 157:ff67d9f36b67 81 WDT2_PERIOD_2_13_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_13_NANO_CLKS, /**< \f$ 2^{13}\f$ Nano Ring clocks. */
<> 157:ff67d9f36b67 82 WDT2_PERIOD_2_12_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_12_NANO_CLKS, /**< \f$ 2^{12}\f$ Nano Ring clocks. */
<> 157:ff67d9f36b67 83 WDT2_PERIOD_2_11_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_11_NANO_CLKS, /**< \f$ 2^{11}\f$ Nano Ring clocks. */
<> 157:ff67d9f36b67 84 WDT2_PERIOD_2_10_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_10_NANO_CLKS, /**< \f$ 2^{10}\f$ Nano Ring clocks. */
<> 157:ff67d9f36b67 85 WDT2_PERIOD_MAX /**< Maximum Period is Max - 1 */
<> 157:ff67d9f36b67 86 } wdt2_period_t;
<> 157:ff67d9f36b67 87
<> 157:ff67d9f36b67 88
<> 157:ff67d9f36b67 89 /**
<> 157:ff67d9f36b67 90 * @brief Initializes the NanoRing for the watchdog clock and sets watchdog
<> 157:ff67d9f36b67 91 * in a known disabled state
<> 157:ff67d9f36b67 92 * @param runInSleep If non-zero, the WDT2 operates in Sleep Modes for
<> 157:ff67d9f36b67 93 * the device, 0 disables the WDT2 during Sleep Modes.
<> 157:ff67d9f36b67 94 * @param unlock_key The WDT2 unlock key value, use
<> 157:ff67d9f36b67 95 * #MXC_V_WDT2_UNLOCK_KEY
<> 157:ff67d9f36b67 96 *
<> 157:ff67d9f36b67 97 * @retval #E_NO_ERROR Watchdog Timer initialized as requested
<> 157:ff67d9f36b67 98 * @retval #E_BAD_STATE Invalid unlock_key, WDT2 failed to unlock.
<> 157:ff67d9f36b67 99 */
<> 157:ff67d9f36b67 100 int WDT2_Init(uint8_t runInSleep, uint8_t unlock_key);
<> 157:ff67d9f36b67 101
<> 157:ff67d9f36b67 102 /**
<> 157:ff67d9f36b67 103 * @brief Configures and enables the wake-up timeout for the watchdog
<> 157:ff67d9f36b67 104 * specified.
<> 157:ff67d9f36b67 105 *
<> 157:ff67d9f36b67 106 * @param int_period Interrupt period.
<> 157:ff67d9f36b67 107 * @param unlock_key Key to unlock watchdog.
<> 157:ff67d9f36b67 108 *
<> 157:ff67d9f36b67 109 * @retval #E_NO_ERROR WDT2 Interrupt period enabled with the int_period
<> 157:ff67d9f36b67 110 * time.
<> 157:ff67d9f36b67 111 * @retval #E_INVALID Requested Period is greater than the maximum
<> 157:ff67d9f36b67 112 * supported
<> 157:ff67d9f36b67 113 * @retval #E_BAD_STATE Invalid unlock_key, WDT2 failed to unlock.
<> 157:ff67d9f36b67 114 */
<> 157:ff67d9f36b67 115 int WDT2_EnableWakeUp(wdt2_period_t int_period, uint8_t unlock_key);
<> 157:ff67d9f36b67 116
<> 157:ff67d9f36b67 117 /**
<> 157:ff67d9f36b67 118 * @brief Disables the interrupt timeout for the watchdog specified.
<> 157:ff67d9f36b67 119 *
<> 157:ff67d9f36b67 120 * @param unlock_key Key to unlock watchdog.
<> 157:ff67d9f36b67 121 *
<> 157:ff67d9f36b67 122 * @retval #E_NO_ERROR Wakeup disabled.
<> 157:ff67d9f36b67 123 * @retval #E_BAD_STATE Invalid unlock_key, WDT2 failed to unlock.
<> 157:ff67d9f36b67 124 */
<> 157:ff67d9f36b67 125 int WDT2_DisableWakeUp(uint8_t unlock_key);
<> 157:ff67d9f36b67 126
<> 157:ff67d9f36b67 127 /**
<> 157:ff67d9f36b67 128 * @brief Configures and enables the reset timeout for the watchdog
<> 157:ff67d9f36b67 129 * specified.
<> 157:ff67d9f36b67 130 *
<> 157:ff67d9f36b67 131 * @param rst_period Reset period.
<> 157:ff67d9f36b67 132 * @param unlock_key Key to unlock watchdog.
<> 157:ff67d9f36b67 133 *
<> 157:ff67d9f36b67 134 * @retval #E_NO_ERROR Reset timeout enabled with the rst_period time.
<> 157:ff67d9f36b67 135 * @retval #E_INVALID Requested Period is greater than the maximum
<> 157:ff67d9f36b67 136 * supported
<> 157:ff67d9f36b67 137 * @retval #E_BAD_STATE Invalid unlock_key, WDT2 failed to unlock.
<> 157:ff67d9f36b67 138 */
<> 157:ff67d9f36b67 139 int WDT2_EnableReset(wdt2_period_t rst_period, uint8_t unlock_key);
<> 157:ff67d9f36b67 140
<> 157:ff67d9f36b67 141 /**
<> 157:ff67d9f36b67 142 * @brief Disables the reset timeout for the watchdog specified.
<> 157:ff67d9f36b67 143 *
<> 157:ff67d9f36b67 144 * @param unlock_key Key to unlock watchdog.
<> 157:ff67d9f36b67 145 *
<> 157:ff67d9f36b67 146 * @retval #E_NO_ERROR Reset disabled.
<> 157:ff67d9f36b67 147 * @retval #E_BAD_STATE Invalid unlock_key, WDT2 failed to unlock.
<> 157:ff67d9f36b67 148 */
<> 157:ff67d9f36b67 149 int WDT2_DisableReset(uint8_t unlock_key);
<> 157:ff67d9f36b67 150
<> 157:ff67d9f36b67 151 /**
<> 157:ff67d9f36b67 152 * @brief Gets the watchdog flags
<> 157:ff67d9f36b67 153 *
<> 157:ff67d9f36b67 154 * @retval 0 No flags set.
<> 157:ff67d9f36b67 155 * @retval non-zero The WDT2 interrupt flags that are
<> 157:ff67d9f36b67 156 * set, see @ref WDT2_FLAGS_Register "WDT2_FLAGS
<> 157:ff67d9f36b67 157 * register".
<> 157:ff67d9f36b67 158 */
<> 157:ff67d9f36b67 159 __STATIC_INLINE uint32_t WDT2_GetFlags(void)
<> 157:ff67d9f36b67 160 {
<> 157:ff67d9f36b67 161 return (MXC_WDT2->flags);
<> 157:ff67d9f36b67 162 }
<> 157:ff67d9f36b67 163
<> 157:ff67d9f36b67 164 /**
<> 157:ff67d9f36b67 165 * @brief Clears the watchdog flags based on the @p mask.
<> 157:ff67d9f36b67 166 *
<> 157:ff67d9f36b67 167 * @param mask bits to clear
<> 157:ff67d9f36b67 168 */
<> 157:ff67d9f36b67 169 __STATIC_INLINE void WDT2_ClearFlags(uint32_t mask)
<> 157:ff67d9f36b67 170 {
<> 157:ff67d9f36b67 171 MXC_WDT2->flags = mask;
<> 157:ff67d9f36b67 172 }
<> 157:ff67d9f36b67 173
<> 157:ff67d9f36b67 174 /**
<> 157:ff67d9f36b67 175 * @brief Starts the watchdog specified.
<> 157:ff67d9f36b67 176 *
<> 157:ff67d9f36b67 177 * @param unlock_key Key to unlock watchdog.
<> 157:ff67d9f36b67 178 *
<> 157:ff67d9f36b67 179 * @retval #E_NO_ERROR WDT2 started.
<> 157:ff67d9f36b67 180 * @retval #E_BAD_STATE Invalid unlock_key, WDT2 failed to unlock.
<> 157:ff67d9f36b67 181 */
<> 157:ff67d9f36b67 182 int WDT2_Start(uint8_t unlock_key);
<> 157:ff67d9f36b67 183
<> 157:ff67d9f36b67 184 /**
<> 157:ff67d9f36b67 185 * @brief Feeds the watchdog specified.
<> 157:ff67d9f36b67 186 *
<> 157:ff67d9f36b67 187 * @retval #E_NO_ERROR WDT2 reset successfully.
<> 157:ff67d9f36b67 188 */
<> 157:ff67d9f36b67 189 void WDT2_Reset(void);
<> 157:ff67d9f36b67 190
<> 157:ff67d9f36b67 191 /**
<> 157:ff67d9f36b67 192 * @brief Stops the WatchDog Timer 2.
<> 157:ff67d9f36b67 193 *
<> 157:ff67d9f36b67 194 * @param unlock_key Key to unlock watchdog.
<> 157:ff67d9f36b67 195 *
<> 157:ff67d9f36b67 196 * @retval #E_NO_ERROR WDT2 stopped.
<> 157:ff67d9f36b67 197 * @retval #E_BAD_STATE Invalid unlock_key, WDT2 failed to unlock.
<> 157:ff67d9f36b67 198 */
<> 157:ff67d9f36b67 199 int WDT2_Stop(uint8_t unlock_key);
<> 157:ff67d9f36b67 200
<> 157:ff67d9f36b67 201 /**
<> 157:ff67d9f36b67 202 * @brief Determines if the watchdog is running
<> 157:ff67d9f36b67 203 *
<> 157:ff67d9f36b67 204 * @retval 0 Inactive
<> 157:ff67d9f36b67 205 * @retval non-zero Active
<> 157:ff67d9f36b67 206 */
<> 157:ff67d9f36b67 207 __STATIC_INLINE int WDT2_IsActive(void)
<> 157:ff67d9f36b67 208 {
<> 157:ff67d9f36b67 209 return (!!(MXC_WDT2->ctrl & MXC_F_WDT2_CTRL_EN_TIMER));
<> 157:ff67d9f36b67 210 }
<> 157:ff67d9f36b67 211
<> 157:ff67d9f36b67 212 /**@} end of group wdt2*/
<> 157:ff67d9f36b67 213
<> 157:ff67d9f36b67 214 #ifdef __cplusplus
<> 157:ff67d9f36b67 215 }
<> 157:ff67d9f36b67 216 #endif
<> 157:ff67d9f36b67 217
<> 157:ff67d9f36b67 218 #endif /* _WDT_H */