Maxim Ibragimov / mbed-dev

mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c

Dependents:   Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay

Fork of mbed-dev by mbed official

targets/TARGET_Maxim/TARGET_MAX32630/mxc/pt.h@177:619788de047e, 2017-11-07 (annotated)

Committer:
maxxir
Date:
Tue Nov 07 16:46:29 2017 +0000
Revision:
177:619788de047e
Parent:
157:ff67d9f36b67 
To fix broken RTC on Nucleo_F103RB / STM32F103 BluePill etc..;  Used direct RTC register manipulation for STM32F1xx;  rtc_read() && rtc_write()  (native rtc_init() - works good);  also added stub for non-working on STM32F1xx rtc_read_subseconds().

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 157:ff67d9f36b67 1 /**
<> 157:ff67d9f36b67 2 * @file
<> 157:ff67d9f36b67 3 * @brief Pulse Train data types, definitions and function prototypes.
<> 157:ff67d9f36b67 4 */
<> 157:ff67d9f36b67 5
<> 157:ff67d9f36b67 6 /* *****************************************************************************
<> 157:ff67d9f36b67 7 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 157:ff67d9f36b67 8 *
<> 157:ff67d9f36b67 9 * Permission is hereby granted, free of charge, to any person obtaining a
<> 157:ff67d9f36b67 10 * copy of this software and associated documentation files (the "Software"),
<> 157:ff67d9f36b67 11 * to deal in the Software without restriction, including without limitation
<> 157:ff67d9f36b67 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 157:ff67d9f36b67 13 * and/or sell copies of the Software, and to permit persons to whom the
<> 157:ff67d9f36b67 14 * Software is furnished to do so, subject to the following conditions:
<> 157:ff67d9f36b67 15 *
<> 157:ff67d9f36b67 16 * The above copyright notice and this permission notice shall be included
<> 157:ff67d9f36b67 17 * in all copies or substantial portions of the Software.
<> 157:ff67d9f36b67 18 *
<> 157:ff67d9f36b67 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 157:ff67d9f36b67 20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 157:ff67d9f36b67 21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 157:ff67d9f36b67 22 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 157:ff67d9f36b67 23 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 157:ff67d9f36b67 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 157:ff67d9f36b67 25 * OTHER DEALINGS IN THE SOFTWARE.
<> 157:ff67d9f36b67 26 *
<> 157:ff67d9f36b67 27 * Except as contained in this notice, the name of Maxim Integrated
<> 157:ff67d9f36b67 28 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 157:ff67d9f36b67 29 * Products, Inc. Branding Policy.
<> 157:ff67d9f36b67 30 *
<> 157:ff67d9f36b67 31 * The mere transfer of this software does not imply any licenses
<> 157:ff67d9f36b67 32 * of trade secrets, proprietary technology, copyrights, patents,
<> 157:ff67d9f36b67 33 * trademarks, maskwork rights, or any other form of intellectual
<> 157:ff67d9f36b67 34 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 157:ff67d9f36b67 35 * ownership rights.
<> 157:ff67d9f36b67 36 *
<> 157:ff67d9f36b67 37 * $Date: 2016-10-10 19:27:24 -0500 (Mon, 10 Oct 2016) $
<> 157:ff67d9f36b67 38 * $Revision: 24669 $
<> 157:ff67d9f36b67 39 *
<> 157:ff67d9f36b67 40 ***************************************************************************** */
<> 157:ff67d9f36b67 41
<> 157:ff67d9f36b67 42 /* Define to prevent redundant inclusion */
<> 157:ff67d9f36b67 43 #ifndef _PT_H_
<> 157:ff67d9f36b67 44 #define _PT_H_
<> 157:ff67d9f36b67 45
<> 157:ff67d9f36b67 46 /* **** Includes **** */
<> 157:ff67d9f36b67 47 #include "mxc_config.h"
<> 157:ff67d9f36b67 48 #include "pt_regs.h"
<> 157:ff67d9f36b67 49 #include "mxc_assert.h"
<> 157:ff67d9f36b67 50 #include "mxc_sys.h"
<> 157:ff67d9f36b67 51
<> 157:ff67d9f36b67 52 #ifdef __cplusplus
<> 157:ff67d9f36b67 53 extern "C" {
<> 157:ff67d9f36b67 54 #endif
<> 157:ff67d9f36b67 55
<> 157:ff67d9f36b67 56 /**
<> 157:ff67d9f36b67 57 * @ingroup periphlibs
<> 157:ff67d9f36b67 58 * @defgroup pulsetrain Pulse Train Engine
<> 157:ff67d9f36b67 59 * @brief This is the high level API for the pulse train engine.
<> 157:ff67d9f36b67 60 * @{
<> 157:ff67d9f36b67 61 */
<> 157:ff67d9f36b67 62
<> 157:ff67d9f36b67 63 /**
<> 157:ff67d9f36b67 64 * Structure type for pulse train mode configuration.
<> 157:ff67d9f36b67 65 * @note Do not use for square wave
<> 157:ff67d9f36b67 66 */
<> 157:ff67d9f36b67 67 typedef struct {
<> 157:ff67d9f36b67 68 uint32_t bps; /**< pulse train bit rate */
<> 157:ff67d9f36b67 69 uint32_t pattern; /**< Output pattern to shift out, starts at LSB */
<> 157:ff67d9f36b67 70 uint8_t ptLength; /**< Number of bits in pulse train, 0 = 32bits, 1 = non valid , 2 = 2 bits, ... */
<> 157:ff67d9f36b67 71 uint16_t loop; /**< Number of times to repeat the train, 0 = continuous */
<> 157:ff67d9f36b67 72 uint16_t loopDelay; /**< Delay between loops specified in bits Example: loopDelay = 4, delays time = time it takes to shift out 4 bits */
<> 157:ff67d9f36b67 73 } pt_pt_cfg_t;
<> 157:ff67d9f36b67 74
<> 157:ff67d9f36b67 75 /**
<> 157:ff67d9f36b67 76 * @brief This function initializes the pulse trains to a known stopped
<> 157:ff67d9f36b67 77 * state and sets the global PT clock scale.
<> 157:ff67d9f36b67 78 * @param clk_scale Scale the system clock for the global PT clock.
<> 157:ff67d9f36b67 79 */
<> 157:ff67d9f36b67 80 void PT_Init(sys_pt_clk_scale clk_scale);
<> 157:ff67d9f36b67 81
<> 157:ff67d9f36b67 82 /**
<> 157:ff67d9f36b67 83 * @brief Configures the pulse train in the specified mode.
<> 157:ff67d9f36b67 84 * @details The parameters in the config structure must be set before calling
<> 157:ff67d9f36b67 85 * this function. This function should be used for configuring pulse
<> 157:ff67d9f36b67 86 * train mode only.
<> 157:ff67d9f36b67 87 * @note The pulse train cannot be running when this function is called.
<> 157:ff67d9f36b67 88 *
<> 157:ff67d9f36b67 89 * @param pt Pulse train to operate on.
<> 157:ff67d9f36b67 90 * @param cfg Pointer to pulse train configuration.
<> 157:ff67d9f36b67 91 * @param sysCfg Pointer to pulse train system GPIO configuration.
<> 157:ff67d9f36b67 92 *
<> 157:ff67d9f36b67 93 * @return #E_NO_ERROR if everything is successful, @ref MXC_Error_Codes
<> 157:ff67d9f36b67 94 * "error" if unsuccessful.
<> 157:ff67d9f36b67 95 */
<> 157:ff67d9f36b67 96 int PT_PTConfig(mxc_pt_regs_t *pt, pt_pt_cfg_t *cfg, const sys_cfg_pt_t *sysCfg);
<> 157:ff67d9f36b67 97
<> 157:ff67d9f36b67 98 /**
<> 157:ff67d9f36b67 99 * @brief Configures the pulse train in the square wave mode.
<> 157:ff67d9f36b67 100 * @details This function should be used for configuring square wave mode only.
<> 157:ff67d9f36b67 101 * @note The pulse train cannot be running when this function is called
<> 157:ff67d9f36b67 102 *
<> 157:ff67d9f36b67 103 * @param pt pulse train to operate on
<> 157:ff67d9f36b67 104 * @param freq square wave output frequency in Hz
<> 157:ff67d9f36b67 105 * @param sysCfg pointer to pulse train system GPIO configuration
<> 157:ff67d9f36b67 106 *
<> 157:ff67d9f36b67 107 * @returns #E_NO_ERROR if everything is successful, \ref MXC_Error_Codes "error" if unsuccessful.
<> 157:ff67d9f36b67 108 */
<> 157:ff67d9f36b67 109 int PT_SqrWaveConfig(mxc_pt_regs_t *pt, uint32_t freq, const sys_cfg_pt_t *sysCfg);
<> 157:ff67d9f36b67 110
<> 157:ff67d9f36b67 111 /**
<> 157:ff67d9f36b67 112 * @brief Starts the pulse train specified.
<> 157:ff67d9f36b67 113 *
<> 157:ff67d9f36b67 114 * @param pt Pulse train to operate on.
<> 157:ff67d9f36b67 115 */
<> 157:ff67d9f36b67 116 __STATIC_INLINE void PT_Start(mxc_pt_regs_t *pt)
<> 157:ff67d9f36b67 117 {
<> 157:ff67d9f36b67 118 int ptIndex = MXC_PT_GET_IDX(pt);
<> 157:ff67d9f36b67 119
<> 157:ff67d9f36b67 120 MXC_PTG->enable |= (1 << ptIndex);
<> 157:ff67d9f36b67 121
<> 157:ff67d9f36b67 122 //wait for PT to start
<> 157:ff67d9f36b67 123 while( (MXC_PTG->enable & (1 << ptIndex)) == 0 );
<> 157:ff67d9f36b67 124 }
<> 157:ff67d9f36b67 125
<> 157:ff67d9f36b67 126 /**
<> 157:ff67d9f36b67 127 * @brief Start multiple pulse train modules together.
<> 157:ff67d9f36b67 128 *
<> 157:ff67d9f36b67 129 * @param pts Set the bits of pulse trains to start
<> 157:ff67d9f36b67 130 * Bit0-\>pt0, Bit1-\>pt1... etc.
<> 157:ff67d9f36b67 131 */
<> 157:ff67d9f36b67 132 __STATIC_INLINE void PT_StartMulti(uint32_t pts)
<> 157:ff67d9f36b67 133 {
<> 157:ff67d9f36b67 134 MXC_PTG->enable |= pts;
<> 157:ff67d9f36b67 135
<> 157:ff67d9f36b67 136 //wait for PTs to start
<> 157:ff67d9f36b67 137 while( (MXC_PTG->enable & pts) != pts );
<> 157:ff67d9f36b67 138 }
<> 157:ff67d9f36b67 139
<> 157:ff67d9f36b67 140 /**
<> 157:ff67d9f36b67 141 * @brief Stops a pulse train.
<> 157:ff67d9f36b67 142 *
<> 157:ff67d9f36b67 143 * @param pt Pulse train to operate on.
<> 157:ff67d9f36b67 144 */
<> 157:ff67d9f36b67 145 __STATIC_INLINE void PT_Stop(mxc_pt_regs_t *pt)
<> 157:ff67d9f36b67 146 {
<> 157:ff67d9f36b67 147 int ptIndex = MXC_PT_GET_IDX(pt);
<> 157:ff67d9f36b67 148
<> 157:ff67d9f36b67 149 MXC_PTG->enable &= ~(1 << ptIndex);
<> 157:ff67d9f36b67 150 }
<> 157:ff67d9f36b67 151
<> 157:ff67d9f36b67 152 /**
<> 157:ff67d9f36b67 153 * @brief Stop multiple pulse trains together
<> 157:ff67d9f36b67 154 *
<> 157:ff67d9f36b67 155 * @param pts Set the bits of pulse trains to stop
<> 157:ff67d9f36b67 156 * Bit0-\>pt0, Bit1-\>pt1... etc.
<> 157:ff67d9f36b67 157 */
<> 157:ff67d9f36b67 158 __STATIC_INLINE void PT_StopMulti(uint32_t pts)
<> 157:ff67d9f36b67 159 {
<> 157:ff67d9f36b67 160 MXC_PTG->enable &= ~(pts);
<> 157:ff67d9f36b67 161 }
<> 157:ff67d9f36b67 162
<> 157:ff67d9f36b67 163 /**
<> 157:ff67d9f36b67 164 * @brief Determines if the pulse train is running.
<> 157:ff67d9f36b67 165 *
<> 157:ff67d9f36b67 166 * @param pt Pulse train to operate on.
<> 157:ff67d9f36b67 167 *
<> 157:ff67d9f36b67 168 * @return 0 Pulse train is off.
<> 157:ff67d9f36b67 169 * @return \>0 Pulse train is on.
<> 157:ff67d9f36b67 170 */
<> 157:ff67d9f36b67 171 __STATIC_INLINE uint32_t PT_IsActive(mxc_pt_regs_t *pt)
<> 157:ff67d9f36b67 172 {
<> 157:ff67d9f36b67 173 int ptIndex = MXC_PT_GET_IDX(pt);
<> 157:ff67d9f36b67 174
<> 157:ff67d9f36b67 175 return (!!(MXC_PTG->enable & (1 << ptIndex)));
<> 157:ff67d9f36b67 176 }
<> 157:ff67d9f36b67 177
<> 157:ff67d9f36b67 178 /**
<> 157:ff67d9f36b67 179 * @brief Determines if the pulse trains selected are running
<> 157:ff67d9f36b67 180 *
<> 157:ff67d9f36b67 181 * @param pts Set the bits of pulse trains to check Bit0-\>pt0,
<> 157:ff67d9f36b67 182 * Bit1-\>pt1... etc.
<> 157:ff67d9f36b67 183 *
<> 157:ff67d9f36b67 184 * @return 0 All pulse trains are off.
<> 157:ff67d9f36b67 185 * @return \>0 At least one pulse train is on.
<> 157:ff67d9f36b67 186 */
<> 157:ff67d9f36b67 187 __STATIC_INLINE uint32_t PT_IsActiveMulti(uint32_t pts)
<> 157:ff67d9f36b67 188 {
<> 157:ff67d9f36b67 189 return (MXC_PTG->enable & pts);
<> 157:ff67d9f36b67 190 }
<> 157:ff67d9f36b67 191
<> 157:ff67d9f36b67 192 /**
<> 157:ff67d9f36b67 193 * @brief Sets the pattern of the pulse train
<> 157:ff67d9f36b67 194 *
<> 157:ff67d9f36b67 195 * @param pt Pointer to pulse train to operate on
<> 157:ff67d9f36b67 196 * @param pattern Output pattern.
<> 157:ff67d9f36b67 197 *
<> 157:ff67d9f36b67 198 */
<> 157:ff67d9f36b67 199 __STATIC_INLINE void PT_SetPattern(mxc_pt_regs_t *pt, uint32_t pattern)
<> 157:ff67d9f36b67 200 {
<> 157:ff67d9f36b67 201 pt->train = pattern;
<> 157:ff67d9f36b67 202 }
<> 157:ff67d9f36b67 203
<> 157:ff67d9f36b67 204 /**
<> 157:ff67d9f36b67 205 * @brief Enable pulse train interrupt.
<> 157:ff67d9f36b67 206 *
<> 157:ff67d9f36b67 207 * @param pt Pointer to pulse train to operate on.
<> 157:ff67d9f36b67 208 */
<> 157:ff67d9f36b67 209 __STATIC_INLINE void PT_EnableINT(mxc_pt_regs_t *pt)
<> 157:ff67d9f36b67 210 {
<> 157:ff67d9f36b67 211 int ptIndex = MXC_PT_GET_IDX(pt);
<> 157:ff67d9f36b67 212
<> 157:ff67d9f36b67 213 MXC_PTG->inten |= (1 << ptIndex);
<> 157:ff67d9f36b67 214 }
<> 157:ff67d9f36b67 215
<> 157:ff67d9f36b67 216 /**
<> 157:ff67d9f36b67 217 * @brief Enable interrupts for the pulse trains selected.
<> 157:ff67d9f36b67 218 *
<> 157:ff67d9f36b67 219 * @param pts Bit mask of which pulse trains to enable. Set the bit
<> 157:ff67d9f36b67 220 * position of each pulse train to enable it. Bit0-\>pt0,
<> 157:ff67d9f36b67 221 * Bit1-\>pt1... etc, 1 will enable the interrupt, 0 to leave
<> 157:ff67d9f36b67 222 * a PT channel in its current state.
<> 157:ff67d9f36b67 223 */
<> 157:ff67d9f36b67 224 __STATIC_INLINE void PT_EnableINTMulti(uint32_t pts)
<> 157:ff67d9f36b67 225 {
<> 157:ff67d9f36b67 226 MXC_PTG->inten |= pts;
<> 157:ff67d9f36b67 227 }
<> 157:ff67d9f36b67 228
<> 157:ff67d9f36b67 229 /**
<> 157:ff67d9f36b67 230 * @brief Disable pulse train interrupt.
<> 157:ff67d9f36b67 231 *
<> 157:ff67d9f36b67 232 * @param pt pulse train to operate on.
<> 157:ff67d9f36b67 233 */
<> 157:ff67d9f36b67 234 __STATIC_INLINE void PT_DisableINT(mxc_pt_regs_t *pt)
<> 157:ff67d9f36b67 235 {
<> 157:ff67d9f36b67 236 int ptIndex = MXC_PT_GET_IDX(pt);
<> 157:ff67d9f36b67 237
<> 157:ff67d9f36b67 238 MXC_PTG->inten &= ~(1 << ptIndex);
<> 157:ff67d9f36b67 239 }
<> 157:ff67d9f36b67 240
<> 157:ff67d9f36b67 241 /**
<> 157:ff67d9f36b67 242 * @brief Disable interrupts for the pulse trains selected.
<> 157:ff67d9f36b67 243 *
<> 157:ff67d9f36b67 244 * @param pts Bit mask of what pulse trains to disable. Set the bit
<> 157:ff67d9f36b67 245 * position of each pulse train to disable it. Bit0-\>pt0,
<> 157:ff67d9f36b67 246 * Bit1-\>pt1... etc, 1 will disable the interrupt, 0 to leave
<> 157:ff67d9f36b67 247 * a PT channel in its current state.
<> 157:ff67d9f36b67 248 */
<> 157:ff67d9f36b67 249 __STATIC_INLINE void PT_DisableINTMulti(uint32_t pts)
<> 157:ff67d9f36b67 250 {
<> 157:ff67d9f36b67 251 MXC_PTG->inten &= ~pts;
<> 157:ff67d9f36b67 252 }
<> 157:ff67d9f36b67 253 /**
<> 157:ff67d9f36b67 254 * @brief Gets the pulse trains's interrupt flags.
<> 157:ff67d9f36b67 255 *
<> 157:ff67d9f36b67 256 * @return The Pulse Train Interrupt Flags, \ref PT_INTFL_Register Register
<> 157:ff67d9f36b67 257 * for details.
<> 157:ff67d9f36b67 258 */
<> 157:ff67d9f36b67 259 __STATIC_INLINE uint32_t PT_GetFlags(void)
<> 157:ff67d9f36b67 260 {
<> 157:ff67d9f36b67 261 return MXC_PTG->intfl;
<> 157:ff67d9f36b67 262 }
<> 157:ff67d9f36b67 263
<> 157:ff67d9f36b67 264 /**
<> 157:ff67d9f36b67 265 * @brief Clears the pulse train's interrupt flag.
<> 157:ff67d9f36b67 266 *
<> 157:ff67d9f36b67 267 * @param mask bits to clear, see \ref PT_INTFL_Register Register for details.
<> 157:ff67d9f36b67 268 */
<> 157:ff67d9f36b67 269 __STATIC_INLINE void PT_ClearFlags(uint32_t mask)
<> 157:ff67d9f36b67 270 {
<> 157:ff67d9f36b67 271 MXC_PTG->intfl = mask;
<> 157:ff67d9f36b67 272 }
<> 157:ff67d9f36b67 273
<> 157:ff67d9f36b67 274 /**
<> 157:ff67d9f36b67 275 * @brief Setup and enables a pulse train to restart after another pulse
<> 157:ff67d9f36b67 276 * train has exited its loop. Each pulse train can have up to two
<> 157:ff67d9f36b67 277 * restart triggers.
<> 157:ff67d9f36b67 278 *
<> 157:ff67d9f36b67 279 * @param ptToRestart pulse train to restart after @c ptStop ends.
<> 157:ff67d9f36b67 280 * @param ptStop pulse train that stops and triggers @p ptToRestart
<> 157:ff67d9f36b67 281 * to begin.
<> 157:ff67d9f36b67 282 * @param restartIndex selects which restart trigger to set (0 or 1).
<> 157:ff67d9f36b67 283 */
<> 157:ff67d9f36b67 284 __STATIC_INLINE void PT_SetRestart(mxc_pt_regs_t *ptToRestart, mxc_pt_regs_t *ptStop, uint8_t restartIndex)
<> 157:ff67d9f36b67 285 {
<> 157:ff67d9f36b67 286 int ptStopIndex = MXC_PT_GET_IDX(ptStop);
<> 157:ff67d9f36b67 287
<> 157:ff67d9f36b67 288 MXC_ASSERT(ptStopIndex >= 0);
<> 157:ff67d9f36b67 289
<> 157:ff67d9f36b67 290 if(restartIndex) {
<> 157:ff67d9f36b67 291 ptToRestart->restart |= (ptStopIndex << MXC_F_PT_RESTART_PT_Y_SELECT_POS) |
<> 157:ff67d9f36b67 292 MXC_F_PT_RESTART_ON_PT_Y_LOOP_EXIT;
<> 157:ff67d9f36b67 293 } else {
<> 157:ff67d9f36b67 294 ptToRestart->restart |= (ptStopIndex << MXC_F_PT_RESTART_PT_X_SELECT_POS) |
<> 157:ff67d9f36b67 295 MXC_F_PT_RESTART_ON_PT_X_LOOP_EXIT;
<> 157:ff67d9f36b67 296 }
<> 157:ff67d9f36b67 297 }
<> 157:ff67d9f36b67 298
<> 157:ff67d9f36b67 299 /**
<> 157:ff67d9f36b67 300 * @brief Disable the restart for the specified pulse train
<> 157:ff67d9f36b67 301 *
<> 157:ff67d9f36b67 302 * @param ptToRestart pulse train to disable the restart
<> 157:ff67d9f36b67 303 * @param restartIndex selects which restart trigger to disable (0 or 1)
<> 157:ff67d9f36b67 304 */
<> 157:ff67d9f36b67 305 __STATIC_INLINE void PT_RestartDisable(mxc_pt_regs_t *ptToRestart, uint8_t restartIndex)
<> 157:ff67d9f36b67 306 {
<> 157:ff67d9f36b67 307 if(restartIndex)
<> 157:ff67d9f36b67 308 ptToRestart->restart &= ~MXC_F_PT_RESTART_ON_PT_Y_LOOP_EXIT;
<> 157:ff67d9f36b67 309 else
<> 157:ff67d9f36b67 310 ptToRestart->restart &= ~MXC_F_PT_RESTART_ON_PT_X_LOOP_EXIT;
<> 157:ff67d9f36b67 311 }
<> 157:ff67d9f36b67 312
<> 157:ff67d9f36b67 313 /**
<> 157:ff67d9f36b67 314 * @brief Resynchronize individual pulse trains together. Resync will stop
<> 157:ff67d9f36b67 315 * those resync_pts; others will be still running
<> 157:ff67d9f36b67 316 *
<> 157:ff67d9f36b67 317 * @param resyncPts pulse train modules that need to be re-synced by bit
<> 157:ff67d9f36b67 318 * number. Bit0-\>pt0, Bit1-\>pt1... etc.
<> 157:ff67d9f36b67 319 */
<> 157:ff67d9f36b67 320 __STATIC_INLINE void PT_Resync(uint32_t resyncPts)
<> 157:ff67d9f36b67 321 {
<> 157:ff67d9f36b67 322 MXC_PTG->resync = resyncPts;
<> 157:ff67d9f36b67 323 while(MXC_PTG->resync);
<> 157:ff67d9f36b67 324 }
<> 157:ff67d9f36b67 325 /**@} end of group pulsetrains*/
<> 157:ff67d9f36b67 326
<> 157:ff67d9f36b67 327 #ifdef __cplusplus
<> 157:ff67d9f36b67 328 }
<> 157:ff67d9f36b67 329 #endif
<> 157:ff67d9f36b67 330
<> 157:ff67d9f36b67 331 #endif /* _PT_H_ */