Maxim Ibragimov / mbed-dev

mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c

Dependents:   Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay

Fork of mbed-dev by mbed official

targets/TARGET_Maxim/TARGET_MAX32630/mxc/adc.h@157:ff67d9f36b67, 2017-02-02 (annotated)

Committer:
<>
Date:
Thu Feb 02 17:01:33 2017 +0000
Revision:
157:ff67d9f36b67
This updates the lib to the mbed lib v135

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 157:ff67d9f36b67 1 /**
<> 157:ff67d9f36b67 2 * @file
<> 157:ff67d9f36b67 3 * @brief Analog to Digital Converter function prototypes and data types.
<> 157:ff67d9f36b67 4 */
<> 157:ff67d9f36b67 5
<> 157:ff67d9f36b67 6 /* ****************************************************************************
<> 157:ff67d9f36b67 7 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 157:ff67d9f36b67 8 *
<> 157:ff67d9f36b67 9 * Permission is hereby granted, free of charge, to any person obtaining a
<> 157:ff67d9f36b67 10 * copy of this software and associated documentation files (the "Software"),
<> 157:ff67d9f36b67 11 * to deal in the Software without restriction, including without limitation
<> 157:ff67d9f36b67 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 157:ff67d9f36b67 13 * and/or sell copies of the Software, and to permit persons to whom the
<> 157:ff67d9f36b67 14 * Software is furnished to do so, subject to the following conditions:
<> 157:ff67d9f36b67 15 *
<> 157:ff67d9f36b67 16 * The above copyright notice and this permission notice shall be included
<> 157:ff67d9f36b67 17 * in all copies or substantial portions of the Software.
<> 157:ff67d9f36b67 18 *
<> 157:ff67d9f36b67 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 157:ff67d9f36b67 20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 157:ff67d9f36b67 21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 157:ff67d9f36b67 22 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 157:ff67d9f36b67 23 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 157:ff67d9f36b67 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 157:ff67d9f36b67 25 * OTHER DEALINGS IN THE SOFTWARE.
<> 157:ff67d9f36b67 26 *
<> 157:ff67d9f36b67 27 * Except as contained in this notice, the name of Maxim Integrated
<> 157:ff67d9f36b67 28 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 157:ff67d9f36b67 29 * Products, Inc. Branding Policy.
<> 157:ff67d9f36b67 30 *
<> 157:ff67d9f36b67 31 * The mere transfer of this software does not imply any licenses
<> 157:ff67d9f36b67 32 * of trade secrets, proprietary technology, copyrights, patents,
<> 157:ff67d9f36b67 33 * trademarks, maskwork rights, or any other form of intellectual
<> 157:ff67d9f36b67 34 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 157:ff67d9f36b67 35 * ownership rights.
<> 157:ff67d9f36b67 36 *
<> 157:ff67d9f36b67 37 * $Date: 2016-10-07 14:53:52 -0500 (Fri, 07 Oct 2016) $
<> 157:ff67d9f36b67 38 * $Revision: 24632 $
<> 157:ff67d9f36b67 39 *
<> 157:ff67d9f36b67 40 *************************************************************************** */
<> 157:ff67d9f36b67 41
<> 157:ff67d9f36b67 42 /* Define to prevent redundant inclusion */
<> 157:ff67d9f36b67 43 #ifndef _ADC_H
<> 157:ff67d9f36b67 44 #define _ADC_H
<> 157:ff67d9f36b67 45
<> 157:ff67d9f36b67 46 /* **** Includes **** */
<> 157:ff67d9f36b67 47 #include <stdint.h>
<> 157:ff67d9f36b67 48
<> 157:ff67d9f36b67 49 /* Doxy group definition for this peripheral module */
<> 157:ff67d9f36b67 50
<> 157:ff67d9f36b67 51 /**
<> 157:ff67d9f36b67 52 * @ingroup periphlibs
<> 157:ff67d9f36b67 53 * @defgroup adc Analog to Digital Converter (ADC)
<> 157:ff67d9f36b67 54 * @{
<> 157:ff67d9f36b67 55 */
<> 157:ff67d9f36b67 56
<> 157:ff67d9f36b67 57 #include "adc_regs.h"
<> 157:ff67d9f36b67 58
<> 157:ff67d9f36b67 59 #ifdef __cplusplus
<> 157:ff67d9f36b67 60 extern "C" {
<> 157:ff67d9f36b67 61 #endif
<> 157:ff67d9f36b67 62
<> 157:ff67d9f36b67 63 /* **** Definitions **** */
<> 157:ff67d9f36b67 64
<> 157:ff67d9f36b67 65 /**
<> 157:ff67d9f36b67 66 * Enumeration type for ADC Channel Selection. See \ref ADC_CHSEL_values "ADC Channel Select Values" for additional information.
<> 157:ff67d9f36b67 67 */
<> 157:ff67d9f36b67 68 typedef enum {
<> 157:ff67d9f36b67 69 ADC_CH_0 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN0, /**< Channel 0 Select */
<> 157:ff67d9f36b67 70 ADC_CH_1 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN1, /**< Channel 1 Select */
<> 157:ff67d9f36b67 71 ADC_CH_2 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN2, /**< Channel 2 Select */
<> 157:ff67d9f36b67 72 ADC_CH_3 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN3, /**< Channel 3 Select */
<> 157:ff67d9f36b67 73 ADC_CH_0_DIV_5 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN0_DIV_5, /**< Channel 0 divided by 5 */
<> 157:ff67d9f36b67 74 ADC_CH_1_DIV_5 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN1_DIV_5, /**< Channel 1 divided by 5 */
<> 157:ff67d9f36b67 75 ADC_CH_VDDB_DIV_4 = MXC_V_ADC_CTRL_ADC_CHSEL_VDDB_DIV_4, /**< VDDB divided by 4 */
<> 157:ff67d9f36b67 76 ADC_CH_VDD18 = MXC_V_ADC_CTRL_ADC_CHSEL_VDD18, /**< VDD18 input select */
<> 157:ff67d9f36b67 77 ADC_CH_VDD12 = MXC_V_ADC_CTRL_ADC_CHSEL_VDD12, /**< VDD12 input select */
<> 157:ff67d9f36b67 78 ADC_CH_VRTC_DIV_2 = MXC_V_ADC_CTRL_ADC_CHSEL_VRTC_DIV_2, /**< VRTC divided by 2 */
<> 157:ff67d9f36b67 79 ADC_CH_TMON = MXC_V_ADC_CTRL_ADC_CHSEL_TMON, /**< TMON input select */
<> 157:ff67d9f36b67 80 #if (MXC_ADC_REV > 0)
<> 157:ff67d9f36b67 81 ADC_CH_VDDIO_DIV_4 = MXC_V_ADC_CTRL_ADC_CHSEL_VDDIO_DIV_4, /**< VDDIO divided by 4 select */
<> 157:ff67d9f36b67 82 ADC_CH_VDDIOH_DIV_4 = MXC_V_ADC_CTRL_ADC_CHSEL_VDDIOH_DIV_4, /**< VDDIOH divided by 4 select */
<> 157:ff67d9f36b67 83 #endif
<> 157:ff67d9f36b67 84 ADC_CH_MAX /**< Max enum value for channel selection */
<> 157:ff67d9f36b67 85 } mxc_adc_chsel_t;
<> 157:ff67d9f36b67 86
<> 157:ff67d9f36b67 87 /**
<> 157:ff67d9f36b67 88 * Enumeration type for the ADC limit register to set
<> 157:ff67d9f36b67 89 */
<> 157:ff67d9f36b67 90 typedef enum {
<> 157:ff67d9f36b67 91 ADC_LIMIT_0 = 0, /**< ADC Limit Register 0 */
<> 157:ff67d9f36b67 92 ADC_LIMIT_1 = 1, /**< ADC Limit Register 1 */
<> 157:ff67d9f36b67 93 ADC_LIMIT_2 = 2, /**< ADC Limit Register 2 */
<> 157:ff67d9f36b67 94 ADC_LIMIT_3 = 3, /**< ADC Limit Register 3 */
<> 157:ff67d9f36b67 95 ADC_LIMIT_MAX /**< Number of Limit registers */
<> 157:ff67d9f36b67 96 } mxc_adc_limitsel_t;
<> 157:ff67d9f36b67 97
<> 157:ff67d9f36b67 98 ///@cond
<> 157:ff67d9f36b67 99 /**
<> 157:ff67d9f36b67 100 * Mask for all Interrupt Flag Fields
<> 157:ff67d9f36b67 101 */
<> 157:ff67d9f36b67 102 #define ADC_IF_MASK (0xffffffffUL << MXC_F_ADC_INTR_ADC_DONE_IF_POS)
<> 157:ff67d9f36b67 103
<> 157:ff67d9f36b67 104 /**
<> 157:ff67d9f36b67 105 * Mask for all Interrupt Enable Fields
<> 157:ff67d9f36b67 106 */
<> 157:ff67d9f36b67 107 #define ADC_IE_MASK (0xffffffffUL >> MXC_F_ADC_INTR_ADC_DONE_IF_POS)
<> 157:ff67d9f36b67 108 ///@endcond
<> 157:ff67d9f36b67 109
<> 157:ff67d9f36b67 110 /* **** Function Prototypes **** */
<> 157:ff67d9f36b67 111
<> 157:ff67d9f36b67 112 /**
<> 157:ff67d9f36b67 113 * @brief Initialize the ADC hardware
<> 157:ff67d9f36b67 114 *
<> 157:ff67d9f36b67 115 * @return #E_NO_ERROR if successful
<> 157:ff67d9f36b67 116 */
<> 157:ff67d9f36b67 117 int ADC_Init(void);
<> 157:ff67d9f36b67 118
<> 157:ff67d9f36b67 119 /**
<> 157:ff67d9f36b67 120 * @brief Start ADC conversion on the selected channel
<> 157:ff67d9f36b67 121 *
<> 157:ff67d9f36b67 122 * @param channel Channel select from #mxc_adc_chsel_t
<> 157:ff67d9f36b67 123 * @param adc_scale Enable the ADC input scaling mode if non-zero
<> 157:ff67d9f36b67 124 * @param bypass Bypass input buffer stage if non-zero
<> 157:ff67d9f36b67 125 */
<> 157:ff67d9f36b67 126 void ADC_StartConvert(mxc_adc_chsel_t channel, unsigned int adc_scale, unsigned int bypass);
<> 157:ff67d9f36b67 127
<> 157:ff67d9f36b67 128 /**
<> 157:ff67d9f36b67 129 * @brief Gets the result from the previous ADC conversion
<> 157:ff67d9f36b67 130 *
<> 157:ff67d9f36b67 131 * @param outdata Pointer to store the ADC data conversion
<> 157:ff67d9f36b67 132 * result.
<> 157:ff67d9f36b67 133 * @return #E_OVERFLOW ADC overflow error
<> 157:ff67d9f36b67 134 * @return #E_NO_ERROR Data returned in outdata parameter
<> 157:ff67d9f36b67 135 */
<> 157:ff67d9f36b67 136 int ADC_GetData(uint16_t *outdata);
<> 157:ff67d9f36b67 137
<> 157:ff67d9f36b67 138 /**
<> 157:ff67d9f36b67 139 * @brief Set the data limits for an ADC channel monitor
<> 157:ff67d9f36b67 140 *
<> 157:ff67d9f36b67 141 * @param unit Which data limit unit to configure
<> 157:ff67d9f36b67 142 * @param channel Channel select from mxc_adc_chsel_t
<> 157:ff67d9f36b67 143 * @param low_enable Enable the lower limit on this monitor
<> 157:ff67d9f36b67 144 * @param low_limit Value for lower limit monitor
<> 157:ff67d9f36b67 145 * @param high_enable Enable the upper limit on this monitor
<> 157:ff67d9f36b67 146 * @param high_limit Value for upper limit monitor
<> 157:ff67d9f36b67 147 *
<> 157:ff67d9f36b67 148 * @return #E_BAD_PARAM ADC limit or channel greater than supported
<> 157:ff67d9f36b67 149 * @return #E_NO_ERROR ADC limit set successfully
<> 157:ff67d9f36b67 150 */
<> 157:ff67d9f36b67 151 int ADC_SetLimit(mxc_adc_limitsel_t unit, mxc_adc_chsel_t channel,
<> 157:ff67d9f36b67 152 unsigned int low_enable, unsigned int low_limit,
<> 157:ff67d9f36b67 153 unsigned int high_enable, unsigned int high_limit);
<> 157:ff67d9f36b67 154
<> 157:ff67d9f36b67 155 /**
<> 157:ff67d9f36b67 156 * @brief Get interrupt flags
<> 157:ff67d9f36b67 157 *
<> 157:ff67d9f36b67 158 * @return ADC Interrupt flags bit mask. See the @ref ADC_INTR_IF_Register
<> 157:ff67d9f36b67 159 * "ADC_INTR Register" for the interrupt flag masks.
<> 157:ff67d9f36b67 160 */
<> 157:ff67d9f36b67 161 __STATIC_INLINE uint32_t ADC_GetFlags()
<> 157:ff67d9f36b67 162 {
<> 157:ff67d9f36b67 163 return (MXC_ADC->intr & ADC_IF_MASK);
<> 157:ff67d9f36b67 164 }
<> 157:ff67d9f36b67 165
<> 157:ff67d9f36b67 166 /**
<> 157:ff67d9f36b67 167 * @brief Clear interrupt flag(s) using the mask parameter. All bits set in
<> 157:ff67d9f36b67 168 * the parameter will be cleared.
<> 157:ff67d9f36b67 169 *
<> 157:ff67d9f36b67 170 * @param mask Interrupt flags to clear. See the @ref ADC_INTR_IF_Register
<> 157:ff67d9f36b67 171 * "ADC_INTR Register" for the interrupt flag masks.
<> 157:ff67d9f36b67 172 */
<> 157:ff67d9f36b67 173 __STATIC_INLINE void ADC_ClearFlags(uint32_t mask)
<> 157:ff67d9f36b67 174 {
<> 157:ff67d9f36b67 175 MXC_ADC->intr = ((MXC_ADC->intr & ADC_IF_MASK) | mask);
<> 157:ff67d9f36b67 176 }
<> 157:ff67d9f36b67 177
<> 157:ff67d9f36b67 178 /**
<> 157:ff67d9f36b67 179 * @brief Get the Status of the ADC
<> 157:ff67d9f36b67 180 *
<> 157:ff67d9f36b67 181 * @return ADC status register. See @ref ADC_STATUS_Register "ADC_STATUS
<> 157:ff67d9f36b67 182 * Register" for details.
<> 157:ff67d9f36b67 183 */
<> 157:ff67d9f36b67 184 __STATIC_INLINE uint32_t ADC_GetStatus()
<> 157:ff67d9f36b67 185 {
<> 157:ff67d9f36b67 186 return (MXC_ADC->status);
<> 157:ff67d9f36b67 187 }
<> 157:ff67d9f36b67 188
<> 157:ff67d9f36b67 189 /**
<> 157:ff67d9f36b67 190 * @brief Enables the ADC interrupts specified by the mask parameter
<> 157:ff67d9f36b67 191 *
<> 157:ff67d9f36b67 192 * @param mask ADC interrupts to enable. See @ref ADC_INTR_IE_Register
<> 157:ff67d9f36b67 193 * "ADC_INTR Register" for the interrupt enable bit masks.
<> 157:ff67d9f36b67 194 */
<> 157:ff67d9f36b67 195 __STATIC_INLINE void ADC_EnableINT(uint32_t mask)
<> 157:ff67d9f36b67 196 {
<> 157:ff67d9f36b67 197 MXC_ADC->intr = ((MXC_ADC->intr & ADC_IE_MASK) | mask);
<> 157:ff67d9f36b67 198 }
<> 157:ff67d9f36b67 199
<> 157:ff67d9f36b67 200 /**
<> 157:ff67d9f36b67 201 * @brief Disable ADC interrupts based on mask
<> 157:ff67d9f36b67 202 *
<> 157:ff67d9f36b67 203 * @param mask ADC interrupts to disable. See @ref ADC_INTR_IE_Register
<> 157:ff67d9f36b67 204 * "ADC_INTR Register" for the interrupt enable bit masks.
<> 157:ff67d9f36b67 205 */
<> 157:ff67d9f36b67 206 __STATIC_INLINE void ADC_DisableINT(uint32_t mask)
<> 157:ff67d9f36b67 207 {
<> 157:ff67d9f36b67 208 MXC_ADC->intr = ((MXC_ADC->intr & ADC_IE_MASK) & ~mask);
<> 157:ff67d9f36b67 209 }
<> 157:ff67d9f36b67 210
<> 157:ff67d9f36b67 211 /**@} end of group adc */
<> 157:ff67d9f36b67 212
<> 157:ff67d9f36b67 213 #ifdef __cplusplus
<> 157:ff67d9f36b67 214 }
<> 157:ff67d9f36b67 215 #endif
<> 157:ff67d9f36b67 216
<> 157:ff67d9f36b67 217 #endif /* _ADC_H */