Maxim Ibragimov / mbed-dev

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targets/TARGET_NORDIC/TARGET_NRF5_SDK13/sleep.c@162:e13f6fdb2ac4, 2017-04-12 (annotated)

Committer:
<>
Date:
Wed Apr 12 16:21:43 2017 +0100
Revision:
162:e13f6fdb2ac4
This updates the lib to the mbed lib v140

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 162:e13f6fdb2ac4 1 /* mbed Microcontroller Library
<> 162:e13f6fdb2ac4 2 * Copyright (c) 2006-2013 ARM Limited
<> 162:e13f6fdb2ac4 3 *
<> 162:e13f6fdb2ac4 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 162:e13f6fdb2ac4 5 * you may not use this file except in compliance with the License.
<> 162:e13f6fdb2ac4 6 * You may obtain a copy of the License at
<> 162:e13f6fdb2ac4 7 *
<> 162:e13f6fdb2ac4 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 162:e13f6fdb2ac4 9 *
<> 162:e13f6fdb2ac4 10 * Unless required by applicable law or agreed to in writing, software
<> 162:e13f6fdb2ac4 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 162:e13f6fdb2ac4 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 162:e13f6fdb2ac4 13 * See the License for the specific language governing permissions and
<> 162:e13f6fdb2ac4 14 * limitations under the License.
<> 162:e13f6fdb2ac4 15 */
<> 162:e13f6fdb2ac4 16 #include "sleep_api.h"
<> 162:e13f6fdb2ac4 17 #include "cmsis.h"
<> 162:e13f6fdb2ac4 18 #include "mbed_interface.h"
<> 162:e13f6fdb2ac4 19 #include "softdevice_handler.h"
<> 162:e13f6fdb2ac4 20 #include "nrf_soc.h"
<> 162:e13f6fdb2ac4 21
<> 162:e13f6fdb2ac4 22 // Mask of reserved bits of the register ICSR in the System Control Block peripheral
<> 162:e13f6fdb2ac4 23 // In this case, bits which are equal to 0 are the bits reserved in this register
<> 162:e13f6fdb2ac4 24 #define SCB_ICSR_RESERVED_BITS_MASK 0x9E43F03F
<> 162:e13f6fdb2ac4 25
<> 162:e13f6fdb2ac4 26 #define FPU_EXCEPTION_MASK 0x0000009F
<> 162:e13f6fdb2ac4 27
<> 162:e13f6fdb2ac4 28 void hal_sleep(void)
<> 162:e13f6fdb2ac4 29 {
<> 162:e13f6fdb2ac4 30 // ensure debug is disconnected if semihost is enabled....
<> 162:e13f6fdb2ac4 31
<> 162:e13f6fdb2ac4 32 // Trigger an event when an interrupt is pending. This allows to wake up
<> 162:e13f6fdb2ac4 33 // the processor from disabled interrupts.
<> 162:e13f6fdb2ac4 34 SCB->SCR |= SCB_SCR_SEVONPEND_Msk;
<> 162:e13f6fdb2ac4 35
<> 162:e13f6fdb2ac4 36 #if defined(NRF52) || defined(NRF52840_XXAA)
<> 162:e13f6fdb2ac4 37 /* Clear exceptions and PendingIRQ from the FPU unit */
<> 162:e13f6fdb2ac4 38 __set_FPSCR(__get_FPSCR() & ~(FPU_EXCEPTION_MASK));
<> 162:e13f6fdb2ac4 39 (void) __get_FPSCR();
<> 162:e13f6fdb2ac4 40 NVIC_ClearPendingIRQ(FPU_IRQn);
<> 162:e13f6fdb2ac4 41 #endif
<> 162:e13f6fdb2ac4 42
<> 162:e13f6fdb2ac4 43 // If the SoftDevice is enabled, its API must be used to go to sleep.
<> 162:e13f6fdb2ac4 44 if (softdevice_handler_is_enabled())
<> 162:e13f6fdb2ac4 45 {
<> 162:e13f6fdb2ac4 46 sd_power_mode_set(NRF_POWER_MODE_LOWPWR);
<> 162:e13f6fdb2ac4 47 sd_app_evt_wait();
<> 162:e13f6fdb2ac4 48 }
<> 162:e13f6fdb2ac4 49 else
<> 162:e13f6fdb2ac4 50 {
<> 162:e13f6fdb2ac4 51 NRF_POWER->TASKS_LOWPWR = 1;
<> 162:e13f6fdb2ac4 52
<> 162:e13f6fdb2ac4 53 // Note: it is not sufficient to just use WFE here, since the internal
<> 162:e13f6fdb2ac4 54 // event register may be already set from an event that occurred in the
<> 162:e13f6fdb2ac4 55 // past (like an SVC call to the SoftDevice) and in such case WFE will
<> 162:e13f6fdb2ac4 56 // just clear the register and continue execution.
<> 162:e13f6fdb2ac4 57 // Therefore, the strategy here is to first clear the event register
<> 162:e13f6fdb2ac4 58 // by using SEV/WFE pair, and then execute WFE again, unless there is
<> 162:e13f6fdb2ac4 59 // a pending interrupt.
<> 162:e13f6fdb2ac4 60
<> 162:e13f6fdb2ac4 61 // Set an event and wake up whatsoever, this will clear the event
<> 162:e13f6fdb2ac4 62 // register from all previous events set (SVC call included)
<> 162:e13f6fdb2ac4 63 __SEV();
<> 162:e13f6fdb2ac4 64 __WFE();
<> 162:e13f6fdb2ac4 65
<> 162:e13f6fdb2ac4 66 // Test if there is an interrupt pending (mask reserved regions)
<> 162:e13f6fdb2ac4 67 if (SCB->ICSR & (SCB_ICSR_RESERVED_BITS_MASK))
<> 162:e13f6fdb2ac4 68 {
<> 162:e13f6fdb2ac4 69 // Ok, there is an interrut pending, no need to go to sleep
<> 162:e13f6fdb2ac4 70 return;
<> 162:e13f6fdb2ac4 71 }
<> 162:e13f6fdb2ac4 72 else
<> 162:e13f6fdb2ac4 73 {
<> 162:e13f6fdb2ac4 74 // next event will wakeup the CPU
<> 162:e13f6fdb2ac4 75 // If an interrupt occured between the test of SCB->ICSR and this
<> 162:e13f6fdb2ac4 76 // instruction, WFE will just not put the CPU to sleep
<> 162:e13f6fdb2ac4 77 __WFE();
<> 162:e13f6fdb2ac4 78 }
<> 162:e13f6fdb2ac4 79 }
<> 162:e13f6fdb2ac4 80 }
<> 162:e13f6fdb2ac4 81
<> 162:e13f6fdb2ac4 82 void hal_deepsleep(void)
<> 162:e13f6fdb2ac4 83 {
<> 162:e13f6fdb2ac4 84 hal_sleep();
<> 162:e13f6fdb2ac4 85 }