Maxim Ibragimov / mbed-dev

mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c

Dependents:   Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay

Fork of mbed-dev by mbed official

targets/TARGET_STM/TARGET_STM32F4/pin_device.h@177:619788de047e, 2017-11-07 (annotated)

Committer:
maxxir
Date:
Tue Nov 07 16:46:29 2017 +0000
Revision:
177:619788de047e
Parent:
160:d5399cc887bb 
To fix broken RTC on Nucleo_F103RB / STM32F103 BluePill etc..;  Used direct RTC register manipulation for STM32F1xx;  rtc_read() && rtc_write()  (native rtc_init() - works good);  also added stub for non-working on STM32F1xx rtc_read_subseconds().

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 160:d5399cc887bb 1 /* mbed Microcontroller Library
<> 160:d5399cc887bb 2 *******************************************************************************
<> 160:d5399cc887bb 3 * Copyright (c) 2016, STMicroelectronics
<> 160:d5399cc887bb 4 * All rights reserved.
<> 160:d5399cc887bb 5 *
<> 160:d5399cc887bb 6 * Redistribution and use in source and binary forms, with or without
<> 160:d5399cc887bb 7 * modification, are permitted provided that the following conditions are met:
<> 160:d5399cc887bb 8 *
<> 160:d5399cc887bb 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 160:d5399cc887bb 10 * this list of conditions and the following disclaimer.
<> 160:d5399cc887bb 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 160:d5399cc887bb 12 * this list of conditions and the following disclaimer in the documentation
<> 160:d5399cc887bb 13 * and/or other materials provided with the distribution.
<> 160:d5399cc887bb 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 160:d5399cc887bb 15 * may be used to endorse or promote products derived from this software
<> 160:d5399cc887bb 16 * without specific prior written permission.
<> 160:d5399cc887bb 17 *
<> 160:d5399cc887bb 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 160:d5399cc887bb 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 160:d5399cc887bb 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 160:d5399cc887bb 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 160:d5399cc887bb 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 160:d5399cc887bb 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 160:d5399cc887bb 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 160:d5399cc887bb 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 160:d5399cc887bb 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 160:d5399cc887bb 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 160:d5399cc887bb 28 *******************************************************************************
<> 160:d5399cc887bb 29 */
<> 160:d5399cc887bb 30 #ifndef MBED_PIN_DEVICE_H
<> 160:d5399cc887bb 31 #define MBED_PIN_DEVICE_H
<> 160:d5399cc887bb 32
<> 160:d5399cc887bb 33 #include "cmsis.h"
<> 160:d5399cc887bb 34
<> 160:d5399cc887bb 35 // when LL is available, below include can be used
<> 160:d5399cc887bb 36 // #include "stm32f4xx_ll_gpio.h"
<> 160:d5399cc887bb 37 // until then let's define locally the required functions
<> 160:d5399cc887bb 38 #define LL_GPIO_PIN_0 GPIO_BSRR_BS_0 /*!< Select pin 0 */
<> 160:d5399cc887bb 39 #define LL_GPIO_PIN_1 GPIO_BSRR_BS_1 /*!< Select pin 1 */
<> 160:d5399cc887bb 40 #define LL_GPIO_PIN_2 GPIO_BSRR_BS_2 /*!< Select pin 2 */
<> 160:d5399cc887bb 41 #define LL_GPIO_PIN_3 GPIO_BSRR_BS_3 /*!< Select pin 3 */
<> 160:d5399cc887bb 42 #define LL_GPIO_PIN_4 GPIO_BSRR_BS_4 /*!< Select pin 4 */
<> 160:d5399cc887bb 43 #define LL_GPIO_PIN_5 GPIO_BSRR_BS_5 /*!< Select pin 5 */
<> 160:d5399cc887bb 44 #define LL_GPIO_PIN_6 GPIO_BSRR_BS_6 /*!< Select pin 6 */
<> 160:d5399cc887bb 45 #define LL_GPIO_PIN_7 GPIO_BSRR_BS_7 /*!< Select pin 7 */
<> 160:d5399cc887bb 46 #define LL_GPIO_PIN_8 GPIO_BSRR_BS_8 /*!< Select pin 8 */
<> 160:d5399cc887bb 47 #define LL_GPIO_PIN_9 GPIO_BSRR_BS_9 /*!< Select pin 9 */
<> 160:d5399cc887bb 48 #define LL_GPIO_PIN_10 GPIO_BSRR_BS_10 /*!< Select pin 10 */
<> 160:d5399cc887bb 49 #define LL_GPIO_PIN_11 GPIO_BSRR_BS_11 /*!< Select pin 11 */
<> 160:d5399cc887bb 50 #define LL_GPIO_PIN_12 GPIO_BSRR_BS_12 /*!< Select pin 12 */
<> 160:d5399cc887bb 51 #define LL_GPIO_PIN_13 GPIO_BSRR_BS_13 /*!< Select pin 13 */
<> 160:d5399cc887bb 52 #define LL_GPIO_PIN_14 GPIO_BSRR_BS_14 /*!< Select pin 14 */
<> 160:d5399cc887bb 53 #define LL_GPIO_PIN_15 GPIO_BSRR_BS_15 /*!< Select pin 15 */
<> 160:d5399cc887bb 54
<> 160:d5399cc887bb 55 #define LL_GPIO_MODE_INPUT ((uint32_t)0x00000000U) /*!< Select input mode */
<> 160:d5399cc887bb 56 #define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODER0_0 /*!< Select output mode */
<> 160:d5399cc887bb 57 #define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODER0_1 /*!< Select alternate function mode */
<> 160:d5399cc887bb 58 #define LL_GPIO_MODE_ANALOG GPIO_MODER_MODER0 /*!< Select analog mode */
<> 160:d5399cc887bb 59
<> 160:d5399cc887bb 60 #define LL_GPIO_OUTPUT_PUSHPULL ((uint32_t)0x00000000U) /*!< Select push-pull as output type */
<> 160:d5399cc887bb 61 #define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT_0 /*!< Select open-drain as output type */
<> 160:d5399cc887bb 62
<> 160:d5399cc887bb 63 #define LL_GPIO_PULL_NO ((uint32_t)0x00000000U) /*!< Select I/O no pull */
<> 160:d5399cc887bb 64 #define LL_GPIO_PULL_UP GPIO_PUPDR_PUPDR0_0 /*!< Select I/O pull up */
<> 160:d5399cc887bb 65 #define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPDR0_1 /*!< Select I/O pull down */
<> 160:d5399cc887bb 66
<> 160:d5399cc887bb 67 #define LL_GPIO_SPEED_FREQ_LOW ((uint32_t)0x00000000U) /*!< Select I/O low output speed */
<> 160:d5399cc887bb 68 #define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDER_OSPEEDR0_0 /*!< Select I/O medium output speed */
<> 160:d5399cc887bb 69 #define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDER_OSPEEDR0_1 /*!< Select I/O fast output speed */
<> 160:d5399cc887bb 70 #define LL_GPIO_SPEED_FREQ_VERY_HIGH GPIO_OSPEEDER_OSPEEDR0 /*!< Select I/O high output speed */
<> 160:d5399cc887bb 71
<> 160:d5399cc887bb 72 __STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
<> 160:d5399cc887bb 73 {
<> 160:d5399cc887bb 74 MODIFY_REG(GPIOx->AFR[0], (0xFU << (POSITION_VAL(Pin) * 4U)),
<> 160:d5399cc887bb 75 (Alternate << (POSITION_VAL(Pin) * 4U)));
<> 160:d5399cc887bb 76 }
<> 160:d5399cc887bb 77 __STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
<> 160:d5399cc887bb 78 {
<> 160:d5399cc887bb 79 MODIFY_REG(GPIOx->AFR[1], (0xFU << (POSITION_VAL(Pin >> 8U) * 4U)),
<> 160:d5399cc887bb 80 (Alternate << (POSITION_VAL(Pin >> 8U) * 4U)));
<> 160:d5399cc887bb 81 }
<> 160:d5399cc887bb 82 __STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
<> 160:d5399cc887bb 83 {
<> 160:d5399cc887bb 84 MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U)));
<> 160:d5399cc887bb 85 }
<> 160:d5399cc887bb 86 __STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 160:d5399cc887bb 87 {
<> 160:d5399cc887bb 88 return (uint32_t)(READ_BIT(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODER0)) / (Pin * Pin));
<> 160:d5399cc887bb 89 }
<> 160:d5399cc887bb 90 __STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
<> 160:d5399cc887bb 91 {
<> 160:d5399cc887bb 92 MODIFY_REG(GPIOx->PUPDR, (GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U)), (Pull << (POSITION_VAL(Pin) * 2U)));
<> 160:d5399cc887bb 93 }
<> 160:d5399cc887bb 94 __STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
<> 160:d5399cc887bb 95 {
<> 160:d5399cc887bb 96 MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
<> 160:d5399cc887bb 97 }
<> 160:d5399cc887bb 98 __STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed)
<> 160:d5399cc887bb 99 {
<> 160:d5399cc887bb 100 MODIFY_REG(GPIOx->OSPEEDR, (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U)),
<> 160:d5399cc887bb 101 (Speed << (POSITION_VAL(Pin) * 2U)));
<> 160:d5399cc887bb 102 }
<> 160:d5399cc887bb 103 // Above lines shall be defined in LL when available
<> 160:d5399cc887bb 104
<> 160:d5399cc887bb 105 extern const uint32_t ll_pin_defines[16];
<> 160:d5399cc887bb 106
<> 160:d5399cc887bb 107 /* Family specific implementations */
<> 160:d5399cc887bb 108 static inline void stm_pin_DisconnectDebug(PinName pin)
<> 160:d5399cc887bb 109 {
<> 160:d5399cc887bb 110 /* empty for now */
<> 160:d5399cc887bb 111 }
<> 160:d5399cc887bb 112
<> 160:d5399cc887bb 113 static inline void stm_pin_PullConfig(GPIO_TypeDef *gpio, uint32_t ll_pin, uint32_t pull_config)
<> 160:d5399cc887bb 114 {
<> 160:d5399cc887bb 115 switch (pull_config) {
<> 160:d5399cc887bb 116 case GPIO_PULLUP:
<> 160:d5399cc887bb 117 LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_UP);
<> 160:d5399cc887bb 118 break;
<> 160:d5399cc887bb 119 case GPIO_PULLDOWN:
<> 160:d5399cc887bb 120 LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_DOWN);
<> 160:d5399cc887bb 121 break;
<> 160:d5399cc887bb 122 default:
<> 160:d5399cc887bb 123 LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_NO);
<> 160:d5399cc887bb 124 break;
<> 160:d5399cc887bb 125 }
<> 160:d5399cc887bb 126 }
<> 160:d5399cc887bb 127
<> 160:d5399cc887bb 128 static inline void stm_pin_SetAFPin( GPIO_TypeDef *gpio, PinName pin, uint32_t afnum)
<> 160:d5399cc887bb 129 {
<> 160:d5399cc887bb 130 uint32_t ll_pin = ll_pin_defines[STM_PIN(pin)];
<> 160:d5399cc887bb 131
<> 160:d5399cc887bb 132 if (STM_PIN(pin) > 7)
<> 160:d5399cc887bb 133 LL_GPIO_SetAFPin_8_15(gpio, ll_pin, afnum);
<> 160:d5399cc887bb 134 else
<> 160:d5399cc887bb 135 LL_GPIO_SetAFPin_0_7(gpio, ll_pin, afnum);
<> 160:d5399cc887bb 136 }
<> 160:d5399cc887bb 137
<> 160:d5399cc887bb 138 #endif