mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c
Dependents: Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay
Fork of mbed-dev by
targets/TARGET_ONSEMI/TARGET_NCS36510/pinmap.c@177:619788de047e, 2017-11-07 (annotated)
- Committer:
- maxxir
- Date:
- Tue Nov 07 16:46:29 2017 +0000
- Revision:
- 177:619788de047e
- Parent:
- 150:02e0a0aed4ec
To fix broken RTC on Nucleo_F103RB / STM32F103 BluePill etc..; Used direct RTC register manipulation for STM32F1xx; rtc_read() && rtc_write() (native rtc_init() - works good); also added stub for non-working on STM32F1xx rtc_read_subseconds().
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* mbed Microcontroller Library |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2006-2013 ARM Limited |
<> | 144:ef7eb2e8f9f7 | 3 | * |
<> | 144:ef7eb2e8f9f7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 144:ef7eb2e8f9f7 | 5 | * you may not use this file except in compliance with the License. |
<> | 144:ef7eb2e8f9f7 | 6 | * You may obtain a copy of the License at |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 144:ef7eb2e8f9f7 | 9 | * |
<> | 144:ef7eb2e8f9f7 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 144:ef7eb2e8f9f7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 144:ef7eb2e8f9f7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 144:ef7eb2e8f9f7 | 13 | * See the License for the specific language governing permissions and |
<> | 144:ef7eb2e8f9f7 | 14 | * limitations under the License. |
<> | 144:ef7eb2e8f9f7 | 15 | */ |
<> | 144:ef7eb2e8f9f7 | 16 | |
<> | 144:ef7eb2e8f9f7 | 17 | /* Orion specific header files */ |
<> | 144:ef7eb2e8f9f7 | 18 | |
<> | 144:ef7eb2e8f9f7 | 19 | #include "pad.h" |
<> | 144:ef7eb2e8f9f7 | 20 | |
<> | 144:ef7eb2e8f9f7 | 21 | /* MBED header files */ |
<> | 144:ef7eb2e8f9f7 | 22 | #include "pinmap.h" |
<> | 144:ef7eb2e8f9f7 | 23 | |
<> | 144:ef7eb2e8f9f7 | 24 | void pin_function(PinName pin, int function) |
<> | 144:ef7eb2e8f9f7 | 25 | { |
<> | 144:ef7eb2e8f9f7 | 26 | /** - Enable the clock for PAD peripheral device */ |
<> | 144:ef7eb2e8f9f7 | 27 | CLOCK_ENABLE(CLOCK_CROSSB); |
<> | 144:ef7eb2e8f9f7 | 28 | |
<> | 144:ef7eb2e8f9f7 | 29 | /* Note: GPIO 0,1,2,3 are used for UART 1, GPIO 8,9 are used for UART 2 */ |
<> | 144:ef7eb2e8f9f7 | 30 | CrossbReg_pt crossBar = (CrossbReg_t *)(CROSSBREG_BASE + (pin * CROSS_REG_ADRS_BYTE_SIZE)); |
<> | 144:ef7eb2e8f9f7 | 31 | crossBar->DIOCTRL0 = function; |
<> | 144:ef7eb2e8f9f7 | 32 | |
<> | 144:ef7eb2e8f9f7 | 33 | /** - Disable the clock for PAD peripheral device */ |
<> | 144:ef7eb2e8f9f7 | 34 | CLOCK_DISABLE(CLOCK_CROSSB); |
<> | 144:ef7eb2e8f9f7 | 35 | } |
<> | 144:ef7eb2e8f9f7 | 36 | |
<> | 144:ef7eb2e8f9f7 | 37 | void pin_mode(PinName pin, PinMode mode) |
<> | 144:ef7eb2e8f9f7 | 38 | { |
<> | 144:ef7eb2e8f9f7 | 39 | /** - Get PAD IO register address for the PAD number */ |
<> | 144:ef7eb2e8f9f7 | 40 | PadReg_t *padRegOffset = (PadReg_t*)(PADREG_BASE + (pin * PAD_REG_ADRS_BYTE_SIZE)); |
<> | 144:ef7eb2e8f9f7 | 41 | |
<> | 144:ef7eb2e8f9f7 | 42 | /** - Enable the clock for PAD peripheral device */ |
<> | 144:ef7eb2e8f9f7 | 43 | CLOCK_ENABLE(CLOCK_PAD); |
<> | 144:ef7eb2e8f9f7 | 44 | |
<> | 144:ef7eb2e8f9f7 | 45 | switch (mode) { |
<> | 144:ef7eb2e8f9f7 | 46 | case PushPullPullDown: |
<> | 144:ef7eb2e8f9f7 | 47 | padRegOffset->PADIO0.BITS.TYPE = PAD_OUTCFG_PUSHPULL; |
<> | 144:ef7eb2e8f9f7 | 48 | padRegOffset->PADIO0.BITS.PULL = PAD_PULL_DOWN; |
<> | 144:ef7eb2e8f9f7 | 49 | break; |
<> | 144:ef7eb2e8f9f7 | 50 | |
<> | 144:ef7eb2e8f9f7 | 51 | case PushPullNoPull: |
<> | 144:ef7eb2e8f9f7 | 52 | padRegOffset->PADIO0.BITS.TYPE = PAD_OUTCFG_PUSHPULL; |
<> | 144:ef7eb2e8f9f7 | 53 | padRegOffset->PADIO0.BITS.PULL = PAD_PULL_NONE; |
<> | 144:ef7eb2e8f9f7 | 54 | break; |
<> | 144:ef7eb2e8f9f7 | 55 | |
<> | 144:ef7eb2e8f9f7 | 56 | case PushPullPullUp: |
<> | 144:ef7eb2e8f9f7 | 57 | padRegOffset->PADIO0.BITS.TYPE = PAD_OUTCFG_PUSHPULL; |
<> | 144:ef7eb2e8f9f7 | 58 | padRegOffset->PADIO0.BITS.PULL = PAD_PULL_UP; |
<> | 144:ef7eb2e8f9f7 | 59 | break; |
<> | 144:ef7eb2e8f9f7 | 60 | |
<> | 144:ef7eb2e8f9f7 | 61 | case OpenDrainPullDown: |
<> | 144:ef7eb2e8f9f7 | 62 | padRegOffset->PADIO0.BITS.TYPE = PAD_OOUTCFG_OPENDRAIN; |
<> | 144:ef7eb2e8f9f7 | 63 | padRegOffset->PADIO0.BITS.PULL = PAD_PULL_DOWN; |
<> | 144:ef7eb2e8f9f7 | 64 | break; |
<> | 144:ef7eb2e8f9f7 | 65 | |
<> | 144:ef7eb2e8f9f7 | 66 | case OpenDrainNoPull: |
<> | 144:ef7eb2e8f9f7 | 67 | padRegOffset->PADIO0.BITS.TYPE = PAD_OOUTCFG_OPENDRAIN; |
<> | 144:ef7eb2e8f9f7 | 68 | padRegOffset->PADIO0.BITS.PULL = PAD_PULL_NONE; |
<> | 144:ef7eb2e8f9f7 | 69 | break; |
<> | 144:ef7eb2e8f9f7 | 70 | |
<> | 144:ef7eb2e8f9f7 | 71 | case OpenDrainPullUp: |
<> | 144:ef7eb2e8f9f7 | 72 | padRegOffset->PADIO0.BITS.TYPE = PAD_OOUTCFG_OPENDRAIN; |
<> | 144:ef7eb2e8f9f7 | 73 | padRegOffset->PADIO0.BITS.PULL = PAD_PULL_UP; |
<> | 144:ef7eb2e8f9f7 | 74 | break; |
<> | 144:ef7eb2e8f9f7 | 75 | |
<> | 144:ef7eb2e8f9f7 | 76 | default: |
<> | 144:ef7eb2e8f9f7 | 77 | break; |
<> | 144:ef7eb2e8f9f7 | 78 | } |
<> | 144:ef7eb2e8f9f7 | 79 | |
<> | 144:ef7eb2e8f9f7 | 80 | /** - Disable the clock for PAD peripheral device */ |
<> | 144:ef7eb2e8f9f7 | 81 | CLOCK_DISABLE(CLOCK_PAD); |
<> | 144:ef7eb2e8f9f7 | 82 | |
<> | 144:ef7eb2e8f9f7 | 83 | } |