Maxim Ibragimov / mbed-dev

mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c

Dependents:   Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay

Fork of mbed-dev by mbed official

targets/TARGET_ONSEMI/TARGET_NCS36510/PeripheralPins.c@177:619788de047e, 2017-11-07 (annotated)

Committer:
maxxir
Date:
Tue Nov 07 16:46:29 2017 +0000
Revision:
177:619788de047e
Parent:
149:156823d33999 
To fix broken RTC on Nucleo_F103RB / STM32F103 BluePill etc..;  Used direct RTC register manipulation for STM32F1xx;  rtc_read() && rtc_write()  (native rtc_init() - works good);  also added stub for non-working on STM32F1xx rtc_read_subseconds().

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 * Copyright (c) 2006-2013 ARM Limited
<> 149:156823d33999 3 *
<> 149:156823d33999 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 149:156823d33999 5 * you may not use this file except in compliance with the License.
<> 149:156823d33999 6 * You may obtain a copy of the License at
<> 149:156823d33999 7 *
<> 149:156823d33999 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 149:156823d33999 9 *
<> 149:156823d33999 10 * Unless required by applicable law or agreed to in writing, software
<> 149:156823d33999 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 149:156823d33999 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 149:156823d33999 13 * See the License for the specific language governing permissions and
<> 149:156823d33999 14 * limitations under the License.
<> 149:156823d33999 15 */
<> 149:156823d33999 16
<> 149:156823d33999 17 /*todo: determine how function argument is used */
<> 149:156823d33999 18
<> 149:156823d33999 19 #include "PeripheralPins.h"
<> 149:156823d33999 20
<> 149:156823d33999 21 /************ADC***************/
<> 149:156823d33999 22 const PinMap PinMap_ADC[] = {
<> 149:156823d33999 23 {A0, ADC_0, 0},
<> 149:156823d33999 24 {A1, ADC_0, 0},
<> 149:156823d33999 25 {A2, ADC_0, 0},
<> 149:156823d33999 26 {A3, ADC_0, 0},
<> 149:156823d33999 27 {NC , NC , 0}
<> 149:156823d33999 28 };
<> 149:156823d33999 29
<> 149:156823d33999 30 /************I2C***************/
<> 149:156823d33999 31 const PinMap PinMap_I2C_SDA[] = {
<> 149:156823d33999 32 {GPIO3, I2C_0, 5},
<> 149:156823d33999 33 {GPIO4, I2C_0, 5},
<> 149:156823d33999 34 {GPIO10, I2C_0, 5},
<> 149:156823d33999 35 {GPIO12, I2C_0, 5},
<> 149:156823d33999 36 {GPIO15, I2C_1, 5},
<> 149:156823d33999 37 {GPIO16, I2C_1, 5},
<> 149:156823d33999 38 {NC , NC , 0}
<> 149:156823d33999 39 };
<> 149:156823d33999 40
<> 149:156823d33999 41 const PinMap PinMap_I2C_SCL[] = {
<> 149:156823d33999 42 {GPIO2, I2C_0, 5},
<> 149:156823d33999 43 {GPIO5, I2C_0, 5},
<> 149:156823d33999 44 {GPIO11, I2C_0, 5},
<> 149:156823d33999 45 {GPIO13, I2C_0, 5},
<> 149:156823d33999 46 {GPIO14, I2C_1, 5},
<> 149:156823d33999 47 {GPIO17, I2C_1, 5},
<> 149:156823d33999 48 {NC , NC , 0}
<> 149:156823d33999 49 };
<> 149:156823d33999 50
<> 149:156823d33999 51 /************UART***************/
<> 149:156823d33999 52 const PinMap PinMap_UART_TX[] = {
<> 149:156823d33999 53 {GPIO0, UART_0, 7},
<> 149:156823d33999 54 {GPIO8, UART_1, 7},
<> 149:156823d33999 55 {NC , NC , 0}
<> 149:156823d33999 56 };
<> 149:156823d33999 57
<> 149:156823d33999 58 const PinMap PinMap_UART_RX[] = {
<> 149:156823d33999 59 {GPIO1, UART_0, 7},
<> 149:156823d33999 60 {GPIO9, UART_1, 7},
<> 149:156823d33999 61 {NC , NC , 0}
<> 149:156823d33999 62 };
<> 149:156823d33999 63
<> 149:156823d33999 64 /************SPI***************/
<> 149:156823d33999 65 const PinMap PinMap_SPI_SCLK[] = {
<> 149:156823d33999 66 /*todo: other pins are possible, need to add */
<> 149:156823d33999 67 {SPI1_SCLK_2, SPI_0, 6},
<> 149:156823d33999 68 {SPI1_SCLK_3, SPI_0, 6},
<> 149:156823d33999 69 {SPI2_SCLK, SPI_1, 6},
<> 149:156823d33999 70 {NC, NC, 0}
<> 149:156823d33999 71 };
<> 149:156823d33999 72
<> 149:156823d33999 73 const PinMap PinMap_SPI_MOSI[] = {
<> 149:156823d33999 74 /*todo: other pins are possible, need to add */
<> 149:156823d33999 75 {SPI1_SDATAO_2, SPI_0, 6},
<> 149:156823d33999 76 {SPI1_SDATAO_3, SPI_0, 6},
<> 149:156823d33999 77 {SPI2_SDATAO, SPI_1, 6},
<> 149:156823d33999 78 {NC, NC, 0}
<> 149:156823d33999 79 };
<> 149:156823d33999 80
<> 149:156823d33999 81 const PinMap PinMap_SPI_MISO[] = {
<> 149:156823d33999 82 /*todo: other pins are possible, need to add */
<> 149:156823d33999 83 {SPI1_SDATAI_2, SPI_0, 6},
<> 149:156823d33999 84 {SPI1_SDATAI_3, SPI_0, 6},
<> 149:156823d33999 85 {SPI2_SDATAI, SPI_1, 6},
<> 149:156823d33999 86 {NC, NC, 0}
<> 149:156823d33999 87 };
<> 149:156823d33999 88
<> 149:156823d33999 89 const PinMap PinMap_SPI_SSEL[] = {
<> 149:156823d33999 90 /*todo: other pins are possible, need to add */
<> 149:156823d33999 91 /* TODO what about SSNO */
<> 149:156823d33999 92 {SPI1_SSNO0_1, SPI_0, 6},
<> 149:156823d33999 93 {SPI1_SSNO1_1, SPI_0, 6},
<> 149:156823d33999 94 {SPI1_SSNO2_1, SPI_0, 6},
<> 149:156823d33999 95 {SPI1_SSNO3_1, SPI_0, 6},
<> 149:156823d33999 96 {SPI1_SSNI_2, SPI_0, 6},
<> 149:156823d33999 97 {SPI1_SSNO0_2, SPI_0, 6},
<> 149:156823d33999 98 {SPI1_SSNO1_2, SPI_0, 6},
<> 149:156823d33999 99 {SPI1_SSNO2_2, SPI_0, 6},
<> 149:156823d33999 100 {SPI2_SSNI, SPI_1, 6},
<> 149:156823d33999 101 {SPI2_SSNO0, SPI_1, 6},
<> 149:156823d33999 102 {NC, NC, 0}
<> 149:156823d33999 103 };
<> 149:156823d33999 104
<> 149:156823d33999 105
<> 149:156823d33999 106 const PinMap PinMap_PWM[] = {
<> 149:156823d33999 107
<> 149:156823d33999 108 {GPIO6 , PWM_0 , 4},
<> 149:156823d33999 109 {GPIO7 , PWM_0 , 4},
<> 149:156823d33999 110 {GPIO9 , PWM_0 , 4},
<> 149:156823d33999 111 {GPIO12 , PWM_0 , 4},
<> 149:156823d33999 112 {GPIO13 , PWM_0 , 4},
<> 149:156823d33999 113 {NC , NC , 0}
<> 149:156823d33999 114 };