Maxim Ibragimov / mbed-dev

mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c

Dependents:   Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay

Fork of mbed-dev by mbed official

targets/TARGET_NXP/TARGET_LPC11XX_11CXX/pinmap.c@177:619788de047e, 2017-11-07 (annotated)

Committer:
maxxir
Date:
Tue Nov 07 16:46:29 2017 +0000
Revision:
177:619788de047e
Parent:
149:156823d33999 
To fix broken RTC on Nucleo_F103RB / STM32F103 BluePill etc..;  Used direct RTC register manipulation for STM32F1xx;  rtc_read() && rtc_write()  (native rtc_init() - works good);  also added stub for non-working on STM32F1xx rtc_read_subseconds().

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2013 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 #include "mbed_assert.h"
<> 144:ef7eb2e8f9f7 17 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 18 #include "mbed_error.h"
<> 144:ef7eb2e8f9f7 19
<> 144:ef7eb2e8f9f7 20 void pin_function(PinName pin, int function) {
<> 144:ef7eb2e8f9f7 21 MBED_ASSERT(pin != (PinName)NC);
<> 144:ef7eb2e8f9f7 22 uint32_t offset = (uint32_t)pin & 0xff;
<> 144:ef7eb2e8f9f7 23 __IO uint32_t *reg = (__IO uint32_t*)(LPC_IOCON_BASE + offset);
<> 144:ef7eb2e8f9f7 24
<> 144:ef7eb2e8f9f7 25 // pin function bits: [2:0] -> 111 = (0x7)
<> 144:ef7eb2e8f9f7 26 *reg = (*reg & ~0x7) | (function & 0x7);
<> 144:ef7eb2e8f9f7 27 }
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 void pin_mode(PinName pin, PinMode mode) {
<> 144:ef7eb2e8f9f7 30 MBED_ASSERT(pin != (PinName)NC);
<> 144:ef7eb2e8f9f7 31 uint32_t offset = (uint32_t)pin & 0xff;
<> 144:ef7eb2e8f9f7 32 uint32_t drain = ((uint32_t)mode & (uint32_t)OpenDrain) >> 2;
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 __IO uint32_t *reg = (__IO uint32_t*)(LPC_IOCON_BASE + offset);
<> 144:ef7eb2e8f9f7 35 uint32_t tmp = *reg;
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 // pin mode bits: [4:3] -> 11000 = (0x3 << 3)
<> 144:ef7eb2e8f9f7 38 tmp &= ~(0x3 << 3);
<> 144:ef7eb2e8f9f7 39 tmp |= (mode & 0x3) << 3;
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 // drain
<> 144:ef7eb2e8f9f7 42 tmp &= ~(0x1 << 10);
<> 144:ef7eb2e8f9f7 43 tmp |= drain << 10;
<> 144:ef7eb2e8f9f7 44
<> 144:ef7eb2e8f9f7 45 *reg = tmp;
<> 144:ef7eb2e8f9f7 46 }