mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c
Dependents: Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay
Fork of mbed-dev by
targets/TARGET_NXP/TARGET_LPC11UXX/sleep.c@177:619788de047e, 2017-11-07 (annotated)
- Committer:
- maxxir
- Date:
- Tue Nov 07 16:46:29 2017 +0000
- Revision:
- 177:619788de047e
- Parent:
- 160:d5399cc887bb
To fix broken RTC on Nucleo_F103RB / STM32F103 BluePill etc..; Used direct RTC register manipulation for STM32F1xx; rtc_read() && rtc_write() (native rtc_init() - works good); also added stub for non-working on STM32F1xx rtc_read_subseconds().
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* mbed Microcontroller Library |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2006-2013 ARM Limited |
<> | 144:ef7eb2e8f9f7 | 3 | * |
<> | 144:ef7eb2e8f9f7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 144:ef7eb2e8f9f7 | 5 | * you may not use this file except in compliance with the License. |
<> | 144:ef7eb2e8f9f7 | 6 | * You may obtain a copy of the License at |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 144:ef7eb2e8f9f7 | 9 | * |
<> | 144:ef7eb2e8f9f7 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 144:ef7eb2e8f9f7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 144:ef7eb2e8f9f7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 144:ef7eb2e8f9f7 | 13 | * See the License for the specific language governing permissions and |
<> | 144:ef7eb2e8f9f7 | 14 | * limitations under the License. |
<> | 144:ef7eb2e8f9f7 | 15 | */ |
<> | 144:ef7eb2e8f9f7 | 16 | #include "sleep_api.h" |
<> | 144:ef7eb2e8f9f7 | 17 | #include "cmsis.h" |
<> | 144:ef7eb2e8f9f7 | 18 | #include "mbed_interface.h" |
<> | 144:ef7eb2e8f9f7 | 19 | |
<> | 160:d5399cc887bb | 20 | void hal_sleep(void) { |
<> | 144:ef7eb2e8f9f7 | 21 | // ensure debug is disconnected |
<> | 144:ef7eb2e8f9f7 | 22 | #if DEVICE_SEMIHOST |
<> | 144:ef7eb2e8f9f7 | 23 | mbed_interface_disconnect(); |
<> | 144:ef7eb2e8f9f7 | 24 | #endif |
<> | 144:ef7eb2e8f9f7 | 25 | |
<> | 144:ef7eb2e8f9f7 | 26 | // PCON[PD] set to sleep |
<> | 144:ef7eb2e8f9f7 | 27 | LPC_PMU->PCON = 0x0; |
<> | 144:ef7eb2e8f9f7 | 28 | |
<> | 144:ef7eb2e8f9f7 | 29 | // SRC[SLEEPDEEP] set to 0 = sleep |
<> | 144:ef7eb2e8f9f7 | 30 | SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk; |
<> | 144:ef7eb2e8f9f7 | 31 | |
<> | 144:ef7eb2e8f9f7 | 32 | // wait for interrupt |
<> | 144:ef7eb2e8f9f7 | 33 | __WFI(); |
<> | 144:ef7eb2e8f9f7 | 34 | } |
<> | 144:ef7eb2e8f9f7 | 35 | |
<> | 144:ef7eb2e8f9f7 | 36 | /* |
<> | 144:ef7eb2e8f9f7 | 37 | * The mbed lpc1768 does not support the deepsleep mode |
<> | 144:ef7eb2e8f9f7 | 38 | * as a debugger is connected to it (the mbed interface). |
<> | 144:ef7eb2e8f9f7 | 39 | * |
<> | 144:ef7eb2e8f9f7 | 40 | * As mentionned in an application note from NXP: |
<> | 144:ef7eb2e8f9f7 | 41 | * |
<> | 144:ef7eb2e8f9f7 | 42 | * http://www.po-star.com/public/uploads/20120319123122_141.pdf |
<> | 144:ef7eb2e8f9f7 | 43 | * |
<> | 144:ef7eb2e8f9f7 | 44 | * {{{ |
<> | 144:ef7eb2e8f9f7 | 45 | * The user should be aware of certain limitations during debugging. |
<> | 144:ef7eb2e8f9f7 | 46 | * The most important is that, due to limitations of the Cortex-M3 |
<> | 144:ef7eb2e8f9f7 | 47 | * integration, the LPC17xx cannot wake up in the usual manner from |
<> | 144:ef7eb2e8f9f7 | 48 | * Deep Sleep and Power-down modes. It is recommended not to use these |
<> | 144:ef7eb2e8f9f7 | 49 | * modes during debug. Once an application is downloaded via JTAG/SWD |
<> | 144:ef7eb2e8f9f7 | 50 | * interface, the USB to SWD/JTAG debug adapter (Keil ULINK2 for example) |
<> | 144:ef7eb2e8f9f7 | 51 | * should be removed from the target board, and thereafter, power cycle |
<> | 144:ef7eb2e8f9f7 | 52 | * the LPC17xx to allow wake-up from deep sleep and power-down modes |
<> | 144:ef7eb2e8f9f7 | 53 | * }}} |
<> | 144:ef7eb2e8f9f7 | 54 | * |
<> | 144:ef7eb2e8f9f7 | 55 | * As the interface firmware does not reset the target when a |
<> | 144:ef7eb2e8f9f7 | 56 | * mbed_interface_disconnect() semihosting call is made, the |
<> | 144:ef7eb2e8f9f7 | 57 | * core cannot wake-up from deepsleep. |
<> | 144:ef7eb2e8f9f7 | 58 | * |
<> | 144:ef7eb2e8f9f7 | 59 | * We treat a deepsleep() as a normal sleep(). |
<> | 144:ef7eb2e8f9f7 | 60 | */ |
<> | 144:ef7eb2e8f9f7 | 61 | |
<> | 160:d5399cc887bb | 62 | void hal_deepsleep(void) { |
<> | 144:ef7eb2e8f9f7 | 63 | // ensure debug is disconnected |
<> | 144:ef7eb2e8f9f7 | 64 | #if DEVICE_SEMIHOST |
<> | 144:ef7eb2e8f9f7 | 65 | mbed_interface_disconnect(); |
<> | 144:ef7eb2e8f9f7 | 66 | #endif |
<> | 144:ef7eb2e8f9f7 | 67 | |
<> | 144:ef7eb2e8f9f7 | 68 | // PCON[PD] set to deepsleep |
<> | 144:ef7eb2e8f9f7 | 69 | LPC_PMU->PCON = 0x1; |
<> | 144:ef7eb2e8f9f7 | 70 | |
<> | 144:ef7eb2e8f9f7 | 71 | // SRC[SLEEPDEEP] set to 1 = deep sleep |
<> | 144:ef7eb2e8f9f7 | 72 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
<> | 144:ef7eb2e8f9f7 | 73 | |
<> | 144:ef7eb2e8f9f7 | 74 | // Power up everything after powerdown |
<> | 144:ef7eb2e8f9f7 | 75 | LPC_SYSCON->PDAWAKECFG &= 0xFFFFF800; |
<> | 144:ef7eb2e8f9f7 | 76 | |
<> | 144:ef7eb2e8f9f7 | 77 | // wait for interrupt |
<> | 144:ef7eb2e8f9f7 | 78 | __WFI(); |
<> | 144:ef7eb2e8f9f7 | 79 | } |