Maxim Ibragimov / mbed-dev

mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c

Dependents:   Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay

Fork of mbed-dev by mbed official

targets/TARGET_NXP/TARGET_LPC11UXX/serial_api.c@177:619788de047e, 2017-11-07 (annotated)

Committer:
maxxir
Date:
Tue Nov 07 16:46:29 2017 +0000
Revision:
177:619788de047e
Parent:
149:156823d33999 
To fix broken RTC on Nucleo_F103RB / STM32F103 BluePill etc..;  Used direct RTC register manipulation for STM32F1xx;  rtc_read() && rtc_write()  (native rtc_init() - works good);  also added stub for non-working on STM32F1xx rtc_read_subseconds().

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2013 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 // math.h required for floating point operations for baud rate calculation
<> 144:ef7eb2e8f9f7 17 #include <math.h>
<> 144:ef7eb2e8f9f7 18 #include <string.h>
<> 144:ef7eb2e8f9f7 19 #include <stdlib.h>
<> 144:ef7eb2e8f9f7 20
<> 144:ef7eb2e8f9f7 21 #include "serial_api.h"
<> 144:ef7eb2e8f9f7 22 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 23 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 24 #include "PeripheralPins.h" // For the Peripheral to Pin Definitions found in the individual Target's Platform
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 /******************************************************************************
<> 144:ef7eb2e8f9f7 27 * INITIALIZATION
<> 144:ef7eb2e8f9f7 28 ******************************************************************************/
<> 144:ef7eb2e8f9f7 29 #define UART_NUM 1
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 static uint32_t serial_irq_ids[UART_NUM] = {0};
<> 144:ef7eb2e8f9f7 32 static uart_irq_handler irq_handler;
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 int stdio_uart_inited = 0;
<> 144:ef7eb2e8f9f7 35 serial_t stdio_uart;
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 void serial_init(serial_t *obj, PinName tx, PinName rx) {
<> 144:ef7eb2e8f9f7 38 int is_stdio_uart = 0;
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 // determine the UART to use
<> 144:ef7eb2e8f9f7 41 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
<> 144:ef7eb2e8f9f7 42 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
<> 144:ef7eb2e8f9f7 43 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
<> 144:ef7eb2e8f9f7 44 MBED_ASSERT((int)uart != NC);
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 obj->uart = (LPC_USART_Type *)uart;
<> 144:ef7eb2e8f9f7 47 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 // [TODO] Consider more elegant approach
<> 144:ef7eb2e8f9f7 50 // disconnect USBTX/RX mapping mux, for case when switching ports
<> 144:ef7eb2e8f9f7 51 #ifdef USBTX
<> 144:ef7eb2e8f9f7 52 pin_function(USBTX, 0);
<> 144:ef7eb2e8f9f7 53 pin_function(USBRX, 0);
<> 144:ef7eb2e8f9f7 54 #endif
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 // enable fifos and default rx trigger level
<> 144:ef7eb2e8f9f7 57 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
<> 144:ef7eb2e8f9f7 58 | 0 << 1 // Rx Fifo Reset
<> 144:ef7eb2e8f9f7 59 | 0 << 2 // Tx Fifo Reset
<> 144:ef7eb2e8f9f7 60 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 // disable irqs
<> 144:ef7eb2e8f9f7 63 obj->uart->IER = 0 << 0 // Rx Data available irq enable
<> 144:ef7eb2e8f9f7 64 | 0 << 1 // Tx Fifo empty irq enable
<> 144:ef7eb2e8f9f7 65 | 0 << 2; // Rx Line Status irq enable
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 // set default baud rate and format
<> 144:ef7eb2e8f9f7 68 serial_baud (obj, 9600);
<> 144:ef7eb2e8f9f7 69 serial_format(obj, 8, ParityNone, 1);
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 // pinout the chosen uart
<> 144:ef7eb2e8f9f7 72 pinmap_pinout(tx, PinMap_UART_TX);
<> 144:ef7eb2e8f9f7 73 pinmap_pinout(rx, PinMap_UART_RX);
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 // set rx/tx pins in PullUp mode
<> 144:ef7eb2e8f9f7 76 if (tx != NC) {
<> 144:ef7eb2e8f9f7 77 pin_mode(tx, PullUp);
<> 144:ef7eb2e8f9f7 78 }
<> 144:ef7eb2e8f9f7 79 if (rx != NC) {
<> 144:ef7eb2e8f9f7 80 pin_mode(rx, PullUp);
<> 144:ef7eb2e8f9f7 81 }
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 switch (uart) {
<> 144:ef7eb2e8f9f7 84 case UART_0: obj->index = 0; break;
<> 144:ef7eb2e8f9f7 85 }
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 if (is_stdio_uart) {
<> 144:ef7eb2e8f9f7 90 stdio_uart_inited = 1;
<> 144:ef7eb2e8f9f7 91 memcpy(&stdio_uart, obj, sizeof(serial_t));
<> 144:ef7eb2e8f9f7 92 }
<> 144:ef7eb2e8f9f7 93 }
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 void serial_free(serial_t *obj) {
<> 144:ef7eb2e8f9f7 96 serial_irq_ids[obj->index] = 0;
<> 144:ef7eb2e8f9f7 97 }
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 // serial_baud
<> 144:ef7eb2e8f9f7 100 // set the baud rate, taking in to account the current SystemFrequency
<> 144:ef7eb2e8f9f7 101 void serial_baud(serial_t *obj, int baudrate) {
<> 144:ef7eb2e8f9f7 102 LPC_SYSCON->UARTCLKDIV = 0x1;
<> 144:ef7eb2e8f9f7 103 uint32_t PCLK = SystemCoreClock;
<> 144:ef7eb2e8f9f7 104 // First we check to see if the basic divide with no DivAddVal/MulVal
<> 144:ef7eb2e8f9f7 105 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
<> 144:ef7eb2e8f9f7 106 // MulVal = 1. Otherwise, we search the valid ratio value range to find
<> 144:ef7eb2e8f9f7 107 // the closest match. This could be more elegant, using search methods
<> 144:ef7eb2e8f9f7 108 // and/or lookup tables, but the brute force method is not that much
<> 144:ef7eb2e8f9f7 109 // slower, and is more maintainable.
<> 144:ef7eb2e8f9f7 110 uint16_t DL = PCLK / (16 * baudrate);
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 uint8_t DivAddVal = 0;
<> 144:ef7eb2e8f9f7 113 uint8_t MulVal = 1;
<> 144:ef7eb2e8f9f7 114 int hit = 0;
<> 144:ef7eb2e8f9f7 115 uint16_t dlv;
<> 144:ef7eb2e8f9f7 116 uint8_t mv, dav;
<> 144:ef7eb2e8f9f7 117 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
<> 144:ef7eb2e8f9f7 118 int err_best = baudrate, b;
<> 144:ef7eb2e8f9f7 119 for (mv = 1; mv < 16 && !hit; mv++)
<> 144:ef7eb2e8f9f7 120 {
<> 144:ef7eb2e8f9f7 121 for (dav = 0; dav < mv; dav++)
<> 144:ef7eb2e8f9f7 122 {
<> 144:ef7eb2e8f9f7 123 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
<> 144:ef7eb2e8f9f7 124 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
<> 144:ef7eb2e8f9f7 125 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
<> 144:ef7eb2e8f9f7 126 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
<> 144:ef7eb2e8f9f7 127 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
<> 144:ef7eb2e8f9f7 130 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
<> 144:ef7eb2e8f9f7 131 else // 2 bits headroom, use more precision
<> 144:ef7eb2e8f9f7 132 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
<> 144:ef7eb2e8f9f7 135 if (dlv == 0)
<> 144:ef7eb2e8f9f7 136 dlv = 1;
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 // datasheet says if dav > 0 then DL must be >= 2
<> 144:ef7eb2e8f9f7 139 if ((dav > 0) && (dlv < 2))
<> 144:ef7eb2e8f9f7 140 dlv = 2;
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 // integer rearrangement of the baudrate equation (with rounding)
<> 144:ef7eb2e8f9f7 143 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 // check to see how we went
<> 144:ef7eb2e8f9f7 146 b = abs(b - baudrate);
<> 144:ef7eb2e8f9f7 147 if (b < err_best)
<> 144:ef7eb2e8f9f7 148 {
<> 144:ef7eb2e8f9f7 149 err_best = b;
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 DL = dlv;
<> 144:ef7eb2e8f9f7 152 MulVal = mv;
<> 144:ef7eb2e8f9f7 153 DivAddVal = dav;
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 if (b == baudrate)
<> 144:ef7eb2e8f9f7 156 {
<> 144:ef7eb2e8f9f7 157 hit = 1;
<> 144:ef7eb2e8f9f7 158 break;
<> 144:ef7eb2e8f9f7 159 }
<> 144:ef7eb2e8f9f7 160 }
<> 144:ef7eb2e8f9f7 161 }
<> 144:ef7eb2e8f9f7 162 }
<> 144:ef7eb2e8f9f7 163 }
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 // set LCR[DLAB] to enable writing to divider registers
<> 144:ef7eb2e8f9f7 166 obj->uart->LCR |= (1 << 7);
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 // set divider values
<> 144:ef7eb2e8f9f7 169 obj->uart->DLM = (DL >> 8) & 0xFF;
<> 144:ef7eb2e8f9f7 170 obj->uart->DLL = (DL >> 0) & 0xFF;
<> 144:ef7eb2e8f9f7 171 obj->uart->FDR = (uint32_t) DivAddVal << 0
<> 144:ef7eb2e8f9f7 172 | (uint32_t) MulVal << 4;
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 // clear LCR[DLAB]
<> 144:ef7eb2e8f9f7 175 obj->uart->LCR &= ~(1 << 7);
<> 144:ef7eb2e8f9f7 176 }
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
<> 144:ef7eb2e8f9f7 179 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
<> 144:ef7eb2e8f9f7 180 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits
<> 144:ef7eb2e8f9f7 181 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
<> 144:ef7eb2e8f9f7 182 (parity == ParityForced1) || (parity == ParityForced0));
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 stop_bits -= 1;
<> 144:ef7eb2e8f9f7 185 data_bits -= 5;
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 int parity_enable = 0, parity_select = 0;
<> 144:ef7eb2e8f9f7 188 switch (parity) {
<> 144:ef7eb2e8f9f7 189 case ParityNone: parity_enable = 0; parity_select = 0; break;
<> 144:ef7eb2e8f9f7 190 case ParityOdd : parity_enable = 1; parity_select = 0; break;
<> 144:ef7eb2e8f9f7 191 case ParityEven: parity_enable = 1; parity_select = 1; break;
<> 144:ef7eb2e8f9f7 192 case ParityForced1: parity_enable = 1; parity_select = 2; break;
<> 144:ef7eb2e8f9f7 193 case ParityForced0: parity_enable = 1; parity_select = 3; break;
<> 144:ef7eb2e8f9f7 194 default:
<> 144:ef7eb2e8f9f7 195 break;
<> 144:ef7eb2e8f9f7 196 }
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 obj->uart->LCR = data_bits << 0
<> 144:ef7eb2e8f9f7 199 | stop_bits << 2
<> 144:ef7eb2e8f9f7 200 | parity_enable << 3
<> 144:ef7eb2e8f9f7 201 | parity_select << 4;
<> 144:ef7eb2e8f9f7 202 }
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 /******************************************************************************
<> 144:ef7eb2e8f9f7 205 * INTERRUPTS HANDLING
<> 144:ef7eb2e8f9f7 206 ******************************************************************************/
<> 144:ef7eb2e8f9f7 207 static inline void uart_irq(uint32_t iir, uint32_t index) {
<> 144:ef7eb2e8f9f7 208 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
<> 144:ef7eb2e8f9f7 209 SerialIrq irq_type;
<> 144:ef7eb2e8f9f7 210 switch (iir) {
<> 144:ef7eb2e8f9f7 211 case 1: irq_type = TxIrq; break;
<> 144:ef7eb2e8f9f7 212 case 2: irq_type = RxIrq; break;
<> 144:ef7eb2e8f9f7 213 default: return;
<> 144:ef7eb2e8f9f7 214 }
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216 if (serial_irq_ids[index] != 0)
<> 144:ef7eb2e8f9f7 217 irq_handler(serial_irq_ids[index], irq_type);
<> 144:ef7eb2e8f9f7 218 }
<> 144:ef7eb2e8f9f7 219
<> 144:ef7eb2e8f9f7 220 void uart0_irq() {uart_irq((LPC_USART->IIR >> 1) & 0x7, 0);}
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
<> 144:ef7eb2e8f9f7 223 irq_handler = handler;
<> 144:ef7eb2e8f9f7 224 serial_irq_ids[obj->index] = id;
<> 144:ef7eb2e8f9f7 225 }
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
<> 144:ef7eb2e8f9f7 228 IRQn_Type irq_n = (IRQn_Type)0;
<> 144:ef7eb2e8f9f7 229 uint32_t vector = 0;
<> 144:ef7eb2e8f9f7 230 switch ((int)obj->uart) {
<> 144:ef7eb2e8f9f7 231 case UART_0: irq_n=UART_IRQn ; vector = (uint32_t)&uart0_irq; break;
<> 144:ef7eb2e8f9f7 232 }
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 if (enable) {
<> 144:ef7eb2e8f9f7 235 obj->uart->IER |= 1 << irq;
<> 144:ef7eb2e8f9f7 236 NVIC_SetVector(irq_n, vector);
<> 144:ef7eb2e8f9f7 237 NVIC_EnableIRQ(irq_n);
<> 144:ef7eb2e8f9f7 238 } else { // disable
<> 144:ef7eb2e8f9f7 239 int all_disabled = 0;
<> 144:ef7eb2e8f9f7 240 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 obj->uart->IER &= ~(1 << irq);
<> 144:ef7eb2e8f9f7 243 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
<> 144:ef7eb2e8f9f7 244
<> 144:ef7eb2e8f9f7 245 if (all_disabled)
<> 144:ef7eb2e8f9f7 246 NVIC_DisableIRQ(irq_n);
<> 144:ef7eb2e8f9f7 247 }
<> 144:ef7eb2e8f9f7 248 }
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 /******************************************************************************
<> 144:ef7eb2e8f9f7 251 * READ/WRITE
<> 144:ef7eb2e8f9f7 252 ******************************************************************************/
<> 144:ef7eb2e8f9f7 253 int serial_getc(serial_t *obj) {
<> 144:ef7eb2e8f9f7 254 while (!serial_readable(obj));
<> 144:ef7eb2e8f9f7 255 return obj->uart->RBR;
<> 144:ef7eb2e8f9f7 256 }
<> 144:ef7eb2e8f9f7 257
<> 144:ef7eb2e8f9f7 258 void serial_putc(serial_t *obj, int c) {
<> 144:ef7eb2e8f9f7 259 while (!serial_writable(obj));
<> 144:ef7eb2e8f9f7 260 obj->uart->THR = c;
<> 144:ef7eb2e8f9f7 261 }
<> 144:ef7eb2e8f9f7 262
<> 144:ef7eb2e8f9f7 263 int serial_readable(serial_t *obj) {
<> 144:ef7eb2e8f9f7 264 return obj->uart->LSR & 0x01;
<> 144:ef7eb2e8f9f7 265 }
<> 144:ef7eb2e8f9f7 266
<> 144:ef7eb2e8f9f7 267 int serial_writable(serial_t *obj) {
<> 144:ef7eb2e8f9f7 268 return obj->uart->LSR & 0x20;
<> 144:ef7eb2e8f9f7 269 }
<> 144:ef7eb2e8f9f7 270
<> 144:ef7eb2e8f9f7 271 void serial_clear(serial_t *obj) {
<> 144:ef7eb2e8f9f7 272 obj->uart->FCR = 1 << 1 // rx FIFO reset
<> 144:ef7eb2e8f9f7 273 | 1 << 2 // tx FIFO reset
<> 144:ef7eb2e8f9f7 274 | 0 << 6; // interrupt depth
<> 144:ef7eb2e8f9f7 275 }
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 void serial_pinout_tx(PinName tx) {
<> 144:ef7eb2e8f9f7 278 pinmap_pinout(tx, PinMap_UART_TX);
<> 144:ef7eb2e8f9f7 279 }
<> 144:ef7eb2e8f9f7 280
<> 144:ef7eb2e8f9f7 281 void serial_break_set(serial_t *obj) {
<> 144:ef7eb2e8f9f7 282 obj->uart->LCR |= (1 << 6);
<> 144:ef7eb2e8f9f7 283 }
<> 144:ef7eb2e8f9f7 284
<> 144:ef7eb2e8f9f7 285 void serial_break_clear(serial_t *obj) {
<> 144:ef7eb2e8f9f7 286 obj->uart->LCR &= ~(1 << 6);
<> 144:ef7eb2e8f9f7 287 }
<> 144:ef7eb2e8f9f7 288