Maxim Ibragimov / mbed-dev

mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c

Dependents:   Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay

Fork of mbed-dev by mbed official

targets/TARGET_Maxim/TARGET_MAX32630/serial_api.c@177:619788de047e, 2017-11-07 (annotated)

Committer:
maxxir
Date:
Tue Nov 07 16:46:29 2017 +0000
Revision:
177:619788de047e
Parent:
170:19eb464bc2be 
To fix broken RTC on Nucleo_F103RB / STM32F103 BluePill etc..;  Used direct RTC register manipulation for STM32F1xx;  rtc_read() && rtc_write()  (native rtc_init() - works good);  also added stub for non-working on STM32F1xx rtc_read_subseconds().

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 157:ff67d9f36b67 1 /*******************************************************************************
<> 157:ff67d9f36b67 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 157:ff67d9f36b67 3 *
<> 157:ff67d9f36b67 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 157:ff67d9f36b67 5 * copy of this software and associated documentation files (the "Software"),
<> 157:ff67d9f36b67 6 * to deal in the Software without restriction, including without limitation
<> 157:ff67d9f36b67 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 157:ff67d9f36b67 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 157:ff67d9f36b67 9 * Software is furnished to do so, subject to the following conditions:
<> 157:ff67d9f36b67 10 *
<> 157:ff67d9f36b67 11 * The above copyright notice and this permission notice shall be included
<> 157:ff67d9f36b67 12 * in all copies or substantial portions of the Software.
<> 157:ff67d9f36b67 13 *
<> 157:ff67d9f36b67 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 157:ff67d9f36b67 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 157:ff67d9f36b67 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 157:ff67d9f36b67 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 157:ff67d9f36b67 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 157:ff67d9f36b67 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 157:ff67d9f36b67 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 157:ff67d9f36b67 21 *
<> 157:ff67d9f36b67 22 * Except as contained in this notice, the name of Maxim Integrated
<> 157:ff67d9f36b67 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 157:ff67d9f36b67 24 * Products, Inc. Branding Policy.
<> 157:ff67d9f36b67 25 *
<> 157:ff67d9f36b67 26 * The mere transfer of this software does not imply any licenses
<> 157:ff67d9f36b67 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 157:ff67d9f36b67 28 * trademarks, maskwork rights, or any other form of intellectual
<> 157:ff67d9f36b67 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 157:ff67d9f36b67 30 * ownership rights.
<> 157:ff67d9f36b67 31 *******************************************************************************
<> 157:ff67d9f36b67 32 */
<> 157:ff67d9f36b67 33
<> 157:ff67d9f36b67 34 #include <string.h>
<> 157:ff67d9f36b67 35 #include "mbed_assert.h"
<> 157:ff67d9f36b67 36 #include "cmsis.h"
<> 157:ff67d9f36b67 37 #include "serial_api.h"
<> 157:ff67d9f36b67 38 #include "gpio_api.h"
<> 157:ff67d9f36b67 39 #include "uart.h"
<> 157:ff67d9f36b67 40 #include "uart_regs.h"
<> 157:ff67d9f36b67 41 #include "ioman_regs.h"
<> 157:ff67d9f36b67 42 #include "PeripheralPins.h"
<> 157:ff67d9f36b67 43
<> 157:ff67d9f36b67 44 #define DEFAULT_BAUD 9600
<> 157:ff67d9f36b67 45
<> 157:ff67d9f36b67 46 #define UART_ERRORS (MXC_F_UART_INTFL_RX_FRAMING_ERR | \
<> 157:ff67d9f36b67 47 MXC_F_UART_INTFL_RX_PARITY_ERR | \
<> 157:ff67d9f36b67 48 MXC_F_UART_INTFL_RX_FIFO_OVERFLOW)
<> 157:ff67d9f36b67 49
<> 157:ff67d9f36b67 50 // Variables for managing the stdio UART
<> 157:ff67d9f36b67 51 int stdio_uart_inited = 0;
<> 157:ff67d9f36b67 52 serial_t stdio_uart = {0};
<> 157:ff67d9f36b67 53
<> 157:ff67d9f36b67 54 // Variables for interrupt driven
<> 157:ff67d9f36b67 55 static uart_irq_handler irq_handler;
<> 157:ff67d9f36b67 56 static serial_t *objs[MXC_CFG_UART_INSTANCES];
<> 157:ff67d9f36b67 57
<> 157:ff67d9f36b67 58 static void usurp_pin(PinName, int);
<> 157:ff67d9f36b67 59
<> 157:ff67d9f36b67 60 //******************************************************************************
<> 157:ff67d9f36b67 61 void serial_init(serial_t *obj, PinName tx, PinName rx)
<> 157:ff67d9f36b67 62 {
<> 157:ff67d9f36b67 63 // Determine which uart is associated with each pin
<> 157:ff67d9f36b67 64 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
<> 157:ff67d9f36b67 65 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
<> 157:ff67d9f36b67 66 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
<> 157:ff67d9f36b67 67
<> 157:ff67d9f36b67 68 // Make sure that both pins are pointing to the same uart
<> 157:ff67d9f36b67 69 MBED_ASSERT(uart != (UARTName)NC);
<> 157:ff67d9f36b67 70
<> 157:ff67d9f36b67 71 // Set the obj pointer to the proper uart
<> 157:ff67d9f36b67 72 obj->uart = (mxc_uart_regs_t*)uart;
<> 157:ff67d9f36b67 73
<> 157:ff67d9f36b67 74 // Set the uart index
<> 157:ff67d9f36b67 75 obj->index = MXC_UART_GET_IDX(obj->uart);
<> 157:ff67d9f36b67 76 obj->fifo = (mxc_uart_fifo_regs_t*)MXC_UART_GET_BASE_FIFO(obj->index);
<> 157:ff67d9f36b67 77
<> 157:ff67d9f36b67 78 // Record the pins requested
<> 157:ff67d9f36b67 79 obj->tx = tx;
<> 157:ff67d9f36b67 80 obj->rx = rx;
<> 157:ff67d9f36b67 81
<> 157:ff67d9f36b67 82 // Merge pin function requests for use with CMSIS init func
<> 157:ff67d9f36b67 83 ioman_req_t io_req = {0};
<> 157:ff67d9f36b67 84 pin_function_t *pin_func = NULL;
<> 157:ff67d9f36b67 85 if (tx != NC) {
<> 157:ff67d9f36b67 86 pin_func = (pin_function_t *)pinmap_find_function(tx, PinMap_UART_TX);
<> 157:ff67d9f36b67 87 io_req.value = pin_func->req_val;
<> 157:ff67d9f36b67 88 }
<> 157:ff67d9f36b67 89 if (rx != NC) {
<> 157:ff67d9f36b67 90 pin_func = (pin_function_t *)pinmap_find_function(rx, PinMap_UART_RX);
<> 157:ff67d9f36b67 91 io_req.value |= pin_func->req_val;
<> 157:ff67d9f36b67 92 }
<> 157:ff67d9f36b67 93
<> 157:ff67d9f36b67 94 // Using req and ack pointers of last pin function lookup
<> 157:ff67d9f36b67 95 obj->sys_cfg.io_cfg.req_reg = pin_func->reg_req;
<> 157:ff67d9f36b67 96 obj->sys_cfg.io_cfg.ack_reg = pin_func->reg_ack;
<> 157:ff67d9f36b67 97 obj->sys_cfg.io_cfg.req_val = io_req;
<> 157:ff67d9f36b67 98 obj->sys_cfg.clk_scale = CLKMAN_SCALE_DIV_8;
<> 157:ff67d9f36b67 99
<> 157:ff67d9f36b67 100 // Configure the UART with default parameters
<> 157:ff67d9f36b67 101 obj->cfg.extra_stop = 0;
<> 157:ff67d9f36b67 102 obj->cfg.cts = 0;
<> 157:ff67d9f36b67 103 obj->cfg.rts = 0;
<> 157:ff67d9f36b67 104 obj->cfg.baud = DEFAULT_BAUD;
<> 157:ff67d9f36b67 105 obj->cfg.size = UART_DATA_SIZE_8_BITS;
<> 157:ff67d9f36b67 106 obj->cfg.parity = UART_PARITY_DISABLE;
<> 157:ff67d9f36b67 107
<> 157:ff67d9f36b67 108 // Manage stdio UART
<> 157:ff67d9f36b67 109 if (uart == STDIO_UART) {
<> 157:ff67d9f36b67 110 stdio_uart_inited = 1;
<> 157:ff67d9f36b67 111 stdio_uart = *obj;
<> 157:ff67d9f36b67 112 }
<> 157:ff67d9f36b67 113
<> 157:ff67d9f36b67 114 int retval = UART_Init(obj->uart, &obj->cfg, &obj->sys_cfg);
<> 157:ff67d9f36b67 115 MBED_ASSERT(retval == E_NO_ERROR);
<> 157:ff67d9f36b67 116 }
<> 157:ff67d9f36b67 117
<> 157:ff67d9f36b67 118 //******************************************************************************
<> 157:ff67d9f36b67 119 void serial_baud(serial_t *obj, int baudrate)
<> 157:ff67d9f36b67 120 {
<> 157:ff67d9f36b67 121 obj->cfg.baud = baudrate;
<> 157:ff67d9f36b67 122 int retval = UART_Init(obj->uart, &obj->cfg, &obj->sys_cfg);
<> 157:ff67d9f36b67 123 MBED_ASSERT(retval == E_NO_ERROR);
<> 157:ff67d9f36b67 124 }
<> 157:ff67d9f36b67 125
<> 157:ff67d9f36b67 126 //******************************************************************************
<> 157:ff67d9f36b67 127 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
<> 157:ff67d9f36b67 128 {
<> 157:ff67d9f36b67 129 switch (data_bits) {
<> 157:ff67d9f36b67 130 case 5:
<> 157:ff67d9f36b67 131 obj->cfg.size = UART_DATA_SIZE_5_BITS;
<> 157:ff67d9f36b67 132 break;
<> 157:ff67d9f36b67 133 case 6:
<> 157:ff67d9f36b67 134 obj->cfg.size = UART_DATA_SIZE_6_BITS;
<> 157:ff67d9f36b67 135 break;
<> 157:ff67d9f36b67 136 case 7:
<> 157:ff67d9f36b67 137 obj->cfg.size = UART_DATA_SIZE_7_BITS;
<> 157:ff67d9f36b67 138 break;
<> 157:ff67d9f36b67 139 case 8:
<> 157:ff67d9f36b67 140 obj->cfg.size = UART_DATA_SIZE_8_BITS;
<> 157:ff67d9f36b67 141 break;
<> 157:ff67d9f36b67 142 default:
<> 157:ff67d9f36b67 143 MBED_ASSERT(0);
<> 157:ff67d9f36b67 144 break;
<> 157:ff67d9f36b67 145 }
<> 157:ff67d9f36b67 146
<> 157:ff67d9f36b67 147 switch (parity) {
<> 157:ff67d9f36b67 148 case ParityNone:
<> 157:ff67d9f36b67 149 obj->cfg.parity = UART_PARITY_DISABLE;
<> 157:ff67d9f36b67 150 break;
<> 157:ff67d9f36b67 151 case ParityOdd :
<> 157:ff67d9f36b67 152 obj->cfg.parity = UART_PARITY_ODD;
<> 157:ff67d9f36b67 153 break;
<> 157:ff67d9f36b67 154 case ParityEven:
<> 157:ff67d9f36b67 155 obj->cfg.parity = UART_PARITY_EVEN;
<> 157:ff67d9f36b67 156 break;
<> 157:ff67d9f36b67 157 case ParityForced1:
<> 157:ff67d9f36b67 158 case ParityForced0:
<> 157:ff67d9f36b67 159 default:
<> 157:ff67d9f36b67 160 MBED_ASSERT(0);
<> 157:ff67d9f36b67 161 break;
<> 157:ff67d9f36b67 162 }
<> 157:ff67d9f36b67 163
<> 157:ff67d9f36b67 164 switch (stop_bits) {
<> 157:ff67d9f36b67 165 case 1:
<> 157:ff67d9f36b67 166 obj->cfg.extra_stop = 0;
<> 157:ff67d9f36b67 167 break;
<> 157:ff67d9f36b67 168 case 2:
<> 157:ff67d9f36b67 169 obj->cfg.extra_stop = 1;
<> 157:ff67d9f36b67 170 break;
<> 157:ff67d9f36b67 171 default:
<> 157:ff67d9f36b67 172 MBED_ASSERT(0);
<> 157:ff67d9f36b67 173 break;
<> 157:ff67d9f36b67 174 }
<> 157:ff67d9f36b67 175
<> 157:ff67d9f36b67 176 int retval = UART_Init(obj->uart, &obj->cfg, NULL);
<> 157:ff67d9f36b67 177 MBED_ASSERT(retval == E_NO_ERROR);
<> 157:ff67d9f36b67 178 }
<> 157:ff67d9f36b67 179
<> 157:ff67d9f36b67 180 //******************************************************************************
<> 157:ff67d9f36b67 181 void uart_handler(serial_t *obj)
<> 157:ff67d9f36b67 182 {
Kojto 170:19eb464bc2be 183 // clear interrupts
Kojto 170:19eb464bc2be 184 volatile uint32_t flags = obj->uart->intfl;
Kojto 170:19eb464bc2be 185 obj->uart->intfl = flags;
Kojto 170:19eb464bc2be 186
<> 157:ff67d9f36b67 187 if (obj && obj->id) {
<> 157:ff67d9f36b67 188 irq_handler(obj->id, RxIrq);
<> 157:ff67d9f36b67 189 }
<> 157:ff67d9f36b67 190 }
<> 157:ff67d9f36b67 191
<> 157:ff67d9f36b67 192 void uart0_handler(void) { uart_handler(objs[0]); }
<> 157:ff67d9f36b67 193 void uart1_handler(void) { uart_handler(objs[1]); }
<> 157:ff67d9f36b67 194 void uart2_handler(void) { uart_handler(objs[2]); }
<> 157:ff67d9f36b67 195 void uart3_handler(void) { uart_handler(objs[3]); }
<> 157:ff67d9f36b67 196
<> 157:ff67d9f36b67 197 //******************************************************************************
<> 157:ff67d9f36b67 198 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
<> 157:ff67d9f36b67 199 {
<> 157:ff67d9f36b67 200 irq_handler = handler;
<> 157:ff67d9f36b67 201 obj->id = id;
<> 157:ff67d9f36b67 202 }
<> 157:ff67d9f36b67 203
<> 157:ff67d9f36b67 204 //******************************************************************************
<> 157:ff67d9f36b67 205 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
<> 157:ff67d9f36b67 206 {
Kojto 170:19eb464bc2be 207 MBED_ASSERT(obj->index < MXC_CFG_UART_INSTANCES);
Kojto 170:19eb464bc2be 208 objs[obj->index] = obj;
Kojto 170:19eb464bc2be 209
<> 157:ff67d9f36b67 210 switch (obj->index) {
<> 157:ff67d9f36b67 211 case 0:
AnnaBridge 165:e614a9f1c9e2 212 NVIC_SetVector(UART0_IRQn, (uint32_t)uart0_handler);
<> 157:ff67d9f36b67 213 NVIC_EnableIRQ(UART0_IRQn);
<> 157:ff67d9f36b67 214 break;
<> 157:ff67d9f36b67 215 case 1:
AnnaBridge 165:e614a9f1c9e2 216 NVIC_SetVector(UART1_IRQn, (uint32_t)uart1_handler);
<> 157:ff67d9f36b67 217 NVIC_EnableIRQ(UART1_IRQn);
<> 157:ff67d9f36b67 218 break;
<> 157:ff67d9f36b67 219 case 2:
AnnaBridge 165:e614a9f1c9e2 220 NVIC_SetVector(UART2_IRQn, (uint32_t)uart2_handler);
<> 157:ff67d9f36b67 221 NVIC_EnableIRQ(UART2_IRQn);
<> 157:ff67d9f36b67 222 break;
<> 157:ff67d9f36b67 223 case 3:
AnnaBridge 165:e614a9f1c9e2 224 NVIC_SetVector(UART3_IRQn, (uint32_t)uart3_handler);
<> 157:ff67d9f36b67 225 NVIC_EnableIRQ(UART3_IRQn);
<> 157:ff67d9f36b67 226 break;
<> 157:ff67d9f36b67 227 default:
<> 157:ff67d9f36b67 228 MBED_ASSERT(0);
<> 157:ff67d9f36b67 229 }
<> 157:ff67d9f36b67 230
<> 157:ff67d9f36b67 231 if (irq == RxIrq) {
<> 157:ff67d9f36b67 232 // Enable RX FIFO Threshold Interrupt
<> 157:ff67d9f36b67 233 if (enable) {
<> 157:ff67d9f36b67 234 // Clear pending interrupts
<> 157:ff67d9f36b67 235 obj->uart->intfl = obj->uart->intfl;
<> 157:ff67d9f36b67 236 obj->uart->inten |= (MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY | UART_ERRORS);
<> 157:ff67d9f36b67 237 } else {
<> 157:ff67d9f36b67 238 // Clear pending interrupts
<> 157:ff67d9f36b67 239 obj->uart->intfl = obj->uart->intfl;
<> 157:ff67d9f36b67 240 obj->uart->inten &= ~(MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY | UART_ERRORS);
<> 157:ff67d9f36b67 241 }
<> 157:ff67d9f36b67 242 } else if (irq == TxIrq) {
<> 157:ff67d9f36b67 243 // Set TX Almost Empty level to interrupt when empty
<> 157:ff67d9f36b67 244 MXC_SET_FIELD(&obj->uart->tx_fifo_ctrl, MXC_F_UART_RX_FIFO_CTRL_FIFO_AF_LVL,
<> 157:ff67d9f36b67 245 (MXC_UART_FIFO_DEPTH - 1) << MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL_POS);
<> 157:ff67d9f36b67 246
<> 157:ff67d9f36b67 247 // Enable TX Almost Empty Interrupt
<> 157:ff67d9f36b67 248 if (enable) {
<> 157:ff67d9f36b67 249 // Clear pending interrupts
<> 157:ff67d9f36b67 250 obj->uart->intfl = obj->uart->intfl;
<> 157:ff67d9f36b67 251 obj->uart->inten |= MXC_F_UART_INTFL_TX_FIFO_AE;
<> 157:ff67d9f36b67 252 } else {
<> 157:ff67d9f36b67 253 // Clear pending interrupts
<> 157:ff67d9f36b67 254 obj->uart->intfl = obj->uart->intfl;
<> 157:ff67d9f36b67 255 obj->uart->inten &= ~MXC_F_UART_INTFL_TX_FIFO_AE;
<> 157:ff67d9f36b67 256 }
<> 157:ff67d9f36b67 257 } else {
<> 157:ff67d9f36b67 258 MBED_ASSERT(0);
<> 157:ff67d9f36b67 259 }
<> 157:ff67d9f36b67 260 }
<> 157:ff67d9f36b67 261
<> 157:ff67d9f36b67 262 //******************************************************************************
<> 157:ff67d9f36b67 263 int serial_getc(serial_t *obj)
<> 157:ff67d9f36b67 264 {
<> 157:ff67d9f36b67 265 int c = -1;
<> 157:ff67d9f36b67 266
<> 157:ff67d9f36b67 267 if (obj->rx != NC) {
<> 157:ff67d9f36b67 268 // Wait for data to be available
<> 157:ff67d9f36b67 269 while ((obj->uart->rx_fifo_ctrl & MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY) == 0);
<> 157:ff67d9f36b67 270
<> 157:ff67d9f36b67 271 c = obj->fifo->rx;
<> 157:ff67d9f36b67 272 }
<> 157:ff67d9f36b67 273
<> 157:ff67d9f36b67 274 return c;
<> 157:ff67d9f36b67 275 }
<> 157:ff67d9f36b67 276
<> 157:ff67d9f36b67 277 //******************************************************************************
<> 157:ff67d9f36b67 278 void serial_putc(serial_t *obj, int c)
<> 157:ff67d9f36b67 279 {
<> 157:ff67d9f36b67 280 if (obj->tx != NC) {
<> 157:ff67d9f36b67 281 // Wait for room in the FIFO without blocking interrupts.
<> 157:ff67d9f36b67 282 while (UART_NumWriteAvail(obj->uart) == 0);
<> 157:ff67d9f36b67 283
<> 157:ff67d9f36b67 284 // Must clear before every write to the buffer to know that the FIFO
<> 157:ff67d9f36b67 285 // is empty when the TX DONE bit is set
<> 157:ff67d9f36b67 286 obj->uart->intfl = MXC_F_UART_INTFL_TX_DONE;
<> 157:ff67d9f36b67 287 obj->fifo->tx = (uint8_t)c;
<> 157:ff67d9f36b67 288 }
<> 157:ff67d9f36b67 289 }
<> 157:ff67d9f36b67 290
<> 157:ff67d9f36b67 291 //******************************************************************************
<> 157:ff67d9f36b67 292 int serial_readable(serial_t *obj)
<> 157:ff67d9f36b67 293 {
<> 157:ff67d9f36b67 294 return UART_NumReadAvail(obj->uart);
<> 157:ff67d9f36b67 295 }
<> 157:ff67d9f36b67 296
<> 157:ff67d9f36b67 297 //******************************************************************************
<> 157:ff67d9f36b67 298 int serial_writable(serial_t *obj)
<> 157:ff67d9f36b67 299 {
<> 157:ff67d9f36b67 300 return UART_NumWriteAvail(obj->uart);
<> 157:ff67d9f36b67 301 }
<> 157:ff67d9f36b67 302
<> 157:ff67d9f36b67 303 //******************************************************************************
<> 157:ff67d9f36b67 304 void serial_clear(serial_t *obj)
<> 157:ff67d9f36b67 305 {
<> 157:ff67d9f36b67 306 // Clear the RX and TX FIFOs
<> 157:ff67d9f36b67 307 UART_DrainRX(obj->uart);
<> 157:ff67d9f36b67 308 UART_DrainTX(obj->uart);
<> 157:ff67d9f36b67 309 }
<> 157:ff67d9f36b67 310
<> 157:ff67d9f36b67 311 //******************************************************************************
<> 157:ff67d9f36b67 312 void serial_break_set(serial_t *obj)
<> 157:ff67d9f36b67 313 {
<> 157:ff67d9f36b67 314 // Make sure that nothing is being sent
<> 157:ff67d9f36b67 315 while (((obj->uart->tx_fifo_ctrl & MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY)
<> 157:ff67d9f36b67 316 >> MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY_POS) > 0);
<> 157:ff67d9f36b67 317 while (!(obj->uart->intfl & MXC_F_UART_INTFL_TX_DONE));
<> 157:ff67d9f36b67 318
<> 157:ff67d9f36b67 319 // Configure TX to output 0
<> 157:ff67d9f36b67 320 usurp_pin(obj->tx, 0);
<> 157:ff67d9f36b67 321
<> 157:ff67d9f36b67 322 // GPIO is setup now, but we need to unmap UART from the pin
<> 157:ff67d9f36b67 323 pin_function_t *pin_func = (pin_function_t *)pinmap_find_function(obj->tx, PinMap_UART_TX);
<> 157:ff67d9f36b67 324 *pin_func->reg_req &= ~MXC_F_IOMAN_UART_REQ_IO_REQ;
<> 157:ff67d9f36b67 325 MBED_ASSERT((*pin_func->reg_ack & MXC_F_IOMAN_UART_ACK_IO_ACK) == 0);
<> 157:ff67d9f36b67 326 }
<> 157:ff67d9f36b67 327
<> 157:ff67d9f36b67 328 //******************************************************************************
<> 157:ff67d9f36b67 329 void serial_break_clear(serial_t *obj)
<> 157:ff67d9f36b67 330 {
<> 157:ff67d9f36b67 331 // Configure TX to output 1
<> 157:ff67d9f36b67 332 usurp_pin(obj->tx, 1);
<> 157:ff67d9f36b67 333 // Return TX to UART control
<> 157:ff67d9f36b67 334 serial_pinout_tx(obj->tx);
<> 157:ff67d9f36b67 335 }
<> 157:ff67d9f36b67 336
<> 157:ff67d9f36b67 337 //******************************************************************************
<> 157:ff67d9f36b67 338 void serial_pinout_tx(PinName tx)
<> 157:ff67d9f36b67 339 {
<> 157:ff67d9f36b67 340 pinmap_pinout(tx, PinMap_UART_TX);
<> 157:ff67d9f36b67 341 }
<> 157:ff67d9f36b67 342
<> 157:ff67d9f36b67 343 //******************************************************************************
<> 157:ff67d9f36b67 344 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
<> 157:ff67d9f36b67 345 {
<> 157:ff67d9f36b67 346 pin_function_t rtscts_pin_func = {0};
<> 157:ff67d9f36b67 347
<> 157:ff67d9f36b67 348 obj->cfg.cts = 0;
<> 157:ff67d9f36b67 349 obj->cfg.rts = 0;
<> 157:ff67d9f36b67 350
<> 157:ff67d9f36b67 351 if ((FlowControlCTS == type) || (FlowControlRTSCTS == type)) {
<> 157:ff67d9f36b67 352 UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
<> 157:ff67d9f36b67 353 UARTName uart = (UARTName)pinmap_merge(uart_cts, (UARTName)obj->uart);
<> 157:ff67d9f36b67 354 // Assert pin is usable with existing uart
<> 157:ff67d9f36b67 355 MBED_ASSERT(uart != (UARTName)NC);
<> 157:ff67d9f36b67 356
<> 157:ff67d9f36b67 357 pin_function_t *pin_func;
<> 157:ff67d9f36b67 358 pin_func = (pin_function_t *)pinmap_find_function(txflow, PinMap_UART_CTS);
<> 157:ff67d9f36b67 359 rtscts_pin_func.req_val |= pin_func->req_val;
<> 157:ff67d9f36b67 360
<> 157:ff67d9f36b67 361 obj->cfg.cts = 1;
<> 157:ff67d9f36b67 362 }
<> 157:ff67d9f36b67 363
<> 157:ff67d9f36b67 364 if ((FlowControlRTS == type) || (FlowControlRTSCTS == type)) {
<> 157:ff67d9f36b67 365 UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
<> 157:ff67d9f36b67 366 UARTName uart = (UARTName)pinmap_merge(uart_rts, (UARTName)obj->uart);
<> 157:ff67d9f36b67 367 MBED_ASSERT(uart != (UARTName)NC);
<> 157:ff67d9f36b67 368
<> 157:ff67d9f36b67 369 pin_function_t *pin_func;
<> 157:ff67d9f36b67 370 pin_func = (pin_function_t *)pinmap_find_function(rxflow, PinMap_UART_RTS);
<> 157:ff67d9f36b67 371 rtscts_pin_func.req_val |= pin_func->req_val;
<> 157:ff67d9f36b67 372
<> 157:ff67d9f36b67 373 obj->cfg.rts = 1;
<> 157:ff67d9f36b67 374 }
<> 157:ff67d9f36b67 375
<> 157:ff67d9f36b67 376 obj->sys_cfg.io_cfg.req_val.value |= rtscts_pin_func.req_val;
<> 157:ff67d9f36b67 377
<> 157:ff67d9f36b67 378 int retval = UART_Init(obj->uart, &obj->cfg, &obj->sys_cfg);
<> 157:ff67d9f36b67 379 MBED_ASSERT(retval == E_NO_ERROR);
<> 157:ff67d9f36b67 380 }
<> 157:ff67d9f36b67 381
<> 157:ff67d9f36b67 382 //******************************************************************************
<> 157:ff67d9f36b67 383 static void usurp_pin(PinName pin, int state)
<> 157:ff67d9f36b67 384 {
<> 157:ff67d9f36b67 385 gpio_t gpio;
<> 157:ff67d9f36b67 386 gpio_init_out(&gpio, pin);
<> 157:ff67d9f36b67 387 gpio_write(&gpio, state);
<> 157:ff67d9f36b67 388 }