Maxim Ibragimov / mbed-dev

mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c

Dependents:   Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay

Fork of mbed-dev by mbed official

targets/TARGET_Maxim/TARGET_MAX32630/mxc/wdt.c@177:619788de047e, 2017-11-07 (annotated)

Committer:
maxxir
Date:
Tue Nov 07 16:46:29 2017 +0000
Revision:
177:619788de047e
Parent:
157:ff67d9f36b67 
To fix broken RTC on Nucleo_F103RB / STM32F103 BluePill etc..;  Used direct RTC register manipulation for STM32F1xx;  rtc_read() && rtc_write()  (native rtc_init() - works good);  also added stub for non-working on STM32F1xx rtc_read_subseconds().

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 157:ff67d9f36b67 1 /**
<> 157:ff67d9f36b67 2 * @file
<> 157:ff67d9f36b67 3 * @brief Watchdog driver source.
<> 157:ff67d9f36b67 4 */
<> 157:ff67d9f36b67 5 /* *****************************************************************************
<> 157:ff67d9f36b67 6 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 157:ff67d9f36b67 7 *
<> 157:ff67d9f36b67 8 * Permission is hereby granted, free of charge, to any person obtaining a
<> 157:ff67d9f36b67 9 * copy of this software and associated documentation files (the "Software"),
<> 157:ff67d9f36b67 10 * to deal in the Software without restriction, including without limitation
<> 157:ff67d9f36b67 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 157:ff67d9f36b67 12 * and/or sell copies of the Software, and to permit persons to whom the
<> 157:ff67d9f36b67 13 * Software is furnished to do so, subject to the following conditions:
<> 157:ff67d9f36b67 14 *
<> 157:ff67d9f36b67 15 * The above copyright notice and this permission notice shall be included
<> 157:ff67d9f36b67 16 * in all copies or substantial portions of the Software.
<> 157:ff67d9f36b67 17 *
<> 157:ff67d9f36b67 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 157:ff67d9f36b67 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 157:ff67d9f36b67 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 157:ff67d9f36b67 21 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 157:ff67d9f36b67 22 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 157:ff67d9f36b67 23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 157:ff67d9f36b67 24 * OTHER DEALINGS IN THE SOFTWARE.
<> 157:ff67d9f36b67 25 *
<> 157:ff67d9f36b67 26 * Except as contained in this notice, the name of Maxim Integrated
<> 157:ff67d9f36b67 27 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 157:ff67d9f36b67 28 * Products, Inc. Branding Policy.
<> 157:ff67d9f36b67 29 *
<> 157:ff67d9f36b67 30 * The mere transfer of this software does not imply any licenses
<> 157:ff67d9f36b67 31 * of trade secrets, proprietary technology, copyrights, patents,
<> 157:ff67d9f36b67 32 * trademarks, maskwork rights, or any other form of intellectual
<> 157:ff67d9f36b67 33 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 157:ff67d9f36b67 34 * ownership rights.
<> 157:ff67d9f36b67 35 *
<> 157:ff67d9f36b67 36 * $Date: 2016-09-08 17:27:05 -0500 (Thu, 08 Sep 2016) $
<> 157:ff67d9f36b67 37 * $Revision: 24321 $
<> 157:ff67d9f36b67 38 *
<> 157:ff67d9f36b67 39 **************************************************************************** */
<> 157:ff67d9f36b67 40
<> 157:ff67d9f36b67 41 /* **** Includes **** */
<> 157:ff67d9f36b67 42 #include <stddef.h>
<> 157:ff67d9f36b67 43 #include "wdt.h"
<> 157:ff67d9f36b67 44 /**
<> 157:ff67d9f36b67 45 * @ingroup wdt
<> 157:ff67d9f36b67 46 * @{
<> 157:ff67d9f36b67 47 */
<> 157:ff67d9f36b67 48 static uint32_t interruptEnable = 0; //keeps track to interrupts to enable in start function
<> 157:ff67d9f36b67 49
<> 157:ff67d9f36b67 50 /* ************************************************************************* */
<> 157:ff67d9f36b67 51 int WDT_Init(mxc_wdt_regs_t *wdt, const sys_cfg_wdt_t *cfg, uint8_t unlock_key)
<> 157:ff67d9f36b67 52 {
<> 157:ff67d9f36b67 53 if ((wdt == NULL) || (cfg == NULL))
<> 157:ff67d9f36b67 54 return E_NULL_PTR;
<> 157:ff67d9f36b67 55
<> 157:ff67d9f36b67 56 //setup watchdog clock
<> 157:ff67d9f36b67 57 SYS_WDT_Init(wdt, cfg);
<> 157:ff67d9f36b67 58
<> 157:ff67d9f36b67 59 //unlock ctrl to be writable
<> 157:ff67d9f36b67 60 wdt->lock_ctrl = unlock_key;
<> 157:ff67d9f36b67 61
<> 157:ff67d9f36b67 62 //check to make sure it unlocked
<> 157:ff67d9f36b67 63 if (wdt->lock_ctrl & 0x01)
<> 157:ff67d9f36b67 64 return E_BAD_STATE;
<> 157:ff67d9f36b67 65
<> 157:ff67d9f36b67 66 //disable all interrupts
<> 157:ff67d9f36b67 67 interruptEnable = 0;
<> 157:ff67d9f36b67 68 wdt->enable = interruptEnable;
<> 157:ff67d9f36b67 69
<> 157:ff67d9f36b67 70 //enable the watchdog clock and clear all other settings
<> 157:ff67d9f36b67 71 wdt->ctrl = MXC_F_WDT_CTRL_EN_CLOCK;
<> 157:ff67d9f36b67 72
<> 157:ff67d9f36b67 73 //clear all interrupt flags
<> 157:ff67d9f36b67 74 wdt->flags = WDT_FLAGS_CLEAR_ALL;
<> 157:ff67d9f36b67 75
<> 157:ff67d9f36b67 76 //lock ctrl to read-only
<> 157:ff67d9f36b67 77 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 157:ff67d9f36b67 78
<> 157:ff67d9f36b67 79 return E_NO_ERROR;
<> 157:ff67d9f36b67 80 }
<> 157:ff67d9f36b67 81
<> 157:ff67d9f36b67 82 /* ************************************************************************* */
<> 157:ff67d9f36b67 83 int WDT_EnableInt(mxc_wdt_regs_t *wdt, wdt_period_t int_period, uint8_t unlock_key)
<> 157:ff67d9f36b67 84 {
<> 157:ff67d9f36b67 85 //unlock ctrl to be writable
<> 157:ff67d9f36b67 86 wdt->lock_ctrl = unlock_key;
<> 157:ff67d9f36b67 87
<> 157:ff67d9f36b67 88 //check to make sure it unlocked
<> 157:ff67d9f36b67 89 if (wdt->lock_ctrl & 0x01)
<> 157:ff67d9f36b67 90 return E_BAD_STATE;
<> 157:ff67d9f36b67 91
<> 157:ff67d9f36b67 92 //stop timer and clear interval period
<> 157:ff67d9f36b67 93 wdt->ctrl &= ~(MXC_F_WDT_CTRL_INT_PERIOD | MXC_F_WDT_CTRL_EN_TIMER);
<> 157:ff67d9f36b67 94
<> 157:ff67d9f36b67 95 //set interval period
<> 157:ff67d9f36b67 96 wdt->ctrl |= (int_period << MXC_F_WDT_CTRL_INT_PERIOD_POS);
<> 157:ff67d9f36b67 97
<> 157:ff67d9f36b67 98 //enable timeout interrupt
<> 157:ff67d9f36b67 99 interruptEnable |= MXC_F_WDT_ENABLE_TIMEOUT;
<> 157:ff67d9f36b67 100
<> 157:ff67d9f36b67 101 //lock ctrl to read-only
<> 157:ff67d9f36b67 102 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 157:ff67d9f36b67 103
<> 157:ff67d9f36b67 104 return E_NO_ERROR;
<> 157:ff67d9f36b67 105 }
<> 157:ff67d9f36b67 106
<> 157:ff67d9f36b67 107 /* ************************************************************************* */
<> 157:ff67d9f36b67 108 int WDT_DisableInt(mxc_wdt_regs_t *wdt, uint8_t unlock_key)
<> 157:ff67d9f36b67 109 {
<> 157:ff67d9f36b67 110 //unlock register to be writable
<> 157:ff67d9f36b67 111 wdt->lock_ctrl = unlock_key;
<> 157:ff67d9f36b67 112
<> 157:ff67d9f36b67 113 //check to make sure it unlocked
<> 157:ff67d9f36b67 114 if (wdt->lock_ctrl & 0x01)
<> 157:ff67d9f36b67 115 return E_BAD_STATE;
<> 157:ff67d9f36b67 116
<> 157:ff67d9f36b67 117 //disable timeout interrupt
<> 157:ff67d9f36b67 118 interruptEnable &= ~MXC_F_WDT_ENABLE_TIMEOUT;
<> 157:ff67d9f36b67 119 wdt->enable = interruptEnable;
<> 157:ff67d9f36b67 120
<> 157:ff67d9f36b67 121 //lock register to read-only
<> 157:ff67d9f36b67 122 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 157:ff67d9f36b67 123
<> 157:ff67d9f36b67 124 return E_NO_ERROR;
<> 157:ff67d9f36b67 125 }
<> 157:ff67d9f36b67 126
<> 157:ff67d9f36b67 127 /* ************************************************************************* */
<> 157:ff67d9f36b67 128 int WDT_EnableWait(mxc_wdt_regs_t *wdt, wdt_period_t wait_period, uint8_t unlock_key)
<> 157:ff67d9f36b67 129 {
<> 157:ff67d9f36b67 130 // Make sure wait_period is valid
<> 157:ff67d9f36b67 131 if (wait_period >= WDT_PERIOD_MAX)
<> 157:ff67d9f36b67 132 return E_INVALID;
<> 157:ff67d9f36b67 133
<> 157:ff67d9f36b67 134 //unlock ctrl to be writable
<> 157:ff67d9f36b67 135 wdt->lock_ctrl = unlock_key;
<> 157:ff67d9f36b67 136
<> 157:ff67d9f36b67 137 //check to make sure it unlocked
<> 157:ff67d9f36b67 138 if (wdt->lock_ctrl & 0x01)
<> 157:ff67d9f36b67 139 return E_BAD_STATE;
<> 157:ff67d9f36b67 140
<> 157:ff67d9f36b67 141 //stop timer and clear wait period
<> 157:ff67d9f36b67 142 wdt->ctrl &= ~(MXC_F_WDT_CTRL_WAIT_PERIOD | MXC_F_WDT_CTRL_EN_TIMER);
<> 157:ff67d9f36b67 143
<> 157:ff67d9f36b67 144 //set wait period
<> 157:ff67d9f36b67 145 wdt->ctrl |= (wait_period << MXC_F_WDT_CTRL_WAIT_PERIOD_POS);
<> 157:ff67d9f36b67 146
<> 157:ff67d9f36b67 147 //enable wait interrupt
<> 157:ff67d9f36b67 148 interruptEnable |= MXC_F_WDT_ENABLE_PRE_WIN;
<> 157:ff67d9f36b67 149
<> 157:ff67d9f36b67 150 //lock ctrl to read-only
<> 157:ff67d9f36b67 151 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 157:ff67d9f36b67 152
<> 157:ff67d9f36b67 153 return E_NO_ERROR;
<> 157:ff67d9f36b67 154 }
<> 157:ff67d9f36b67 155
<> 157:ff67d9f36b67 156 /* ************************************************************************* */
<> 157:ff67d9f36b67 157 int WDT_DisableWait(mxc_wdt_regs_t *wdt, uint8_t unlock_key)
<> 157:ff67d9f36b67 158 {
<> 157:ff67d9f36b67 159 //unlock register to be writable
<> 157:ff67d9f36b67 160 wdt->lock_ctrl = unlock_key;
<> 157:ff67d9f36b67 161
<> 157:ff67d9f36b67 162 //check to make sure it unlocked
<> 157:ff67d9f36b67 163 if (wdt->lock_ctrl & 0x01)
<> 157:ff67d9f36b67 164 return E_BAD_STATE;
<> 157:ff67d9f36b67 165
<> 157:ff67d9f36b67 166 //disable wait interrupt
<> 157:ff67d9f36b67 167 interruptEnable &= ~MXC_F_WDT_ENABLE_PRE_WIN;
<> 157:ff67d9f36b67 168 wdt->enable = interruptEnable;
<> 157:ff67d9f36b67 169
<> 157:ff67d9f36b67 170 //lock register to read-only
<> 157:ff67d9f36b67 171 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 157:ff67d9f36b67 172
<> 157:ff67d9f36b67 173 return E_NO_ERROR;
<> 157:ff67d9f36b67 174 }
<> 157:ff67d9f36b67 175
<> 157:ff67d9f36b67 176 /* ************************************************************************* */
<> 157:ff67d9f36b67 177 int WDT_EnableReset(mxc_wdt_regs_t *wdt, wdt_period_t rst_period, uint8_t unlock_key)
<> 157:ff67d9f36b67 178 {
<> 157:ff67d9f36b67 179 // Make sure wait_period is valid
<> 157:ff67d9f36b67 180 if (rst_period >= WDT_PERIOD_MAX)
<> 157:ff67d9f36b67 181 return E_INVALID;
<> 157:ff67d9f36b67 182
<> 157:ff67d9f36b67 183 //unlock ctrl to be writable
<> 157:ff67d9f36b67 184 wdt->lock_ctrl = unlock_key;
<> 157:ff67d9f36b67 185
<> 157:ff67d9f36b67 186 //check to make sure it unlocked
<> 157:ff67d9f36b67 187 if (wdt->lock_ctrl & 0x01)
<> 157:ff67d9f36b67 188 return E_BAD_STATE;
<> 157:ff67d9f36b67 189
<> 157:ff67d9f36b67 190 //stop timer and clear reset period
<> 157:ff67d9f36b67 191 wdt->ctrl &= ~(MXC_F_WDT_CTRL_RST_PERIOD | MXC_F_WDT_CTRL_EN_TIMER);
<> 157:ff67d9f36b67 192
<> 157:ff67d9f36b67 193 //set reset period
<> 157:ff67d9f36b67 194 wdt->ctrl |= (rst_period << MXC_F_WDT_CTRL_RST_PERIOD_POS);
<> 157:ff67d9f36b67 195
<> 157:ff67d9f36b67 196 //enable reset0
<> 157:ff67d9f36b67 197 interruptEnable |= MXC_F_WDT_ENABLE_RESET_OUT;
<> 157:ff67d9f36b67 198
<> 157:ff67d9f36b67 199 //lock ctrl to read-only
<> 157:ff67d9f36b67 200 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 157:ff67d9f36b67 201
<> 157:ff67d9f36b67 202 return E_NO_ERROR;
<> 157:ff67d9f36b67 203 }
<> 157:ff67d9f36b67 204
<> 157:ff67d9f36b67 205 /* ************************************************************************* */
<> 157:ff67d9f36b67 206 int WDT_DisableReset(mxc_wdt_regs_t *wdt, uint8_t unlock_key)
<> 157:ff67d9f36b67 207 {
<> 157:ff67d9f36b67 208 //unlock register to be writable
<> 157:ff67d9f36b67 209 wdt->lock_ctrl = unlock_key;
<> 157:ff67d9f36b67 210
<> 157:ff67d9f36b67 211 //check to make sure it unlocked
<> 157:ff67d9f36b67 212 if (wdt->lock_ctrl & 0x01)
<> 157:ff67d9f36b67 213 return E_BAD_STATE;
<> 157:ff67d9f36b67 214
<> 157:ff67d9f36b67 215 //disable reset0
<> 157:ff67d9f36b67 216 interruptEnable &= ~MXC_F_WDT_ENABLE_RESET_OUT;
<> 157:ff67d9f36b67 217 wdt->enable = interruptEnable;
<> 157:ff67d9f36b67 218
<> 157:ff67d9f36b67 219 //lock register to read-only
<> 157:ff67d9f36b67 220 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 157:ff67d9f36b67 221
<> 157:ff67d9f36b67 222 return E_NO_ERROR;
<> 157:ff67d9f36b67 223 }
<> 157:ff67d9f36b67 224
<> 157:ff67d9f36b67 225 /* ************************************************************************* */
<> 157:ff67d9f36b67 226 int WDT_Start(mxc_wdt_regs_t *wdt, uint8_t unlock_key)
<> 157:ff67d9f36b67 227 {
<> 157:ff67d9f36b67 228 //check if watchdog is already running
<> 157:ff67d9f36b67 229 if(WDT_IsActive(wdt))
<> 157:ff67d9f36b67 230 return E_BAD_STATE;
<> 157:ff67d9f36b67 231
<> 157:ff67d9f36b67 232 //unlock ctrl to be writable
<> 157:ff67d9f36b67 233 wdt->lock_ctrl = unlock_key;
<> 157:ff67d9f36b67 234
<> 157:ff67d9f36b67 235 //check to make sure it unlocked
<> 157:ff67d9f36b67 236 if (wdt->lock_ctrl & 0x01)
<> 157:ff67d9f36b67 237 return E_BAD_STATE;
<> 157:ff67d9f36b67 238
<> 157:ff67d9f36b67 239 WDT_Reset(wdt);
<> 157:ff67d9f36b67 240
<> 157:ff67d9f36b67 241 //enable interrupts
<> 157:ff67d9f36b67 242 wdt->enable = interruptEnable;
<> 157:ff67d9f36b67 243
<> 157:ff67d9f36b67 244 //start timer
<> 157:ff67d9f36b67 245 wdt->ctrl |= MXC_F_WDT_CTRL_EN_TIMER;
<> 157:ff67d9f36b67 246
<> 157:ff67d9f36b67 247 //lock ctrl to read-only
<> 157:ff67d9f36b67 248 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 157:ff67d9f36b67 249
<> 157:ff67d9f36b67 250 return E_NO_ERROR;
<> 157:ff67d9f36b67 251 }
<> 157:ff67d9f36b67 252
<> 157:ff67d9f36b67 253 /* ************************************************************************* */
<> 157:ff67d9f36b67 254 void WDT_Reset(mxc_wdt_regs_t *wdt)
<> 157:ff67d9f36b67 255 {
<> 157:ff67d9f36b67 256 //reset the watchdog counter
<> 157:ff67d9f36b67 257 wdt->clear = MXC_V_WDT_RESET_KEY_0;
<> 157:ff67d9f36b67 258 wdt->clear = MXC_V_WDT_RESET_KEY_1;
<> 157:ff67d9f36b67 259
<> 157:ff67d9f36b67 260 //clear all interrupt flags
<> 157:ff67d9f36b67 261 wdt->flags = WDT_FLAGS_CLEAR_ALL;
<> 157:ff67d9f36b67 262
<> 157:ff67d9f36b67 263 //wait for all interrupts to clear
<> 157:ff67d9f36b67 264 while(wdt->flags != 0) {
<> 157:ff67d9f36b67 265 wdt->flags = WDT_FLAGS_CLEAR_ALL;
<> 157:ff67d9f36b67 266 }
<> 157:ff67d9f36b67 267
<> 157:ff67d9f36b67 268 return;
<> 157:ff67d9f36b67 269 }
<> 157:ff67d9f36b67 270
<> 157:ff67d9f36b67 271 /* ************************************************************************* */
<> 157:ff67d9f36b67 272 int WDT_Stop(mxc_wdt_regs_t *wdt, uint8_t unlock_key)
<> 157:ff67d9f36b67 273 {
<> 157:ff67d9f36b67 274 //unlock ctrl to be writable
<> 157:ff67d9f36b67 275 wdt->lock_ctrl = unlock_key;
<> 157:ff67d9f36b67 276
<> 157:ff67d9f36b67 277 //check to make sure it unlocked
<> 157:ff67d9f36b67 278 if (wdt->lock_ctrl & 0x01)
<> 157:ff67d9f36b67 279 return E_BAD_STATE;
<> 157:ff67d9f36b67 280
<> 157:ff67d9f36b67 281 //disabled the timer and interrupts
<> 157:ff67d9f36b67 282 wdt->enable = 0;
<> 157:ff67d9f36b67 283 wdt->ctrl &= ~(MXC_F_WDT_CTRL_EN_TIMER);
<> 157:ff67d9f36b67 284
<> 157:ff67d9f36b67 285 //lock ctrl to read-only
<> 157:ff67d9f36b67 286 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
<> 157:ff67d9f36b67 287
<> 157:ff67d9f36b67 288 return E_NO_ERROR;
<> 157:ff67d9f36b67 289 }
<> 157:ff67d9f36b67 290 /**@} end of ingroup wdt */