Maxim Ibragimov / mbed-dev

mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c

Dependents:   Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay

Fork of mbed-dev by mbed official

targets/TARGET_NXP/TARGET_LPC11UXX/gpio_api.c@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/hal/TARGET_NXP/TARGET_LPC11UXX/gpio_api.c@144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2013 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 #include "mbed_assert.h"
<> 144:ef7eb2e8f9f7 17 #include "gpio_api.h"
<> 144:ef7eb2e8f9f7 18 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 19
<> 144:ef7eb2e8f9f7 20 uint32_t gpio_set(PinName pin) {
<> 144:ef7eb2e8f9f7 21 MBED_ASSERT(pin != (PinName)NC);
<> 144:ef7eb2e8f9f7 22 int f = ((pin == P0_0) ||
<> 144:ef7eb2e8f9f7 23 (pin == P0_10) ||
<> 144:ef7eb2e8f9f7 24 (pin == P0_11) ||
<> 144:ef7eb2e8f9f7 25 (pin == P0_12) ||
<> 144:ef7eb2e8f9f7 26 (pin == P0_13) ||
<> 144:ef7eb2e8f9f7 27 (pin == P0_14) ||
<> 144:ef7eb2e8f9f7 28 (pin == P0_15)) ? (1) : (0);
<> 144:ef7eb2e8f9f7 29
<> 144:ef7eb2e8f9f7 30 pin_function(pin, f);
<> 144:ef7eb2e8f9f7 31
<> 144:ef7eb2e8f9f7 32 return (1 << ((int)pin & 0x1F));
<> 144:ef7eb2e8f9f7 33 }
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 void gpio_init(gpio_t *obj, PinName pin) {
<> 144:ef7eb2e8f9f7 36 obj->pin = pin;
<> 144:ef7eb2e8f9f7 37 if (pin == (PinName)NC)
<> 144:ef7eb2e8f9f7 38 return;
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 obj->mask = gpio_set(pin);
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 unsigned int port = (unsigned int)pin >> PORT_SHIFT;
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 obj->reg_set = &LPC_GPIO->SET[port];
<> 144:ef7eb2e8f9f7 45 obj->reg_clr = &LPC_GPIO->CLR[port];
<> 144:ef7eb2e8f9f7 46 obj->reg_in = &LPC_GPIO->PIN[port];
<> 144:ef7eb2e8f9f7 47 obj->reg_dir = &LPC_GPIO->DIR[port];
<> 144:ef7eb2e8f9f7 48 }
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 void gpio_mode(gpio_t *obj, PinMode mode) {
<> 144:ef7eb2e8f9f7 51 pin_mode(obj->pin, mode);
<> 144:ef7eb2e8f9f7 52 }
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 void gpio_dir(gpio_t *obj, PinDirection direction) {
<> 144:ef7eb2e8f9f7 55 MBED_ASSERT(obj->pin != (PinName)NC);
<> 144:ef7eb2e8f9f7 56 switch (direction) {
<> 144:ef7eb2e8f9f7 57 case PIN_INPUT :
<> 144:ef7eb2e8f9f7 58 *obj->reg_dir &= ~obj->mask;
<> 144:ef7eb2e8f9f7 59 break;
<> 144:ef7eb2e8f9f7 60 case PIN_OUTPUT:
<> 144:ef7eb2e8f9f7 61 *obj->reg_dir |= obj->mask;
<> 144:ef7eb2e8f9f7 62 break;
<> 144:ef7eb2e8f9f7 63 }
<> 144:ef7eb2e8f9f7 64 }