mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c
Dependents: Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay
Fork of mbed-dev by
targets/TARGET_Maxim/TARGET_MAX32625/mxc/wdt2.h@150:02e0a0aed4ec, 2016-11-08 (annotated)
- Committer:
- <>
- Date:
- Tue Nov 08 17:45:16 2016 +0000
- Revision:
- 150:02e0a0aed4ec
This updates the lib to the mbed lib v129
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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<> | 150:02e0a0aed4ec | 1 | /******************************************************************************* |
<> | 150:02e0a0aed4ec | 2 | * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. |
<> | 150:02e0a0aed4ec | 3 | * |
<> | 150:02e0a0aed4ec | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
<> | 150:02e0a0aed4ec | 5 | * copy of this software and associated documentation files (the "Software"), |
<> | 150:02e0a0aed4ec | 6 | * to deal in the Software without restriction, including without limitation |
<> | 150:02e0a0aed4ec | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
<> | 150:02e0a0aed4ec | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
<> | 150:02e0a0aed4ec | 9 | * Software is furnished to do so, subject to the following conditions: |
<> | 150:02e0a0aed4ec | 10 | * |
<> | 150:02e0a0aed4ec | 11 | * The above copyright notice and this permission notice shall be included |
<> | 150:02e0a0aed4ec | 12 | * in all copies or substantial portions of the Software. |
<> | 150:02e0a0aed4ec | 13 | * |
<> | 150:02e0a0aed4ec | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
<> | 150:02e0a0aed4ec | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
<> | 150:02e0a0aed4ec | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
<> | 150:02e0a0aed4ec | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
<> | 150:02e0a0aed4ec | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
<> | 150:02e0a0aed4ec | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
<> | 150:02e0a0aed4ec | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
<> | 150:02e0a0aed4ec | 21 | * |
<> | 150:02e0a0aed4ec | 22 | * Except as contained in this notice, the name of Maxim Integrated |
<> | 150:02e0a0aed4ec | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
<> | 150:02e0a0aed4ec | 24 | * Products, Inc. Branding Policy. |
<> | 150:02e0a0aed4ec | 25 | * |
<> | 150:02e0a0aed4ec | 26 | * The mere transfer of this software does not imply any licenses |
<> | 150:02e0a0aed4ec | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
<> | 150:02e0a0aed4ec | 28 | * trademarks, maskwork rights, or any other form of intellectual |
<> | 150:02e0a0aed4ec | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
<> | 150:02e0a0aed4ec | 30 | * ownership rights. |
<> | 150:02e0a0aed4ec | 31 | * |
<> | 150:02e0a0aed4ec | 32 | * $Date: 2016-03-21 15:44:11 -0500 (Mon, 21 Mar 2016) $ |
<> | 150:02e0a0aed4ec | 33 | * $Revision: 22024 $ |
<> | 150:02e0a0aed4ec | 34 | * |
<> | 150:02e0a0aed4ec | 35 | ******************************************************************************/ |
<> | 150:02e0a0aed4ec | 36 | |
<> | 150:02e0a0aed4ec | 37 | /** |
<> | 150:02e0a0aed4ec | 38 | * @file wdt2.h |
<> | 150:02e0a0aed4ec | 39 | * @addtogroup wdt WDT |
<> | 150:02e0a0aed4ec | 40 | * @{ |
<> | 150:02e0a0aed4ec | 41 | * @brief This is the high level API for the watchdog timer interface module |
<> | 150:02e0a0aed4ec | 42 | * |
<> | 150:02e0a0aed4ec | 43 | */ |
<> | 150:02e0a0aed4ec | 44 | |
<> | 150:02e0a0aed4ec | 45 | #ifndef _WDT2_H |
<> | 150:02e0a0aed4ec | 46 | #define _WDT2_H |
<> | 150:02e0a0aed4ec | 47 | |
<> | 150:02e0a0aed4ec | 48 | #include "mxc_config.h" |
<> | 150:02e0a0aed4ec | 49 | #include "wdt2_regs.h" |
<> | 150:02e0a0aed4ec | 50 | #include "mxc_assert.h" |
<> | 150:02e0a0aed4ec | 51 | |
<> | 150:02e0a0aed4ec | 52 | #ifdef __cplusplus |
<> | 150:02e0a0aed4ec | 53 | extern "C" { |
<> | 150:02e0a0aed4ec | 54 | #endif |
<> | 150:02e0a0aed4ec | 55 | |
<> | 150:02e0a0aed4ec | 56 | #define WDT2_FLAGS_CLEAR_ALL (MXC_F_WDT2_FLAGS_TIMEOUT| \ |
<> | 150:02e0a0aed4ec | 57 | MXC_F_WDT2_FLAGS_RESET_OUT) |
<> | 150:02e0a0aed4ec | 58 | /** |
<> | 150:02e0a0aed4ec | 59 | * @enum wdt2_period_t |
<> | 150:02e0a0aed4ec | 60 | * @brief WatchDog Timer 2 Period Settings |
<> | 150:02e0a0aed4ec | 61 | */ |
<> | 150:02e0a0aed4ec | 62 | typedef enum { |
<> | 150:02e0a0aed4ec | 63 | WDT2_PERIOD_2_25_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_25_NANO_CLKS, /**< 2^25 WDT clocks. */ |
<> | 150:02e0a0aed4ec | 64 | WDT2_PERIOD_2_24_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_24_NANO_CLKS, /**< 2^24 WDT clocks. */ |
<> | 150:02e0a0aed4ec | 65 | WDT2_PERIOD_2_23_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_23_NANO_CLKS, /**< 2^23 WDT clocks. */ |
<> | 150:02e0a0aed4ec | 66 | WDT2_PERIOD_2_22_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_22_NANO_CLKS, /**< 2^22 WDT clocks. */ |
<> | 150:02e0a0aed4ec | 67 | WDT2_PERIOD_2_21_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_21_NANO_CLKS, /**< 2^21 WDT clocks. */ |
<> | 150:02e0a0aed4ec | 68 | WDT2_PERIOD_2_20_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_20_NANO_CLKS, /**< 2^20 WDT clocks. */ |
<> | 150:02e0a0aed4ec | 69 | WDT2_PERIOD_2_19_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_19_NANO_CLKS, /**< 2^19 WDT clocks. */ |
<> | 150:02e0a0aed4ec | 70 | WDT2_PERIOD_2_18_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_18_NANO_CLKS, /**< 2^18 WDT clocks. */ |
<> | 150:02e0a0aed4ec | 71 | WDT2_PERIOD_2_17_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_17_NANO_CLKS, /**< 2^17 WDT clocks. */ |
<> | 150:02e0a0aed4ec | 72 | WDT2_PERIOD_2_16_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_16_NANO_CLKS, /**< 2^16 WDT clocks. */ |
<> | 150:02e0a0aed4ec | 73 | WDT2_PERIOD_2_15_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_15_NANO_CLKS, /**< 2^15 WDT clocks. */ |
<> | 150:02e0a0aed4ec | 74 | WDT2_PERIOD_2_14_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_14_NANO_CLKS, /**< 2^14 WDT clocks. */ |
<> | 150:02e0a0aed4ec | 75 | WDT2_PERIOD_2_13_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_13_NANO_CLKS, /**< 2^13 WDT clocks. */ |
<> | 150:02e0a0aed4ec | 76 | WDT2_PERIOD_2_12_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_12_NANO_CLKS, /**< 2^12 WDT clocks. */ |
<> | 150:02e0a0aed4ec | 77 | WDT2_PERIOD_2_11_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_11_NANO_CLKS, /**< 2^11 WDT clocks. */ |
<> | 150:02e0a0aed4ec | 78 | WDT2_PERIOD_2_10_CLKS = MXC_V_WDT2_CTRL_INT_PERIOD_2_10_NANO_CLKS, /**< 2^10 WDT clocks. */ |
<> | 150:02e0a0aed4ec | 79 | WDT2_PERIOD_MAX /**< Maximum Period is Max - 1 */ |
<> | 150:02e0a0aed4ec | 80 | } wdt2_period_t; |
<> | 150:02e0a0aed4ec | 81 | |
<> | 150:02e0a0aed4ec | 82 | |
<> | 150:02e0a0aed4ec | 83 | |
<> | 150:02e0a0aed4ec | 84 | /** |
<> | 150:02e0a0aed4ec | 85 | * @brief Initializes the NanoRing for the watchdog clock and sets watchdog in a known disabled state |
<> | 150:02e0a0aed4ec | 86 | * @param runInSleep If non-zero, the WDT2 operates in Sleep Modes for the device, |
<> | 150:02e0a0aed4ec | 87 | * 0 disables the WDT2 during Sleep Modes. |
<> | 150:02e0a0aed4ec | 88 | * @param unlock_key The WDT2 unlock key value, use MXC_V_WDT2_UNLOCK_KEY |
<> | 150:02e0a0aed4ec | 89 | * |
<> | 150:02e0a0aed4ec | 90 | * @retval E_NO_ERROR Watchdog Timer initialized as requested |
<> | 150:02e0a0aed4ec | 91 | * @retval E_BAD_STATE Invalid unlock_key, WDT failed to unlock. |
<> | 150:02e0a0aed4ec | 92 | |
<> | 150:02e0a0aed4ec | 93 | */ |
<> | 150:02e0a0aed4ec | 94 | int WDT2_Init(uint8_t runInSleep, uint8_t unlock_key); |
<> | 150:02e0a0aed4ec | 95 | |
<> | 150:02e0a0aed4ec | 96 | /** |
<> | 150:02e0a0aed4ec | 97 | * @brief Configures and enables the wake-up timeout for the watchdog specified. |
<> | 150:02e0a0aed4ec | 98 | * |
<> | 150:02e0a0aed4ec | 99 | * @param int_period Interrupt period. |
<> | 150:02e0a0aed4ec | 100 | * @param unlock_key Key to unlock watchdog. |
<> | 150:02e0a0aed4ec | 101 | * |
<> | 150:02e0a0aed4ec | 102 | * @retval E_NO_ERROR WDT2 Interrupt period enabled with the int_period time. |
<> | 150:02e0a0aed4ec | 103 | * @retval E_INVALID Requested Period is greater than the maximum supported |
<> | 150:02e0a0aed4ec | 104 | * @retval E_BAD_STATE Invalid unlock_key, WDT failed to unlock. |
<> | 150:02e0a0aed4ec | 105 | * |
<> | 150:02e0a0aed4ec | 106 | */ |
<> | 150:02e0a0aed4ec | 107 | int WDT2_EnableWakeUp(wdt2_period_t int_period, uint8_t unlock_key); |
<> | 150:02e0a0aed4ec | 108 | |
<> | 150:02e0a0aed4ec | 109 | /** |
<> | 150:02e0a0aed4ec | 110 | * @brief Disables the interrupt timeout for the watchdog specified. |
<> | 150:02e0a0aed4ec | 111 | * |
<> | 150:02e0a0aed4ec | 112 | * @param unlock_key Key to unlock watchdog. |
<> | 150:02e0a0aed4ec | 113 | * |
<> | 150:02e0a0aed4ec | 114 | * @retval E_NO_ERROR Wakeup disabled. |
<> | 150:02e0a0aed4ec | 115 | * @retval E_BAD_STATE Invalid unlock_key, WDT failed to unlock. |
<> | 150:02e0a0aed4ec | 116 | */ |
<> | 150:02e0a0aed4ec | 117 | int WDT2_DisableWakeUp(uint8_t unlock_key); |
<> | 150:02e0a0aed4ec | 118 | |
<> | 150:02e0a0aed4ec | 119 | /** |
<> | 150:02e0a0aed4ec | 120 | * @brief Configures and enables the reset timeout for the watchdog specified. |
<> | 150:02e0a0aed4ec | 121 | * |
<> | 150:02e0a0aed4ec | 122 | * @param rst_period Reset period. |
<> | 150:02e0a0aed4ec | 123 | * @param unlock_key Key to unlock watchdog. |
<> | 150:02e0a0aed4ec | 124 | * |
<> | 150:02e0a0aed4ec | 125 | * @retval E_NO_ERROR Reset timeout enabled with the rst_period time. |
<> | 150:02e0a0aed4ec | 126 | * @retval E_INVALID Requested Period is greater than the maximum supported |
<> | 150:02e0a0aed4ec | 127 | * @retval E_BAD_STATE Invalid unlock_key, WDT failed to unlock. |
<> | 150:02e0a0aed4ec | 128 | */ |
<> | 150:02e0a0aed4ec | 129 | int WDT2_EnableReset(wdt2_period_t rst_period, uint8_t unlock_key); |
<> | 150:02e0a0aed4ec | 130 | |
<> | 150:02e0a0aed4ec | 131 | /** |
<> | 150:02e0a0aed4ec | 132 | * @brief Disables the reset timeout for the watchdog specified. |
<> | 150:02e0a0aed4ec | 133 | * |
<> | 150:02e0a0aed4ec | 134 | * @param unlock_key Key to unlock watchdog. |
<> | 150:02e0a0aed4ec | 135 | * |
<> | 150:02e0a0aed4ec | 136 | * @retval E_NO_ERROR Reset disabled. |
<> | 150:02e0a0aed4ec | 137 | * @retval E_BAD_STATE Invalid unlock_key, WDT failed to unlock. |
<> | 150:02e0a0aed4ec | 138 | */ |
<> | 150:02e0a0aed4ec | 139 | int WDT2_DisableReset(uint8_t unlock_key); |
<> | 150:02e0a0aed4ec | 140 | |
<> | 150:02e0a0aed4ec | 141 | /** |
<> | 150:02e0a0aed4ec | 142 | * @brief Gets the watchdog interrupt flags |
<> | 150:02e0a0aed4ec | 143 | * |
<> | 150:02e0a0aed4ec | 144 | * @retval 0 = flags not set, non-zero = flag is set |
<> | 150:02e0a0aed4ec | 145 | */ |
<> | 150:02e0a0aed4ec | 146 | __STATIC_INLINE uint32_t WDT2_GetFlags(void) |
<> | 150:02e0a0aed4ec | 147 | { |
<> | 150:02e0a0aed4ec | 148 | return (MXC_WDT2->flags); |
<> | 150:02e0a0aed4ec | 149 | } |
<> | 150:02e0a0aed4ec | 150 | |
<> | 150:02e0a0aed4ec | 151 | /** |
<> | 150:02e0a0aed4ec | 152 | * @brief Clears the watchdog interrupt flags based on the mask |
<> | 150:02e0a0aed4ec | 153 | * |
<> | 150:02e0a0aed4ec | 154 | * @param mask bits to clear |
<> | 150:02e0a0aed4ec | 155 | * |
<> | 150:02e0a0aed4ec | 156 | */ |
<> | 150:02e0a0aed4ec | 157 | __STATIC_INLINE void WDT2_ClearFlags(uint32_t mask) |
<> | 150:02e0a0aed4ec | 158 | { |
<> | 150:02e0a0aed4ec | 159 | MXC_WDT2->flags = mask; |
<> | 150:02e0a0aed4ec | 160 | } |
<> | 150:02e0a0aed4ec | 161 | |
<> | 150:02e0a0aed4ec | 162 | /** |
<> | 150:02e0a0aed4ec | 163 | * @brief Starts the watchdog specified. |
<> | 150:02e0a0aed4ec | 164 | * |
<> | 150:02e0a0aed4ec | 165 | * @param unlock_key Key to unlock watchdog. |
<> | 150:02e0a0aed4ec | 166 | * |
<> | 150:02e0a0aed4ec | 167 | * @retval E_NO_ERROR if everything is successful, error if unsuccessful. |
<> | 150:02e0a0aed4ec | 168 | * @retval E_BAD_STATE Invalid unlock_key, WDT failed to unlock. |
<> | 150:02e0a0aed4ec | 169 | */ |
<> | 150:02e0a0aed4ec | 170 | int WDT2_Start(uint8_t unlock_key); |
<> | 150:02e0a0aed4ec | 171 | |
<> | 150:02e0a0aed4ec | 172 | /** |
<> | 150:02e0a0aed4ec | 173 | * @brief Feeds the watchdog specified. |
<> | 150:02e0a0aed4ec | 174 | * |
<> | 150:02e0a0aed4ec | 175 | * @retval E_NO_ERROR if everything is successful, error if unsuccessful. |
<> | 150:02e0a0aed4ec | 176 | */ |
<> | 150:02e0a0aed4ec | 177 | void WDT2_Reset(void); |
<> | 150:02e0a0aed4ec | 178 | |
<> | 150:02e0a0aed4ec | 179 | /** |
<> | 150:02e0a0aed4ec | 180 | * @brief Stops the WatchDog Timer 2. |
<> | 150:02e0a0aed4ec | 181 | * |
<> | 150:02e0a0aed4ec | 182 | * @param unlock_key Key to unlock watchdog. |
<> | 150:02e0a0aed4ec | 183 | * |
<> | 150:02e0a0aed4ec | 184 | * @retval E_NO_ERROR if everything is successful, error if unsuccessful. |
<> | 150:02e0a0aed4ec | 185 | * @retval E_BAD_STATE Invalid unlock_key, WDT failed to unlock. |
<> | 150:02e0a0aed4ec | 186 | */ |
<> | 150:02e0a0aed4ec | 187 | int WDT2_Stop(uint8_t unlock_key); |
<> | 150:02e0a0aed4ec | 188 | |
<> | 150:02e0a0aed4ec | 189 | /** |
<> | 150:02e0a0aed4ec | 190 | * @brief Determines if the watchdog is running |
<> | 150:02e0a0aed4ec | 191 | * |
<> | 150:02e0a0aed4ec | 192 | * @retval 0 = watchdog timer is off, non-zero = watchdog timer is on |
<> | 150:02e0a0aed4ec | 193 | */ |
<> | 150:02e0a0aed4ec | 194 | __STATIC_INLINE int WDT2_IsActive(void) |
<> | 150:02e0a0aed4ec | 195 | { |
<> | 150:02e0a0aed4ec | 196 | return (!!(MXC_WDT2->ctrl & MXC_F_WDT2_CTRL_EN_TIMER)); |
<> | 150:02e0a0aed4ec | 197 | } |
<> | 150:02e0a0aed4ec | 198 | |
<> | 150:02e0a0aed4ec | 199 | /** |
<> | 150:02e0a0aed4ec | 200 | * @} |
<> | 150:02e0a0aed4ec | 201 | */ |
<> | 150:02e0a0aed4ec | 202 | |
<> | 150:02e0a0aed4ec | 203 | #ifdef __cplusplus |
<> | 150:02e0a0aed4ec | 204 | } |
<> | 150:02e0a0aed4ec | 205 | #endif |
<> | 150:02e0a0aed4ec | 206 | |
<> | 150:02e0a0aed4ec | 207 | #endif /* _WDT_H */ |