mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c
Dependents: Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay
Fork of mbed-dev by
targets/TARGET_Maxim/TARGET_MAX32625/mxc/i2cs.c@150:02e0a0aed4ec, 2016-11-08 (annotated)
- Committer:
- <>
- Date:
- Tue Nov 08 17:45:16 2016 +0000
- Revision:
- 150:02e0a0aed4ec
This updates the lib to the mbed lib v129
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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<> | 150:02e0a0aed4ec | 1 | /** |
<> | 150:02e0a0aed4ec | 2 | * @file i2cs.c |
<> | 150:02e0a0aed4ec | 3 | * @brief This file contains the function implementations for the I2CS |
<> | 150:02e0a0aed4ec | 4 | * (Inter-Integrated Circuit Slave) peripheral module. |
<> | 150:02e0a0aed4ec | 5 | */ |
<> | 150:02e0a0aed4ec | 6 | /* **************************************************************************** |
<> | 150:02e0a0aed4ec | 7 | * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. |
<> | 150:02e0a0aed4ec | 8 | * |
<> | 150:02e0a0aed4ec | 9 | * Permission is hereby granted, free of charge, to any person obtaining a |
<> | 150:02e0a0aed4ec | 10 | * copy of this software and associated documentation files (the "Software"), |
<> | 150:02e0a0aed4ec | 11 | * to deal in the Software without restriction, including without limitation |
<> | 150:02e0a0aed4ec | 12 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
<> | 150:02e0a0aed4ec | 13 | * and/or sell copies of the Software, and to permit persons to whom the |
<> | 150:02e0a0aed4ec | 14 | * Software is furnished to do so, subject to the following conditions: |
<> | 150:02e0a0aed4ec | 15 | * |
<> | 150:02e0a0aed4ec | 16 | * The above copyright notice and this permission notice shall be included |
<> | 150:02e0a0aed4ec | 17 | * in all copies or substantial portions of the Software. |
<> | 150:02e0a0aed4ec | 18 | * |
<> | 150:02e0a0aed4ec | 19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
<> | 150:02e0a0aed4ec | 20 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
<> | 150:02e0a0aed4ec | 21 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
<> | 150:02e0a0aed4ec | 22 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
<> | 150:02e0a0aed4ec | 23 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
<> | 150:02e0a0aed4ec | 24 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
<> | 150:02e0a0aed4ec | 25 | * OTHER DEALINGS IN THE SOFTWARE. |
<> | 150:02e0a0aed4ec | 26 | * |
<> | 150:02e0a0aed4ec | 27 | * Except as contained in this notice, the name of Maxim Integrated |
<> | 150:02e0a0aed4ec | 28 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
<> | 150:02e0a0aed4ec | 29 | * Products, Inc. Branding Policy. |
<> | 150:02e0a0aed4ec | 30 | * |
<> | 150:02e0a0aed4ec | 31 | * The mere transfer of this software does not imply any licenses |
<> | 150:02e0a0aed4ec | 32 | * of trade secrets, proprietary technology, copyrights, patents, |
<> | 150:02e0a0aed4ec | 33 | * trademarks, maskwork rights, or any other form of intellectual |
<> | 150:02e0a0aed4ec | 34 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
<> | 150:02e0a0aed4ec | 35 | * ownership rights. |
<> | 150:02e0a0aed4ec | 36 | * |
<> | 150:02e0a0aed4ec | 37 | * $Date: 2016-08-15 20:05:48 -0500 (Mon, 15 Aug 2016) $ |
<> | 150:02e0a0aed4ec | 38 | * $Revision: 24086 $ |
<> | 150:02e0a0aed4ec | 39 | * |
<> | 150:02e0a0aed4ec | 40 | *************************************************************************** */ |
<> | 150:02e0a0aed4ec | 41 | |
<> | 150:02e0a0aed4ec | 42 | /* **** Includes **** */ |
<> | 150:02e0a0aed4ec | 43 | #include <string.h> |
<> | 150:02e0a0aed4ec | 44 | #include "mxc_assert.h" |
<> | 150:02e0a0aed4ec | 45 | #include "mxc_errors.h" |
<> | 150:02e0a0aed4ec | 46 | #include "mxc_sys.h" |
<> | 150:02e0a0aed4ec | 47 | #include "i2cs.h" |
<> | 150:02e0a0aed4ec | 48 | |
<> | 150:02e0a0aed4ec | 49 | /** |
<> | 150:02e0a0aed4ec | 50 | * @ingroup i2cs |
<> | 150:02e0a0aed4ec | 51 | * @{ |
<> | 150:02e0a0aed4ec | 52 | */ |
<> | 150:02e0a0aed4ec | 53 | /* **** Definitions **** */ |
<> | 150:02e0a0aed4ec | 54 | |
<> | 150:02e0a0aed4ec | 55 | /* **** Globals ***** */ |
<> | 150:02e0a0aed4ec | 56 | |
<> | 150:02e0a0aed4ec | 57 | |
<> | 150:02e0a0aed4ec | 58 | // No Doxygen documentation for the items between here and endcond. |
<> | 150:02e0a0aed4ec | 59 | /* Clock divider lookup table */ |
<> | 150:02e0a0aed4ec | 60 | static const uint32_t clk_div_table[2][8] = { |
<> | 150:02e0a0aed4ec | 61 | /* I2CS_SPEED_100KHZ */ |
<> | 150:02e0a0aed4ec | 62 | { |
<> | 150:02e0a0aed4ec | 63 | // 12000000 |
<> | 150:02e0a0aed4ec | 64 | (6 << MXC_F_I2CS_CLK_DIV_FS_FILTER_CLOCK_DIV_POS), |
<> | 150:02e0a0aed4ec | 65 | // 24000000 |
<> | 150:02e0a0aed4ec | 66 | (12 << MXC_F_I2CS_CLK_DIV_FS_FILTER_CLOCK_DIV_POS), |
<> | 150:02e0a0aed4ec | 67 | // 36000000 NOT SUPPORTED |
<> | 150:02e0a0aed4ec | 68 | 0, |
<> | 150:02e0a0aed4ec | 69 | // 48000000 |
<> | 150:02e0a0aed4ec | 70 | (24 << MXC_F_I2CS_CLK_DIV_FS_FILTER_CLOCK_DIV_POS), |
<> | 150:02e0a0aed4ec | 71 | // 60000000 NOT SUPPORTED |
<> | 150:02e0a0aed4ec | 72 | 0, |
<> | 150:02e0a0aed4ec | 73 | // 72000000 NOT SUPPORTED |
<> | 150:02e0a0aed4ec | 74 | 0, |
<> | 150:02e0a0aed4ec | 75 | // 84000000 NOT SUPPORTED |
<> | 150:02e0a0aed4ec | 76 | 0, |
<> | 150:02e0a0aed4ec | 77 | // 96000000 |
<> | 150:02e0a0aed4ec | 78 | (48 << MXC_F_I2CS_CLK_DIV_FS_FILTER_CLOCK_DIV_POS) |
<> | 150:02e0a0aed4ec | 79 | }, |
<> | 150:02e0a0aed4ec | 80 | /* I2CS_SPEED_400KHZ */ |
<> | 150:02e0a0aed4ec | 81 | { |
<> | 150:02e0a0aed4ec | 82 | // 12000000 |
<> | 150:02e0a0aed4ec | 83 | (2 << MXC_F_I2CS_CLK_DIV_FS_FILTER_CLOCK_DIV_POS), |
<> | 150:02e0a0aed4ec | 84 | // 24000000 |
<> | 150:02e0a0aed4ec | 85 | (3 << MXC_F_I2CS_CLK_DIV_FS_FILTER_CLOCK_DIV_POS), |
<> | 150:02e0a0aed4ec | 86 | // 36000000 NOT SUPPORTED |
<> | 150:02e0a0aed4ec | 87 | 0, |
<> | 150:02e0a0aed4ec | 88 | // 48000000 |
<> | 150:02e0a0aed4ec | 89 | (6 << MXC_F_I2CS_CLK_DIV_FS_FILTER_CLOCK_DIV_POS), |
<> | 150:02e0a0aed4ec | 90 | // 60000000 NOT SUPPORTED |
<> | 150:02e0a0aed4ec | 91 | 0, |
<> | 150:02e0a0aed4ec | 92 | // 72000000 NOT SUPPORTED |
<> | 150:02e0a0aed4ec | 93 | 0, |
<> | 150:02e0a0aed4ec | 94 | // 84000000 NOT SUPPORTED |
<> | 150:02e0a0aed4ec | 95 | 0, |
<> | 150:02e0a0aed4ec | 96 | // 96000000 |
<> | 150:02e0a0aed4ec | 97 | (12 << MXC_F_I2CS_CLK_DIV_FS_FILTER_CLOCK_DIV_POS) |
<> | 150:02e0a0aed4ec | 98 | }, |
<> | 150:02e0a0aed4ec | 99 | }; |
<> | 150:02e0a0aed4ec | 100 | |
<> | 150:02e0a0aed4ec | 101 | |
<> | 150:02e0a0aed4ec | 102 | static void (*callbacks[MXC_CFG_I2CS_INSTANCES][MXC_CFG_I2CS_BUFFER_SIZE])(uint8_t); |
<> | 150:02e0a0aed4ec | 103 | |
<> | 150:02e0a0aed4ec | 104 | /* **** Functions **** */ |
<> | 150:02e0a0aed4ec | 105 | |
<> | 150:02e0a0aed4ec | 106 | /* ************************************************************************* */ |
<> | 150:02e0a0aed4ec | 107 | int I2CS_Init(mxc_i2cs_regs_t *i2cs, const sys_cfg_i2cs_t *sys_cfg, i2cs_speed_t speed, |
<> | 150:02e0a0aed4ec | 108 | uint16_t address, i2cs_addr_t addr_len) |
<> | 150:02e0a0aed4ec | 109 | { |
<> | 150:02e0a0aed4ec | 110 | int err, i, i2cs_index; |
<> | 150:02e0a0aed4ec | 111 | |
<> | 150:02e0a0aed4ec | 112 | i2cs_index = MXC_I2CS_GET_IDX(i2cs); |
<> | 150:02e0a0aed4ec | 113 | MXC_ASSERT(i2cs_index >= 0); |
<> | 150:02e0a0aed4ec | 114 | |
<> | 150:02e0a0aed4ec | 115 | // Set system level configurations |
<> | 150:02e0a0aed4ec | 116 | if ((err = SYS_I2CS_Init(i2cs, sys_cfg)) != E_NO_ERROR) { |
<> | 150:02e0a0aed4ec | 117 | return err; |
<> | 150:02e0a0aed4ec | 118 | } |
<> | 150:02e0a0aed4ec | 119 | |
<> | 150:02e0a0aed4ec | 120 | // Compute clock array index |
<> | 150:02e0a0aed4ec | 121 | int clki = ((SYS_I2CS_GetFreq(i2cs) / 12000000) - 1); |
<> | 150:02e0a0aed4ec | 122 | |
<> | 150:02e0a0aed4ec | 123 | // Get clock divider settings from lookup table |
<> | 150:02e0a0aed4ec | 124 | if ((speed == I2CS_SPEED_100KHZ) && (clk_div_table[I2CS_SPEED_100KHZ][clki] > 0)) { |
<> | 150:02e0a0aed4ec | 125 | i2cs->clk_div = clk_div_table[I2CS_SPEED_100KHZ][clki]; |
<> | 150:02e0a0aed4ec | 126 | } else if ((speed == I2CS_SPEED_400KHZ) && (clk_div_table[I2CS_SPEED_400KHZ][clki] > 0)) { |
<> | 150:02e0a0aed4ec | 127 | i2cs->clk_div = clk_div_table[I2CS_SPEED_400KHZ][clki]; |
<> | 150:02e0a0aed4ec | 128 | } else { |
<> | 150:02e0a0aed4ec | 129 | MXC_ASSERT_FAIL(); |
<> | 150:02e0a0aed4ec | 130 | } |
<> | 150:02e0a0aed4ec | 131 | |
<> | 150:02e0a0aed4ec | 132 | // Clear the interrupt callbacks |
<> | 150:02e0a0aed4ec | 133 | for(i = 0; i < MXC_CFG_I2CS_BUFFER_SIZE; i++) { |
<> | 150:02e0a0aed4ec | 134 | callbacks[i2cs_index][i] = NULL; |
<> | 150:02e0a0aed4ec | 135 | } |
<> | 150:02e0a0aed4ec | 136 | |
<> | 150:02e0a0aed4ec | 137 | // Reset module |
<> | 150:02e0a0aed4ec | 138 | i2cs->dev_id = MXC_F_I2CS_DEV_ID_SLAVE_RESET; |
<> | 150:02e0a0aed4ec | 139 | i2cs->dev_id = ((((address >> 0) << MXC_F_I2CS_DEV_ID_SLAVE_DEV_ID_POS) |
<> | 150:02e0a0aed4ec | 140 | & MXC_F_I2CS_DEV_ID_SLAVE_DEV_ID) | addr_len); |
<> | 150:02e0a0aed4ec | 141 | |
<> | 150:02e0a0aed4ec | 142 | return E_NO_ERROR; |
<> | 150:02e0a0aed4ec | 143 | } |
<> | 150:02e0a0aed4ec | 144 | |
<> | 150:02e0a0aed4ec | 145 | /* ************************************************************************* */ |
<> | 150:02e0a0aed4ec | 146 | int I2CS_Shutdown(mxc_i2cs_regs_t *i2cs) |
<> | 150:02e0a0aed4ec | 147 | { |
<> | 150:02e0a0aed4ec | 148 | int err; |
<> | 150:02e0a0aed4ec | 149 | |
<> | 150:02e0a0aed4ec | 150 | // Disable and clear interrupts |
<> | 150:02e0a0aed4ec | 151 | i2cs->inten = 0; |
<> | 150:02e0a0aed4ec | 152 | i2cs->intfl = i2cs->intfl; |
<> | 150:02e0a0aed4ec | 153 | |
<> | 150:02e0a0aed4ec | 154 | // clears system level configurations |
<> | 150:02e0a0aed4ec | 155 | if ((err = SYS_I2CS_Shutdown(i2cs)) != E_NO_ERROR) { |
<> | 150:02e0a0aed4ec | 156 | return err; |
<> | 150:02e0a0aed4ec | 157 | } |
<> | 150:02e0a0aed4ec | 158 | |
<> | 150:02e0a0aed4ec | 159 | return E_NO_ERROR; |
<> | 150:02e0a0aed4ec | 160 | } |
<> | 150:02e0a0aed4ec | 161 | |
<> | 150:02e0a0aed4ec | 162 | /* ************************************************************************* */ |
<> | 150:02e0a0aed4ec | 163 | void I2CS_Handler(mxc_i2cs_regs_t *i2cs) |
<> | 150:02e0a0aed4ec | 164 | { |
<> | 150:02e0a0aed4ec | 165 | uint32_t intfl; |
<> | 150:02e0a0aed4ec | 166 | uint8_t i; |
<> | 150:02e0a0aed4ec | 167 | int i2cs_index = MXC_I2CS_GET_IDX(i2cs); |
<> | 150:02e0a0aed4ec | 168 | |
<> | 150:02e0a0aed4ec | 169 | // Save and clear the interrupt flags |
<> | 150:02e0a0aed4ec | 170 | intfl = i2cs->intfl; |
<> | 150:02e0a0aed4ec | 171 | i2cs->intfl = intfl; |
<> | 150:02e0a0aed4ec | 172 | |
<> | 150:02e0a0aed4ec | 173 | // Process each interrupt |
<> | 150:02e0a0aed4ec | 174 | for(i = 0; i < 32; i++) { |
<> | 150:02e0a0aed4ec | 175 | if(intfl & (0x1 << i)) { |
<> | 150:02e0a0aed4ec | 176 | if(callbacks[i2cs_index][i] != NULL) { |
<> | 150:02e0a0aed4ec | 177 | callbacks[i2cs_index][i](i); |
<> | 150:02e0a0aed4ec | 178 | } |
<> | 150:02e0a0aed4ec | 179 | } |
<> | 150:02e0a0aed4ec | 180 | } |
<> | 150:02e0a0aed4ec | 181 | |
<> | 150:02e0a0aed4ec | 182 | } |
<> | 150:02e0a0aed4ec | 183 | |
<> | 150:02e0a0aed4ec | 184 | /* ************************************************************************* */ |
<> | 150:02e0a0aed4ec | 185 | void I2CS_RegisterCallback(mxc_i2cs_regs_t *i2cs, uint8_t addr, i2cs_callback_fn callback) |
<> | 150:02e0a0aed4ec | 186 | { |
<> | 150:02e0a0aed4ec | 187 | int i2cs_index = MXC_I2CS_GET_IDX(i2cs); |
<> | 150:02e0a0aed4ec | 188 | |
<> | 150:02e0a0aed4ec | 189 | // Make sure we don't overflow |
<> | 150:02e0a0aed4ec | 190 | MXC_ASSERT(addr < MXC_CFG_I2CS_BUFFER_SIZE); |
<> | 150:02e0a0aed4ec | 191 | |
<> | 150:02e0a0aed4ec | 192 | if(callback != NULL) { |
<> | 150:02e0a0aed4ec | 193 | // Save the callback address |
<> | 150:02e0a0aed4ec | 194 | callbacks[i2cs_index][addr] = callback; |
<> | 150:02e0a0aed4ec | 195 | |
<> | 150:02e0a0aed4ec | 196 | // Clear and Enable the interrupt for the given byte |
<> | 150:02e0a0aed4ec | 197 | i2cs->intfl = (0x1 << addr); |
<> | 150:02e0a0aed4ec | 198 | i2cs->inten |= (0x1 << addr); |
<> | 150:02e0a0aed4ec | 199 | } else { |
<> | 150:02e0a0aed4ec | 200 | // Disable and clear the interrupt |
<> | 150:02e0a0aed4ec | 201 | i2cs->inten &= ~(0x1 << addr); |
<> | 150:02e0a0aed4ec | 202 | i2cs->intfl = (0x1 << addr); |
<> | 150:02e0a0aed4ec | 203 | |
<> | 150:02e0a0aed4ec | 204 | // Clear the callback address |
<> | 150:02e0a0aed4ec | 205 | callbacks[i2cs_index][addr] = NULL; |
<> | 150:02e0a0aed4ec | 206 | } |
<> | 150:02e0a0aed4ec | 207 | } |
<> | 150:02e0a0aed4ec | 208 | |
<> | 150:02e0a0aed4ec | 209 | /**@} end of group i2cs*/ |