mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c

Dependents:   Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay

Fork of mbed-dev by mbed official

Committer:
<>
Date:
Tue Nov 08 17:45:16 2016 +0000
Revision:
150:02e0a0aed4ec
This updates the lib to the mbed lib v129

Who changed what in which revision?

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<> 150:02e0a0aed4ec 1 /**
<> 150:02e0a0aed4ec 2 * @file gpio.c
<> 150:02e0a0aed4ec 3 * @brief This file contains the function implementations for the
<> 150:02e0a0aed4ec 4 * General-Purpose Input/Output (GPIO) peripheral module.
<> 150:02e0a0aed4ec 5 */
<> 150:02e0a0aed4ec 6
<> 150:02e0a0aed4ec 7 /* ****************************************************************************
<> 150:02e0a0aed4ec 8 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 150:02e0a0aed4ec 9 *
<> 150:02e0a0aed4ec 10 * Permission is hereby granted, free of charge, to any person obtaining a
<> 150:02e0a0aed4ec 11 * copy of this software and associated documentation files (the "Software"),
<> 150:02e0a0aed4ec 12 * to deal in the Software without restriction, including without limitation
<> 150:02e0a0aed4ec 13 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 150:02e0a0aed4ec 14 * and/or sell copies of the Software, and to permit persons to whom the
<> 150:02e0a0aed4ec 15 * Software is furnished to do so, subject to the following conditions:
<> 150:02e0a0aed4ec 16 *
<> 150:02e0a0aed4ec 17 * The above copyright notice and this permission notice shall be included
<> 150:02e0a0aed4ec 18 * in all copies or substantial portions of the Software.
<> 150:02e0a0aed4ec 19 *
<> 150:02e0a0aed4ec 20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 150:02e0a0aed4ec 21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 150:02e0a0aed4ec 22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 150:02e0a0aed4ec 23 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 150:02e0a0aed4ec 24 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 150:02e0a0aed4ec 25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 150:02e0a0aed4ec 26 * OTHER DEALINGS IN THE SOFTWARE.
<> 150:02e0a0aed4ec 27 *
<> 150:02e0a0aed4ec 28 * Except as contained in this notice, the name of Maxim Integrated
<> 150:02e0a0aed4ec 29 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 150:02e0a0aed4ec 30 * Products, Inc. Branding Policy.
<> 150:02e0a0aed4ec 31 *
<> 150:02e0a0aed4ec 32 * The mere transfer of this software does not imply any licenses
<> 150:02e0a0aed4ec 33 * of trade secrets, proprietary technology, copyrights, patents,
<> 150:02e0a0aed4ec 34 * trademarks, maskwork rights, or any other form of intellectual
<> 150:02e0a0aed4ec 35 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 150:02e0a0aed4ec 36 * ownership rights.
<> 150:02e0a0aed4ec 37 *
<> 150:02e0a0aed4ec 38 * $Date: 2016-08-15 20:04:11 -0500 (Mon, 15 Aug 2016) $
<> 150:02e0a0aed4ec 39 * $Revision: 24085 $
<> 150:02e0a0aed4ec 40 *
<> 150:02e0a0aed4ec 41 *************************************************************************** */
<> 150:02e0a0aed4ec 42
<> 150:02e0a0aed4ec 43 /* **** Includes **** */
<> 150:02e0a0aed4ec 44 #include "mxc_config.h"
<> 150:02e0a0aed4ec 45 #include "mxc_assert.h"
<> 150:02e0a0aed4ec 46 #include "mxc_sys.h"
<> 150:02e0a0aed4ec 47 #include "gpio.h"
<> 150:02e0a0aed4ec 48 #include "clkman_regs.h"
<> 150:02e0a0aed4ec 49
<> 150:02e0a0aed4ec 50 /**
<> 150:02e0a0aed4ec 51 * @ingroup gpio
<> 150:02e0a0aed4ec 52 * @{
<> 150:02e0a0aed4ec 53 */
<> 150:02e0a0aed4ec 54
<> 150:02e0a0aed4ec 55 /* **** Definitions **** */
<> 150:02e0a0aed4ec 56
<> 150:02e0a0aed4ec 57 /* **** Globals **** */
<> 150:02e0a0aed4ec 58
<> 150:02e0a0aed4ec 59 /* ************************************************************************* */
<> 150:02e0a0aed4ec 60 static void (*callbacks[MXC_GPIO_NUM_PORTS][MXC_GPIO_MAX_PINS_PER_PORT])(void *);
<> 150:02e0a0aed4ec 61 static void *cbparam[MXC_GPIO_NUM_PORTS][MXC_GPIO_MAX_PINS_PER_PORT];
<> 150:02e0a0aed4ec 62
<> 150:02e0a0aed4ec 63 /* **** Functions **** */
<> 150:02e0a0aed4ec 64
<> 150:02e0a0aed4ec 65 /* ************************************************************************* */
<> 150:02e0a0aed4ec 66 static int PinConfig(unsigned int port, unsigned int pin, gpio_func_t func, gpio_pad_t pad)
<> 150:02e0a0aed4ec 67 {
<> 150:02e0a0aed4ec 68 /* Check if available */
<> 150:02e0a0aed4ec 69 if (!(MXC_GPIO->free[port] & (1 << pin))) {
<> 150:02e0a0aed4ec 70 return E_BUSY;
<> 150:02e0a0aed4ec 71 }
<> 150:02e0a0aed4ec 72
<> 150:02e0a0aed4ec 73 /* Set function */
<> 150:02e0a0aed4ec 74 uint32_t func_sel = MXC_GPIO->func_sel[port];
<> 150:02e0a0aed4ec 75 func_sel &= ~(0xF << (4 * pin));
<> 150:02e0a0aed4ec 76 func_sel |= (func << (4 * pin));
<> 150:02e0a0aed4ec 77 MXC_GPIO->func_sel[port] = func_sel;
<> 150:02e0a0aed4ec 78
<> 150:02e0a0aed4ec 79 /* Normal input is always enabled */
<> 150:02e0a0aed4ec 80 MXC_GPIO->in_mode[port] &= ~(0xF << (4 * pin));
<> 150:02e0a0aed4ec 81
<> 150:02e0a0aed4ec 82 /* Set requested output mode */
<> 150:02e0a0aed4ec 83 uint32_t out_mode = MXC_GPIO->out_mode[port];
<> 150:02e0a0aed4ec 84 out_mode &= ~(0xF << (4 * pin));
<> 150:02e0a0aed4ec 85 out_mode |= (pad << (4 * pin));
<> 150:02e0a0aed4ec 86 MXC_GPIO->out_mode[port] = out_mode;
<> 150:02e0a0aed4ec 87
<> 150:02e0a0aed4ec 88 /* Enable the pull up/down if necessary */
<> 150:02e0a0aed4ec 89 if (pad == MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP) {
<> 150:02e0a0aed4ec 90 MXC_GPIO->out_val[port] |= (1 << pin);
<> 150:02e0a0aed4ec 91 } else if (pad == MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLDOWN) {
<> 150:02e0a0aed4ec 92 MXC_GPIO->out_val[port] &= ~(1 << pin);
<> 150:02e0a0aed4ec 93 }
<> 150:02e0a0aed4ec 94
<> 150:02e0a0aed4ec 95 return E_NO_ERROR;
<> 150:02e0a0aed4ec 96 }
<> 150:02e0a0aed4ec 97
<> 150:02e0a0aed4ec 98 /* ************************************************************************* */
<> 150:02e0a0aed4ec 99 int GPIO_Config(const gpio_cfg_t *cfg)
<> 150:02e0a0aed4ec 100 {
<> 150:02e0a0aed4ec 101 unsigned int pin;
<> 150:02e0a0aed4ec 102 int err = E_NO_ERROR;
<> 150:02e0a0aed4ec 103
<> 150:02e0a0aed4ec 104 MXC_ASSERT(cfg);
<> 150:02e0a0aed4ec 105 MXC_ASSERT(cfg->port < MXC_GPIO_NUM_PORTS);
<> 150:02e0a0aed4ec 106
<> 150:02e0a0aed4ec 107 // Set system level configurations
<> 150:02e0a0aed4ec 108 if ((err = SYS_GPIO_Init()) != E_NO_ERROR) {
<> 150:02e0a0aed4ec 109 return err;
<> 150:02e0a0aed4ec 110 }
<> 150:02e0a0aed4ec 111
<> 150:02e0a0aed4ec 112 // Configure each pin in the mask
<> 150:02e0a0aed4ec 113 for (pin = 0; pin < MXC_GPIO_MAX_PINS_PER_PORT; pin++) {
<> 150:02e0a0aed4ec 114 if (cfg->mask & (1 << pin)) {
<> 150:02e0a0aed4ec 115 if (PinConfig(cfg->port, pin, cfg->func, cfg->pad) != E_NO_ERROR) {
<> 150:02e0a0aed4ec 116 err = E_BUSY;
<> 150:02e0a0aed4ec 117 }
<> 150:02e0a0aed4ec 118 }
<> 150:02e0a0aed4ec 119 }
<> 150:02e0a0aed4ec 120
<> 150:02e0a0aed4ec 121 return err;
<> 150:02e0a0aed4ec 122 }
<> 150:02e0a0aed4ec 123
<> 150:02e0a0aed4ec 124 /* ************************************************************************* */
<> 150:02e0a0aed4ec 125 static void IntConfig(unsigned int port, unsigned int pin, gpio_int_mode_t mode)
<> 150:02e0a0aed4ec 126 {
<> 150:02e0a0aed4ec 127 uint32_t int_mode = MXC_GPIO->int_mode[port];
<> 150:02e0a0aed4ec 128 int_mode &= ~(0xF << (pin*4));
<> 150:02e0a0aed4ec 129 int_mode |= (mode << (pin*4));
<> 150:02e0a0aed4ec 130 MXC_GPIO->int_mode[port] = int_mode;
<> 150:02e0a0aed4ec 131 }
<> 150:02e0a0aed4ec 132
<> 150:02e0a0aed4ec 133 /* ************************************************************************* */
<> 150:02e0a0aed4ec 134 void GPIO_IntConfig(const gpio_cfg_t *cfg, gpio_int_mode_t mode)
<> 150:02e0a0aed4ec 135 {
<> 150:02e0a0aed4ec 136 unsigned int pin;
<> 150:02e0a0aed4ec 137
<> 150:02e0a0aed4ec 138 MXC_ASSERT(cfg);
<> 150:02e0a0aed4ec 139 MXC_ASSERT(cfg->port < MXC_GPIO_NUM_PORTS);
<> 150:02e0a0aed4ec 140
<> 150:02e0a0aed4ec 141 // Configure each pin in the mask
<> 150:02e0a0aed4ec 142 for (pin = 0; pin < MXC_GPIO_MAX_PINS_PER_PORT; pin++) {
<> 150:02e0a0aed4ec 143 if (cfg->mask & (1 << pin)) {
<> 150:02e0a0aed4ec 144 IntConfig(cfg->port, pin, mode);
<> 150:02e0a0aed4ec 145 }
<> 150:02e0a0aed4ec 146 }
<> 150:02e0a0aed4ec 147 }
<> 150:02e0a0aed4ec 148
<> 150:02e0a0aed4ec 149 /* ************************************************************************* */
<> 150:02e0a0aed4ec 150 void GPIO_RegisterCallback(const gpio_cfg_t *cfg, gpio_callback_fn func, void *cbdata)
<> 150:02e0a0aed4ec 151 {
<> 150:02e0a0aed4ec 152 unsigned int pin;
<> 150:02e0a0aed4ec 153
<> 150:02e0a0aed4ec 154 MXC_ASSERT(cfg);
<> 150:02e0a0aed4ec 155 MXC_ASSERT(cfg->port < MXC_GPIO_NUM_PORTS);
<> 150:02e0a0aed4ec 156
<> 150:02e0a0aed4ec 157 for (pin = 0; pin < MXC_GPIO_MAX_PINS_PER_PORT; pin++) {
<> 150:02e0a0aed4ec 158 if (cfg->mask & (1 << pin)) {
<> 150:02e0a0aed4ec 159 callbacks[cfg->port][pin] = func;
<> 150:02e0a0aed4ec 160 cbparam[cfg->port][pin] = cbdata;
<> 150:02e0a0aed4ec 161 }
<> 150:02e0a0aed4ec 162 }
<> 150:02e0a0aed4ec 163 }
<> 150:02e0a0aed4ec 164
<> 150:02e0a0aed4ec 165 /* ************************************************************************* */
<> 150:02e0a0aed4ec 166 void GPIO_Handler(unsigned int port)
<> 150:02e0a0aed4ec 167 {
<> 150:02e0a0aed4ec 168 uint8_t intfl;
<> 150:02e0a0aed4ec 169 unsigned int pin;
<> 150:02e0a0aed4ec 170
<> 150:02e0a0aed4ec 171 MXC_ASSERT(port < MXC_GPIO_NUM_PORTS);
<> 150:02e0a0aed4ec 172
<> 150:02e0a0aed4ec 173 // Read and clear enabled interrupts.
<> 150:02e0a0aed4ec 174 intfl = MXC_GPIO->intfl[port];
<> 150:02e0a0aed4ec 175 intfl &= MXC_GPIO->inten[port];
<> 150:02e0a0aed4ec 176 MXC_GPIO->intfl[port] = intfl;
<> 150:02e0a0aed4ec 177
<> 150:02e0a0aed4ec 178 // Process each pins' interrupt
<> 150:02e0a0aed4ec 179 for (pin = 0; pin < MXC_GPIO_MAX_PINS_PER_PORT; pin++) {
<> 150:02e0a0aed4ec 180 if ((intfl & (1 << pin)) && callbacks[port][pin]) {
<> 150:02e0a0aed4ec 181 callbacks[port][pin](cbparam[port][pin]);
<> 150:02e0a0aed4ec 182 }
<> 150:02e0a0aed4ec 183 }
<> 150:02e0a0aed4ec 184 }
<> 150:02e0a0aed4ec 185
<> 150:02e0a0aed4ec 186 /**@} end of group gpio */