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targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_ll_fsmc.c@613:bc40b8d2aec4, 2015-08-20 (annotated)

Committer:
mbed_official
Date:
Thu Aug 20 10:45:13 2015 +0100
Revision:
613:bc40b8d2aec4
Parent:
532:fe11edbda85c 
Synchronized with git revision 92ca8c7b60a283b6bb60eb65b183dac1599f0ade



Full URL: https://github.com/mbedmicro/mbed/commit/92ca8c7b60a283b6bb60eb65b183dac1599f0ade/



Nordic: update application start address in GCC linker script

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mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file stm32f4xx_ll_fsmc.c
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 613:bc40b8d2aec4 5 * @version V1.3.2
mbed_official 613:bc40b8d2aec4 6 * @date 26-June-2015
mbed_official 87:085cde657901 7 * @brief FSMC Low Layer HAL module driver.
mbed_official 87:085cde657901 8 *
mbed_official 87:085cde657901 9 * This file provides firmware functions to manage the following
mbed_official 87:085cde657901 10 * functionalities of the Flexible Static Memory Controller (FSMC) peripheral memories:
mbed_official 87:085cde657901 11 * + Initialization/de-initialization functions
mbed_official 87:085cde657901 12 * + Peripheral Control functions
mbed_official 87:085cde657901 13 * + Peripheral State functions
mbed_official 87:085cde657901 14 *
mbed_official 87:085cde657901 15 @verbatim
mbed_official 87:085cde657901 16 ==============================================================================
mbed_official 87:085cde657901 17 ##### FSMC peripheral features #####
mbed_official 87:085cde657901 18 ==============================================================================
mbed_official 87:085cde657901 19 [..] The Flexible static memory controller (FSMC) includes two memory controllers:
mbed_official 87:085cde657901 20 (+) The NOR/PSRAM memory controller
mbed_official 87:085cde657901 21 (+) The NAND/PC Card memory controller
mbed_official 87:085cde657901 22
mbed_official 87:085cde657901 23 [..] The FSMC functional block makes the interface with synchronous and asynchronous static
mbed_official 87:085cde657901 24 memories, SDRAM memories, and 16-bit PC memory cards. Its main purposes are:
mbed_official 87:085cde657901 25 (+) to translate AHB transactions into the appropriate external device protocol.
mbed_official 87:085cde657901 26 (+) to meet the access time requirements of the external memory devices.
mbed_official 87:085cde657901 27
mbed_official 87:085cde657901 28 [..] All external memories share the addresses, data and control signals with the controller.
mbed_official 87:085cde657901 29 Each external device is accessed by means of a unique Chip Select. The FSMC performs
mbed_official 87:085cde657901 30 only one access at a time to an external device.
mbed_official 87:085cde657901 31 The main features of the FSMC controller are the following:
mbed_official 87:085cde657901 32 (+) Interface with static-memory mapped devices including:
mbed_official 87:085cde657901 33 (++) Static random access memory (SRAM).
mbed_official 87:085cde657901 34 (++) Read-only memory (ROM).
mbed_official 87:085cde657901 35 (++) NOR Flash memory/OneNAND Flash memory.
mbed_official 87:085cde657901 36 (++) PSRAM (4 memory banks).
mbed_official 87:085cde657901 37 (++) 16-bit PC Card compatible devices.
mbed_official 87:085cde657901 38 (++) Two banks of NAND Flash memory with ECC hardware to check up to 8 Kbytes of
mbed_official 87:085cde657901 39 data.
mbed_official 87:085cde657901 40 (+) Independent Chip Select control for each memory bank.
mbed_official 87:085cde657901 41 (+) Independent configuration for each memory bank.
mbed_official 87:085cde657901 42
mbed_official 87:085cde657901 43 @endverbatim
mbed_official 87:085cde657901 44 ******************************************************************************
mbed_official 87:085cde657901 45 * @attention
mbed_official 87:085cde657901 46 *
mbed_official 532:fe11edbda85c 47 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 48 *
mbed_official 87:085cde657901 49 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 87:085cde657901 50 * are permitted provided that the following conditions are met:
mbed_official 87:085cde657901 51 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 87:085cde657901 52 * this list of conditions and the following disclaimer.
mbed_official 87:085cde657901 53 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 87:085cde657901 54 * this list of conditions and the following disclaimer in the documentation
mbed_official 87:085cde657901 55 * and/or other materials provided with the distribution.
mbed_official 87:085cde657901 56 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 87:085cde657901 57 * may be used to endorse or promote products derived from this software
mbed_official 87:085cde657901 58 * without specific prior written permission.
mbed_official 87:085cde657901 59 *
mbed_official 87:085cde657901 60 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 87:085cde657901 61 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 87:085cde657901 62 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 87:085cde657901 63 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 87:085cde657901 64 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 87:085cde657901 65 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 87:085cde657901 66 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 87:085cde657901 67 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 87:085cde657901 68 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 87:085cde657901 69 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 70 *
mbed_official 87:085cde657901 71 ******************************************************************************
mbed_official 87:085cde657901 72 */
mbed_official 87:085cde657901 73
mbed_official 87:085cde657901 74 /* Includes ------------------------------------------------------------------*/
mbed_official 87:085cde657901 75 #include "stm32f4xx_hal.h"
mbed_official 87:085cde657901 76
mbed_official 87:085cde657901 77 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 87:085cde657901 78 * @{
mbed_official 87:085cde657901 79 */
mbed_official 87:085cde657901 80
mbed_official 532:fe11edbda85c 81 /** @defgroup FSMC_LL FSMC Low Layer
mbed_official 87:085cde657901 82 * @brief FSMC driver modules
mbed_official 87:085cde657901 83 * @{
mbed_official 87:085cde657901 84 */
mbed_official 87:085cde657901 85
mbed_official 87:085cde657901 86 #if defined (HAL_SRAM_MODULE_ENABLED) || defined(HAL_NOR_MODULE_ENABLED) || defined(HAL_NAND_MODULE_ENABLED) || defined(HAL_PCCARD_MODULE_ENABLED)
mbed_official 87:085cde657901 87 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
mbed_official 87:085cde657901 88 /* Private typedef -----------------------------------------------------------*/
mbed_official 87:085cde657901 89 /* Private define ------------------------------------------------------------*/
mbed_official 87:085cde657901 90 /* Private macro -------------------------------------------------------------*/
mbed_official 87:085cde657901 91 /* Private variables ---------------------------------------------------------*/
mbed_official 87:085cde657901 92 /* Private function prototypes -----------------------------------------------*/
mbed_official 87:085cde657901 93 /* Private functions ---------------------------------------------------------*/
mbed_official 532:fe11edbda85c 94 /** @addtogroup FSMC_LL_Private_Functions
mbed_official 87:085cde657901 95 * @{
mbed_official 87:085cde657901 96 */
mbed_official 87:085cde657901 97
mbed_official 532:fe11edbda85c 98 /** @addtogroup FSMC_LL_NORSRAM
mbed_official 87:085cde657901 99 * @brief NORSRAM Controller functions
mbed_official 87:085cde657901 100 *
mbed_official 87:085cde657901 101 @verbatim
mbed_official 87:085cde657901 102 ==============================================================================
mbed_official 87:085cde657901 103 ##### How to use NORSRAM device driver #####
mbed_official 87:085cde657901 104 ==============================================================================
mbed_official 87:085cde657901 105
mbed_official 87:085cde657901 106 [..]
mbed_official 87:085cde657901 107 This driver contains a set of APIs to interface with the FSMC NORSRAM banks in order
mbed_official 87:085cde657901 108 to run the NORSRAM external devices.
mbed_official 87:085cde657901 109
mbed_official 87:085cde657901 110 (+) FSMC NORSRAM bank reset using the function FSMC_NORSRAM_DeInit()
mbed_official 87:085cde657901 111 (+) FSMC NORSRAM bank control configuration using the function FSMC_NORSRAM_Init()
mbed_official 87:085cde657901 112 (+) FSMC NORSRAM bank timing configuration using the function FSMC_NORSRAM_Timing_Init()
mbed_official 87:085cde657901 113 (+) FSMC NORSRAM bank extended timing configuration using the function
mbed_official 87:085cde657901 114 FSMC_NORSRAM_Extended_Timing_Init()
mbed_official 87:085cde657901 115 (+) FSMC NORSRAM bank enable/disable write operation using the functions
mbed_official 87:085cde657901 116 FSMC_NORSRAM_WriteOperation_Enable()/FSMC_NORSRAM_WriteOperation_Disable()
mbed_official 87:085cde657901 117
mbed_official 87:085cde657901 118 @endverbatim
mbed_official 87:085cde657901 119 * @{
mbed_official 87:085cde657901 120 */
mbed_official 87:085cde657901 121
mbed_official 532:fe11edbda85c 122 /** @addtogroup FSMC_LL_NORSRAM_Private_Functions_Group1
mbed_official 87:085cde657901 123 * @brief Initialization and Configuration functions
mbed_official 87:085cde657901 124 *
mbed_official 87:085cde657901 125 @verbatim
mbed_official 87:085cde657901 126 ==============================================================================
mbed_official 87:085cde657901 127 ##### Initialization and de_initialization functions #####
mbed_official 87:085cde657901 128 ==============================================================================
mbed_official 87:085cde657901 129 [..]
mbed_official 87:085cde657901 130 This section provides functions allowing to:
mbed_official 87:085cde657901 131 (+) Initialize and configure the FSMC NORSRAM interface
mbed_official 87:085cde657901 132 (+) De-initialize the FSMC NORSRAM interface
mbed_official 87:085cde657901 133 (+) Configure the FSMC clock and associated GPIOs
mbed_official 87:085cde657901 134
mbed_official 87:085cde657901 135 @endverbatim
mbed_official 87:085cde657901 136 * @{
mbed_official 87:085cde657901 137 */
mbed_official 87:085cde657901 138
mbed_official 87:085cde657901 139 /**
mbed_official 87:085cde657901 140 * @brief Initialize the FSMC_NORSRAM device according to the specified
mbed_official 87:085cde657901 141 * control parameters in the FSMC_NORSRAM_InitTypeDef
mbed_official 87:085cde657901 142 * @param Device: Pointer to NORSRAM device instance
mbed_official 87:085cde657901 143 * @param Init: Pointer to NORSRAM Initialization structure
mbed_official 87:085cde657901 144 * @retval HAL status
mbed_official 87:085cde657901 145 */
mbed_official 87:085cde657901 146 HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_InitTypeDef* Init)
mbed_official 87:085cde657901 147 {
mbed_official 87:085cde657901 148 uint32_t tmpr = 0;
mbed_official 87:085cde657901 149
mbed_official 87:085cde657901 150 /* Check the parameters */
mbed_official 87:085cde657901 151 assert_param(IS_FSMC_NORSRAM_BANK(Init->NSBank));
mbed_official 87:085cde657901 152 assert_param(IS_FSMC_MUX(Init->DataAddressMux));
mbed_official 87:085cde657901 153 assert_param(IS_FSMC_MEMORY(Init->MemoryType));
mbed_official 87:085cde657901 154 assert_param(IS_FSMC_NORSRAM_MEMORY_WIDTH(Init->MemoryDataWidth));
mbed_official 87:085cde657901 155 assert_param(IS_FSMC_BURSTMODE(Init->BurstAccessMode));
mbed_official 87:085cde657901 156 assert_param(IS_FSMC_WAIT_POLARITY(Init->WaitSignalPolarity));
mbed_official 87:085cde657901 157 assert_param(IS_FSMC_WRAP_MODE(Init->WrapMode));
mbed_official 87:085cde657901 158 assert_param(IS_FSMC_WAIT_SIGNAL_ACTIVE(Init->WaitSignalActive));
mbed_official 87:085cde657901 159 assert_param(IS_FSMC_WRITE_OPERATION(Init->WriteOperation));
mbed_official 87:085cde657901 160 assert_param(IS_FSMC_WAITE_SIGNAL(Init->WaitSignal));
mbed_official 87:085cde657901 161 assert_param(IS_FSMC_EXTENDED_MODE(Init->ExtendedMode));
mbed_official 87:085cde657901 162 assert_param(IS_FSMC_ASYNWAIT(Init->AsynchronousWait));
mbed_official 87:085cde657901 163 assert_param(IS_FSMC_WRITE_BURST(Init->WriteBurst));
mbed_official 87:085cde657901 164
mbed_official 532:fe11edbda85c 165 /* Get the BTCR register value */
mbed_official 532:fe11edbda85c 166 tmpr = Device->BTCR[Init->NSBank];
mbed_official 532:fe11edbda85c 167
mbed_official 532:fe11edbda85c 168 /* Clear MBKEN, MUXEN, MTYP, MWID, FACCEN, BURSTEN, WAITPOL, WRAPMOD, WAITCFG, WREN,
mbed_official 532:fe11edbda85c 169 WAITEN, EXTMOD, ASYNCWAIT, CBURSTRW and CCLKEN bits */
mbed_official 532:fe11edbda85c 170 tmpr &= ((uint32_t)~(FSMC_BCR1_MBKEN | FSMC_BCR1_MUXEN | FSMC_BCR1_MTYP | \
mbed_official 532:fe11edbda85c 171 FSMC_BCR1_MWID | FSMC_BCR1_FACCEN | FSMC_BCR1_BURSTEN | \
mbed_official 532:fe11edbda85c 172 FSMC_BCR1_WAITPOL | FSMC_BCR1_WRAPMOD | FSMC_BCR1_WAITCFG | \
mbed_official 532:fe11edbda85c 173 FSMC_BCR1_WREN | FSMC_BCR1_WAITEN | FSMC_BCR1_EXTMOD | \
mbed_official 532:fe11edbda85c 174 FSMC_BCR1_ASYNCWAIT | FSMC_BCR1_CBURSTRW));
mbed_official 106:ced8cbb51063 175 /* Set NORSRAM device control parameters */
mbed_official 532:fe11edbda85c 176 tmpr |= (uint32_t)(Init->DataAddressMux |\
mbed_official 532:fe11edbda85c 177 Init->MemoryType |\
mbed_official 532:fe11edbda85c 178 Init->MemoryDataWidth |\
mbed_official 532:fe11edbda85c 179 Init->BurstAccessMode |\
mbed_official 532:fe11edbda85c 180 Init->WaitSignalPolarity |\
mbed_official 532:fe11edbda85c 181 Init->WrapMode |\
mbed_official 532:fe11edbda85c 182 Init->WaitSignalActive |\
mbed_official 532:fe11edbda85c 183 Init->WriteOperation |\
mbed_official 532:fe11edbda85c 184 Init->WaitSignal |\
mbed_official 532:fe11edbda85c 185 Init->ExtendedMode |\
mbed_official 532:fe11edbda85c 186 Init->AsynchronousWait |\
mbed_official 532:fe11edbda85c 187 Init->WriteBurst
mbed_official 532:fe11edbda85c 188 );
mbed_official 87:085cde657901 189
mbed_official 87:085cde657901 190 if(Init->MemoryType == FSMC_MEMORY_TYPE_NOR)
mbed_official 87:085cde657901 191 {
mbed_official 87:085cde657901 192 tmpr |= (uint32_t)FSMC_NORSRAM_FLASH_ACCESS_ENABLE;
mbed_official 87:085cde657901 193 }
mbed_official 87:085cde657901 194
mbed_official 87:085cde657901 195 Device->BTCR[Init->NSBank] = tmpr;
mbed_official 87:085cde657901 196
mbed_official 87:085cde657901 197 return HAL_OK;
mbed_official 87:085cde657901 198 }
mbed_official 87:085cde657901 199
mbed_official 87:085cde657901 200 /**
mbed_official 87:085cde657901 201 * @brief DeInitialize the FSMC_NORSRAM peripheral
mbed_official 87:085cde657901 202 * @param Device: Pointer to NORSRAM device instance
mbed_official 87:085cde657901 203 * @param ExDevice: Pointer to NORSRAM extended mode device instance
mbed_official 87:085cde657901 204 * @param Bank: NORSRAM bank number
mbed_official 87:085cde657901 205 * @retval HAL status
mbed_official 87:085cde657901 206 */
mbed_official 87:085cde657901 207 HAL_StatusTypeDef FSMC_NORSRAM_DeInit(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank)
mbed_official 87:085cde657901 208 {
mbed_official 87:085cde657901 209 /* Check the parameters */
mbed_official 87:085cde657901 210 assert_param(IS_FSMC_NORSRAM_DEVICE(Device));
mbed_official 87:085cde657901 211 assert_param(IS_FSMC_NORSRAM_EXTENDED_DEVICE(ExDevice));
mbed_official 87:085cde657901 212
mbed_official 87:085cde657901 213 /* Disable the FSMC_NORSRAM device */
mbed_official 87:085cde657901 214 __FSMC_NORSRAM_DISABLE(Device, Bank);
mbed_official 87:085cde657901 215
mbed_official 87:085cde657901 216 /* De-initialize the FSMC_NORSRAM device */
mbed_official 87:085cde657901 217 /* FSMC_NORSRAM_BANK1 */
mbed_official 87:085cde657901 218 if(Bank == FSMC_NORSRAM_BANK1)
mbed_official 87:085cde657901 219 {
mbed_official 87:085cde657901 220 Device->BTCR[Bank] = 0x000030DB;
mbed_official 87:085cde657901 221 }
mbed_official 87:085cde657901 222 /* FSMC_NORSRAM_BANK2, FSMC_NORSRAM_BANK3 or FSMC_NORSRAM_BANK4 */
mbed_official 87:085cde657901 223 else
mbed_official 87:085cde657901 224 {
mbed_official 87:085cde657901 225 Device->BTCR[Bank] = 0x000030D2;
mbed_official 87:085cde657901 226 }
mbed_official 87:085cde657901 227
mbed_official 87:085cde657901 228 Device->BTCR[Bank + 1] = 0x0FFFFFFF;
mbed_official 87:085cde657901 229 ExDevice->BWTR[Bank] = 0x0FFFFFFF;
mbed_official 87:085cde657901 230
mbed_official 87:085cde657901 231 return HAL_OK;
mbed_official 87:085cde657901 232 }
mbed_official 87:085cde657901 233
mbed_official 87:085cde657901 234
mbed_official 87:085cde657901 235 /**
mbed_official 87:085cde657901 236 * @brief Initialize the FSMC_NORSRAM Timing according to the specified
mbed_official 87:085cde657901 237 * parameters in the FSMC_NORSRAM_TimingTypeDef
mbed_official 87:085cde657901 238 * @param Device: Pointer to NORSRAM device instance
mbed_official 87:085cde657901 239 * @param Timing: Pointer to NORSRAM Timing structure
mbed_official 87:085cde657901 240 * @param Bank: NORSRAM bank number
mbed_official 87:085cde657901 241 * @retval HAL status
mbed_official 87:085cde657901 242 */
mbed_official 87:085cde657901 243 HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank)
mbed_official 87:085cde657901 244 {
mbed_official 87:085cde657901 245 uint32_t tmpr = 0;
mbed_official 87:085cde657901 246
mbed_official 87:085cde657901 247 /* Check the parameters */
mbed_official 87:085cde657901 248 assert_param(IS_FSMC_ADDRESS_SETUP_TIME(Timing->AddressSetupTime));
mbed_official 87:085cde657901 249 assert_param(IS_FSMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime));
mbed_official 87:085cde657901 250 assert_param(IS_FSMC_DATASETUP_TIME(Timing->DataSetupTime));
mbed_official 87:085cde657901 251 assert_param(IS_FSMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration));
mbed_official 87:085cde657901 252 assert_param(IS_FSMC_CLK_DIV(Timing->CLKDivision));
mbed_official 87:085cde657901 253 assert_param(IS_FSMC_DATA_LATENCY(Timing->DataLatency));
mbed_official 87:085cde657901 254 assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));
mbed_official 87:085cde657901 255
mbed_official 532:fe11edbda85c 256 /* Get the BTCR register value */
mbed_official 532:fe11edbda85c 257 tmpr = Device->BTCR[Bank + 1];
mbed_official 532:fe11edbda85c 258
mbed_official 532:fe11edbda85c 259 /* Clear ADDSET, ADDHLD, DATAST, BUSTURN, CLKDIV, DATLAT and ACCMOD bits */
mbed_official 532:fe11edbda85c 260 tmpr &= ((uint32_t)~(FSMC_BTR1_ADDSET | FSMC_BTR1_ADDHLD | FSMC_BTR1_DATAST | \
mbed_official 532:fe11edbda85c 261 FSMC_BTR1_BUSTURN | FSMC_BTR1_CLKDIV | FSMC_BTR1_DATLAT | \
mbed_official 532:fe11edbda85c 262 FSMC_BTR1_ACCMOD));
mbed_official 532:fe11edbda85c 263
mbed_official 87:085cde657901 264 /* Set FSMC_NORSRAM device timing parameters */
mbed_official 532:fe11edbda85c 265 tmpr |= (uint32_t)(Timing->AddressSetupTime |\
mbed_official 532:fe11edbda85c 266 ((Timing->AddressHoldTime) << 4) |\
mbed_official 532:fe11edbda85c 267 ((Timing->DataSetupTime) << 8) |\
mbed_official 532:fe11edbda85c 268 ((Timing->BusTurnAroundDuration) << 16) |\
mbed_official 532:fe11edbda85c 269 (((Timing->CLKDivision)-1) << 20) |\
mbed_official 532:fe11edbda85c 270 (((Timing->DataLatency)-2) << 24) |\
mbed_official 532:fe11edbda85c 271 (Timing->AccessMode));
mbed_official 87:085cde657901 272
mbed_official 87:085cde657901 273 Device->BTCR[Bank + 1] = tmpr;
mbed_official 87:085cde657901 274
mbed_official 87:085cde657901 275 return HAL_OK;
mbed_official 87:085cde657901 276 }
mbed_official 87:085cde657901 277
mbed_official 87:085cde657901 278 /**
mbed_official 87:085cde657901 279 * @brief Initialize the FSMC_NORSRAM Extended mode Timing according to the specified
mbed_official 87:085cde657901 280 * parameters in the FSMC_NORSRAM_TimingTypeDef
mbed_official 87:085cde657901 281 * @param Device: Pointer to NORSRAM device instance
mbed_official 87:085cde657901 282 * @param Timing: Pointer to NORSRAM Timing structure
mbed_official 87:085cde657901 283 * @param Bank: NORSRAM bank number
mbed_official 87:085cde657901 284 * @retval HAL status
mbed_official 87:085cde657901 285 */
mbed_official 87:085cde657901 286 HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device, FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode)
mbed_official 87:085cde657901 287 {
mbed_official 532:fe11edbda85c 288 uint32_t tmpr = 0;
mbed_official 532:fe11edbda85c 289
mbed_official 87:085cde657901 290 /* Set NORSRAM device timing register for write configuration, if extended mode is used */
mbed_official 87:085cde657901 291 if(ExtendedMode == FSMC_EXTENDED_MODE_ENABLE)
mbed_official 87:085cde657901 292 {
mbed_official 87:085cde657901 293 /* Check the parameters */
mbed_official 87:085cde657901 294 assert_param(IS_FSMC_ADDRESS_SETUP_TIME(Timing->AddressSetupTime));
mbed_official 87:085cde657901 295 assert_param(IS_FSMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime));
mbed_official 87:085cde657901 296 assert_param(IS_FSMC_DATASETUP_TIME(Timing->DataSetupTime));
mbed_official 87:085cde657901 297 assert_param(IS_FSMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration));
mbed_official 87:085cde657901 298 assert_param(IS_FSMC_CLK_DIV(Timing->CLKDivision));
mbed_official 87:085cde657901 299 assert_param(IS_FSMC_DATA_LATENCY(Timing->DataLatency));
mbed_official 87:085cde657901 300 assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));
mbed_official 87:085cde657901 301
mbed_official 532:fe11edbda85c 302 /* Get the BWTR register value */
mbed_official 532:fe11edbda85c 303 tmpr = Device->BWTR[Bank];
mbed_official 532:fe11edbda85c 304
mbed_official 532:fe11edbda85c 305 /* Clear ADDSET, ADDHLD, DATAST, BUSTURN, CLKDIV, DATLAT and ACCMOD bits */
mbed_official 532:fe11edbda85c 306 tmpr &= ((uint32_t)~(FSMC_BWTR1_ADDSET | FSMC_BWTR1_ADDHLD | FSMC_BWTR1_DATAST | \
mbed_official 532:fe11edbda85c 307 FSMC_BWTR1_BUSTURN | FSMC_BWTR1_CLKDIV | FSMC_BWTR1_DATLAT | \
mbed_official 532:fe11edbda85c 308 FSMC_BWTR1_ACCMOD));
mbed_official 532:fe11edbda85c 309
mbed_official 532:fe11edbda85c 310 tmpr |= (uint32_t)(Timing->AddressSetupTime |\
mbed_official 532:fe11edbda85c 311 ((Timing->AddressHoldTime) << 4) |\
mbed_official 532:fe11edbda85c 312 ((Timing->DataSetupTime) << 8) |\
mbed_official 532:fe11edbda85c 313 ((Timing->BusTurnAroundDuration) << 16) |\
mbed_official 532:fe11edbda85c 314 (((Timing->CLKDivision)-1) << 20) |\
mbed_official 532:fe11edbda85c 315 (((Timing->DataLatency)-2) << 24) |\
mbed_official 532:fe11edbda85c 316 (Timing->AccessMode));
mbed_official 532:fe11edbda85c 317
mbed_official 532:fe11edbda85c 318 Device->BWTR[Bank] = tmpr;
mbed_official 87:085cde657901 319 }
mbed_official 87:085cde657901 320 else
mbed_official 87:085cde657901 321 {
mbed_official 87:085cde657901 322 Device->BWTR[Bank] = 0x0FFFFFFF;
mbed_official 87:085cde657901 323 }
mbed_official 87:085cde657901 324
mbed_official 87:085cde657901 325 return HAL_OK;
mbed_official 87:085cde657901 326 }
mbed_official 87:085cde657901 327 /**
mbed_official 87:085cde657901 328 * @}
mbed_official 87:085cde657901 329 */
mbed_official 87:085cde657901 330
mbed_official 532:fe11edbda85c 331 /** @addtogroup FSMC_LL_NORSRAM_Private_Functions_Group2
mbed_official 532:fe11edbda85c 332 * @brief management functions
mbed_official 532:fe11edbda85c 333 *
mbed_official 87:085cde657901 334 @verbatim
mbed_official 87:085cde657901 335 ==============================================================================
mbed_official 87:085cde657901 336 ##### FSMC_NORSRAM Control functions #####
mbed_official 106:ced8cbb51063 337 ==============================================================================
mbed_official 87:085cde657901 338 [..]
mbed_official 87:085cde657901 339 This subsection provides a set of functions allowing to control dynamically
mbed_official 87:085cde657901 340 the FSMC NORSRAM interface.
mbed_official 87:085cde657901 341
mbed_official 87:085cde657901 342 @endverbatim
mbed_official 87:085cde657901 343 * @{
mbed_official 87:085cde657901 344 */
mbed_official 87:085cde657901 345
mbed_official 87:085cde657901 346 /**
mbed_official 87:085cde657901 347 * @brief Enables dynamically FSMC_NORSRAM write operation.
mbed_official 87:085cde657901 348 * @param Device: Pointer to NORSRAM device instance
mbed_official 87:085cde657901 349 * @param Bank: NORSRAM bank number
mbed_official 87:085cde657901 350 * @retval HAL status
mbed_official 87:085cde657901 351 */
mbed_official 87:085cde657901 352 HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Enable(FSMC_NORSRAM_TypeDef *Device, uint32_t Bank)
mbed_official 87:085cde657901 353 {
mbed_official 87:085cde657901 354 /* Enable write operation */
mbed_official 87:085cde657901 355 Device->BTCR[Bank] |= FSMC_WRITE_OPERATION_ENABLE;
mbed_official 87:085cde657901 356
mbed_official 87:085cde657901 357 return HAL_OK;
mbed_official 87:085cde657901 358 }
mbed_official 87:085cde657901 359
mbed_official 87:085cde657901 360 /**
mbed_official 87:085cde657901 361 * @brief Disables dynamically FSMC_NORSRAM write operation.
mbed_official 87:085cde657901 362 * @param Device: Pointer to NORSRAM device instance
mbed_official 87:085cde657901 363 * @param Bank: NORSRAM bank number
mbed_official 87:085cde657901 364 * @retval HAL status
mbed_official 87:085cde657901 365 */
mbed_official 87:085cde657901 366 HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Disable(FSMC_NORSRAM_TypeDef *Device, uint32_t Bank)
mbed_official 87:085cde657901 367 {
mbed_official 87:085cde657901 368 /* Disable write operation */
mbed_official 87:085cde657901 369 Device->BTCR[Bank] &= ~FSMC_WRITE_OPERATION_ENABLE;
mbed_official 87:085cde657901 370
mbed_official 87:085cde657901 371 return HAL_OK;
mbed_official 87:085cde657901 372 }
mbed_official 87:085cde657901 373 /**
mbed_official 87:085cde657901 374 * @}
mbed_official 87:085cde657901 375 */
mbed_official 87:085cde657901 376
mbed_official 87:085cde657901 377 /**
mbed_official 87:085cde657901 378 * @}
mbed_official 87:085cde657901 379 */
mbed_official 87:085cde657901 380
mbed_official 532:fe11edbda85c 381 /** @addtogroup FSMC_LL_NAND
mbed_official 532:fe11edbda85c 382 * @brief NAND Controller functions
mbed_official 87:085cde657901 383 *
mbed_official 87:085cde657901 384 @verbatim
mbed_official 87:085cde657901 385 ==============================================================================
mbed_official 87:085cde657901 386 ##### How to use NAND device driver #####
mbed_official 87:085cde657901 387 ==============================================================================
mbed_official 87:085cde657901 388 [..]
mbed_official 87:085cde657901 389 This driver contains a set of APIs to interface with the FSMC NAND banks in order
mbed_official 87:085cde657901 390 to run the NAND external devices.
mbed_official 87:085cde657901 391
mbed_official 87:085cde657901 392 (+) FSMC NAND bank reset using the function FSMC_NAND_DeInit()
mbed_official 87:085cde657901 393 (+) FSMC NAND bank control configuration using the function FSMC_NAND_Init()
mbed_official 87:085cde657901 394 (+) FSMC NAND bank common space timing configuration using the function
mbed_official 87:085cde657901 395 FSMC_NAND_CommonSpace_Timing_Init()
mbed_official 87:085cde657901 396 (+) FSMC NAND bank attribute space timing configuration using the function
mbed_official 87:085cde657901 397 FSMC_NAND_AttributeSpace_Timing_Init()
mbed_official 87:085cde657901 398 (+) FSMC NAND bank enable/disable ECC correction feature using the functions
mbed_official 87:085cde657901 399 FSMC_NAND_ECC_Enable()/FSMC_NAND_ECC_Disable()
mbed_official 87:085cde657901 400 (+) FSMC NAND bank get ECC correction code using the function FSMC_NAND_GetECC()
mbed_official 87:085cde657901 401
mbed_official 87:085cde657901 402 @endverbatim
mbed_official 87:085cde657901 403 * @{
mbed_official 87:085cde657901 404 */
mbed_official 87:085cde657901 405
mbed_official 532:fe11edbda85c 406 /** @addtogroup FSMC_LL_NAND_Private_Functions_Group1
mbed_official 532:fe11edbda85c 407 * @brief Initialization and Configuration functions
mbed_official 532:fe11edbda85c 408 *
mbed_official 87:085cde657901 409 @verbatim
mbed_official 87:085cde657901 410 ==============================================================================
mbed_official 87:085cde657901 411 ##### Initialization and de_initialization functions #####
mbed_official 87:085cde657901 412 ==============================================================================
mbed_official 87:085cde657901 413 [..]
mbed_official 87:085cde657901 414 This section provides functions allowing to:
mbed_official 87:085cde657901 415 (+) Initialize and configure the FSMC NAND interface
mbed_official 87:085cde657901 416 (+) De-initialize the FSMC NAND interface
mbed_official 87:085cde657901 417 (+) Configure the FSMC clock and associated GPIOs
mbed_official 87:085cde657901 418
mbed_official 87:085cde657901 419 @endverbatim
mbed_official 87:085cde657901 420 * @{
mbed_official 87:085cde657901 421 */
mbed_official 87:085cde657901 422
mbed_official 87:085cde657901 423 /**
mbed_official 87:085cde657901 424 * @brief Initializes the FSMC_NAND device according to the specified
mbed_official 87:085cde657901 425 * control parameters in the FSMC_NAND_HandleTypeDef
mbed_official 87:085cde657901 426 * @param Device: Pointer to NAND device instance
mbed_official 87:085cde657901 427 * @param Init: Pointer to NAND Initialization structure
mbed_official 87:085cde657901 428 * @retval HAL status
mbed_official 87:085cde657901 429 */
mbed_official 87:085cde657901 430 HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_InitTypeDef *Init)
mbed_official 87:085cde657901 431 {
mbed_official 532:fe11edbda85c 432 uint32_t tmpr = 0;
mbed_official 87:085cde657901 433
mbed_official 87:085cde657901 434 /* Check the parameters */
mbed_official 87:085cde657901 435 assert_param(IS_FSMC_NAND_BANK(Init->NandBank));
mbed_official 87:085cde657901 436 assert_param(IS_FSMC_WAIT_FEATURE(Init->Waitfeature));
mbed_official 87:085cde657901 437 assert_param(IS_FSMC_NAND_MEMORY_WIDTH(Init->MemoryDataWidth));
mbed_official 87:085cde657901 438 assert_param(IS_FSMC_ECC_STATE(Init->EccComputation));
mbed_official 87:085cde657901 439 assert_param(IS_FSMC_ECCPAGE_SIZE(Init->ECCPageSize));
mbed_official 87:085cde657901 440 assert_param(IS_FSMC_TCLR_TIME(Init->TCLRSetupTime));
mbed_official 87:085cde657901 441 assert_param(IS_FSMC_TAR_TIME(Init->TARSetupTime));
mbed_official 87:085cde657901 442
mbed_official 532:fe11edbda85c 443 if(Init->NandBank == FSMC_NAND_BANK2)
mbed_official 532:fe11edbda85c 444 {
mbed_official 532:fe11edbda85c 445 /* Get the NAND bank 2 register value */
mbed_official 532:fe11edbda85c 446 tmpr = Device->PCR2;
mbed_official 532:fe11edbda85c 447 }
mbed_official 532:fe11edbda85c 448 else
mbed_official 532:fe11edbda85c 449 {
mbed_official 532:fe11edbda85c 450 /* Get the NAND bank 3 register value */
mbed_official 532:fe11edbda85c 451 tmpr = Device->PCR3;
mbed_official 532:fe11edbda85c 452 }
mbed_official 532:fe11edbda85c 453
mbed_official 532:fe11edbda85c 454 /* Clear PWAITEN, PBKEN, PTYP, PWID, ECCEN, TCLR, TAR and ECCPS bits */
mbed_official 532:fe11edbda85c 455 tmpr &= ((uint32_t)~(FSMC_PCR2_PWAITEN | FSMC_PCR2_PBKEN | FSMC_PCR2_PTYP | \
mbed_official 532:fe11edbda85c 456 FSMC_PCR2_PWID | FSMC_PCR2_ECCEN | FSMC_PCR2_TCLR | \
mbed_official 532:fe11edbda85c 457 FSMC_PCR2_TAR | FSMC_PCR2_ECCPS));
mbed_official 532:fe11edbda85c 458
mbed_official 87:085cde657901 459 /* Set NAND device control parameters */
mbed_official 532:fe11edbda85c 460 tmpr |= (uint32_t)(Init->Waitfeature |\
mbed_official 532:fe11edbda85c 461 FSMC_PCR_MEMORY_TYPE_NAND |\
mbed_official 532:fe11edbda85c 462 Init->MemoryDataWidth |\
mbed_official 532:fe11edbda85c 463 Init->EccComputation |\
mbed_official 532:fe11edbda85c 464 Init->ECCPageSize |\
mbed_official 532:fe11edbda85c 465 ((Init->TCLRSetupTime) << 9) |\
mbed_official 532:fe11edbda85c 466 ((Init->TARSetupTime) << 13));
mbed_official 87:085cde657901 467
mbed_official 87:085cde657901 468 if(Init->NandBank == FSMC_NAND_BANK2)
mbed_official 87:085cde657901 469 {
mbed_official 87:085cde657901 470 /* NAND bank 2 registers configuration */
mbed_official 532:fe11edbda85c 471 Device->PCR2 = tmpr;
mbed_official 87:085cde657901 472 }
mbed_official 87:085cde657901 473 else
mbed_official 87:085cde657901 474 {
mbed_official 87:085cde657901 475 /* NAND bank 3 registers configuration */
mbed_official 532:fe11edbda85c 476 Device->PCR3 = tmpr;
mbed_official 87:085cde657901 477 }
mbed_official 87:085cde657901 478
mbed_official 87:085cde657901 479 return HAL_OK;
mbed_official 87:085cde657901 480 }
mbed_official 87:085cde657901 481
mbed_official 87:085cde657901 482 /**
mbed_official 87:085cde657901 483 * @brief Initializes the FSMC_NAND Common space Timing according to the specified
mbed_official 87:085cde657901 484 * parameters in the FSMC_NAND_PCC_TimingTypeDef
mbed_official 87:085cde657901 485 * @param Device: Pointer to NAND device instance
mbed_official 87:085cde657901 486 * @param Timing: Pointer to NAND timing structure
mbed_official 87:085cde657901 487 * @param Bank: NAND bank number
mbed_official 87:085cde657901 488 * @retval HAL status
mbed_official 87:085cde657901 489 */
mbed_official 87:085cde657901 490 HAL_StatusTypeDef FSMC_NAND_CommonSpace_Timing_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank)
mbed_official 87:085cde657901 491 {
mbed_official 532:fe11edbda85c 492 uint32_t tmpr = 0;
mbed_official 87:085cde657901 493
mbed_official 87:085cde657901 494 /* Check the parameters */
mbed_official 87:085cde657901 495 assert_param(IS_FSMC_SETUP_TIME(Timing->SetupTime));
mbed_official 87:085cde657901 496 assert_param(IS_FSMC_WAIT_TIME(Timing->WaitSetupTime));
mbed_official 87:085cde657901 497 assert_param(IS_FSMC_HOLD_TIME(Timing->HoldSetupTime));
mbed_official 87:085cde657901 498 assert_param(IS_FSMC_HIZ_TIME(Timing->HiZSetupTime));
mbed_official 87:085cde657901 499
mbed_official 532:fe11edbda85c 500 if(Bank == FSMC_NAND_BANK2)
mbed_official 532:fe11edbda85c 501 {
mbed_official 532:fe11edbda85c 502 /* Get the NAND bank 2 register value */
mbed_official 532:fe11edbda85c 503 tmpr = Device->PMEM2;
mbed_official 532:fe11edbda85c 504 }
mbed_official 532:fe11edbda85c 505 else
mbed_official 532:fe11edbda85c 506 {
mbed_official 532:fe11edbda85c 507 /* Get the NAND bank 3 register value */
mbed_official 532:fe11edbda85c 508 tmpr = Device->PMEM3;
mbed_official 532:fe11edbda85c 509 }
mbed_official 532:fe11edbda85c 510
mbed_official 532:fe11edbda85c 511 /* Clear MEMSETx, MEMWAITx, MEMHOLDx and MEMHIZx bits */
mbed_official 532:fe11edbda85c 512 tmpr &= ((uint32_t)~(FSMC_PMEM2_MEMSET2 | FSMC_PMEM2_MEMWAIT2 | FSMC_PMEM2_MEMHOLD2 | \
mbed_official 532:fe11edbda85c 513 FSMC_PMEM2_MEMHIZ2));
mbed_official 532:fe11edbda85c 514
mbed_official 87:085cde657901 515 /* Set FSMC_NAND device timing parameters */
mbed_official 532:fe11edbda85c 516 tmpr |= (uint32_t)(Timing->SetupTime |\
mbed_official 87:085cde657901 517 ((Timing->WaitSetupTime) << 8) |\
mbed_official 87:085cde657901 518 ((Timing->HoldSetupTime) << 16) |\
mbed_official 87:085cde657901 519 ((Timing->HiZSetupTime) << 24)
mbed_official 87:085cde657901 520 );
mbed_official 87:085cde657901 521
mbed_official 87:085cde657901 522 if(Bank == FSMC_NAND_BANK2)
mbed_official 87:085cde657901 523 {
mbed_official 87:085cde657901 524 /* NAND bank 2 registers configuration */
mbed_official 532:fe11edbda85c 525 Device->PMEM2 = tmpr;
mbed_official 87:085cde657901 526 }
mbed_official 87:085cde657901 527 else
mbed_official 87:085cde657901 528 {
mbed_official 87:085cde657901 529 /* NAND bank 3 registers configuration */
mbed_official 532:fe11edbda85c 530 Device->PMEM3 = tmpr;
mbed_official 87:085cde657901 531 }
mbed_official 87:085cde657901 532
mbed_official 87:085cde657901 533 return HAL_OK;
mbed_official 87:085cde657901 534 }
mbed_official 87:085cde657901 535
mbed_official 87:085cde657901 536 /**
mbed_official 87:085cde657901 537 * @brief Initializes the FSMC_NAND Attribute space Timing according to the specified
mbed_official 87:085cde657901 538 * parameters in the FSMC_NAND_PCC_TimingTypeDef
mbed_official 87:085cde657901 539 * @param Device: Pointer to NAND device instance
mbed_official 87:085cde657901 540 * @param Timing: Pointer to NAND timing structure
mbed_official 87:085cde657901 541 * @param Bank: NAND bank number
mbed_official 87:085cde657901 542 * @retval HAL status
mbed_official 87:085cde657901 543 */
mbed_official 87:085cde657901 544 HAL_StatusTypeDef FSMC_NAND_AttributeSpace_Timing_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank)
mbed_official 87:085cde657901 545 {
mbed_official 532:fe11edbda85c 546 uint32_t tmpr = 0;
mbed_official 87:085cde657901 547
mbed_official 87:085cde657901 548 /* Check the parameters */
mbed_official 87:085cde657901 549 assert_param(IS_FSMC_SETUP_TIME(Timing->SetupTime));
mbed_official 87:085cde657901 550 assert_param(IS_FSMC_WAIT_TIME(Timing->WaitSetupTime));
mbed_official 87:085cde657901 551 assert_param(IS_FSMC_HOLD_TIME(Timing->HoldSetupTime));
mbed_official 87:085cde657901 552 assert_param(IS_FSMC_HIZ_TIME(Timing->HiZSetupTime));
mbed_official 87:085cde657901 553
mbed_official 532:fe11edbda85c 554 if(Bank == FSMC_NAND_BANK2)
mbed_official 532:fe11edbda85c 555 {
mbed_official 532:fe11edbda85c 556 /* Get the NAND bank 2 register value */
mbed_official 532:fe11edbda85c 557 tmpr = Device->PATT2;
mbed_official 532:fe11edbda85c 558 }
mbed_official 532:fe11edbda85c 559 else
mbed_official 532:fe11edbda85c 560 {
mbed_official 532:fe11edbda85c 561 /* Get the NAND bank 3 register value */
mbed_official 532:fe11edbda85c 562 tmpr = Device->PATT3;
mbed_official 532:fe11edbda85c 563 }
mbed_official 532:fe11edbda85c 564
mbed_official 532:fe11edbda85c 565 /* Clear ATTSETx, ATTWAITx, ATTHOLDx and ATTHIZx bits */
mbed_official 532:fe11edbda85c 566 tmpr &= ((uint32_t)~(FSMC_PATT2_ATTSET2 | FSMC_PATT2_ATTWAIT2 | FSMC_PATT2_ATTHOLD2 | \
mbed_official 532:fe11edbda85c 567 FSMC_PATT2_ATTHIZ2));
mbed_official 532:fe11edbda85c 568
mbed_official 87:085cde657901 569 /* Set FSMC_NAND device timing parameters */
mbed_official 532:fe11edbda85c 570 tmpr |= (uint32_t)(Timing->SetupTime |\
mbed_official 87:085cde657901 571 ((Timing->WaitSetupTime) << 8) |\
mbed_official 87:085cde657901 572 ((Timing->HoldSetupTime) << 16) |\
mbed_official 87:085cde657901 573 ((Timing->HiZSetupTime) << 24)
mbed_official 87:085cde657901 574 );
mbed_official 87:085cde657901 575
mbed_official 87:085cde657901 576 if(Bank == FSMC_NAND_BANK2)
mbed_official 87:085cde657901 577 {
mbed_official 87:085cde657901 578 /* NAND bank 2 registers configuration */
mbed_official 532:fe11edbda85c 579 Device->PATT2 = tmpr;
mbed_official 87:085cde657901 580 }
mbed_official 87:085cde657901 581 else
mbed_official 87:085cde657901 582 {
mbed_official 87:085cde657901 583 /* NAND bank 3 registers configuration */
mbed_official 532:fe11edbda85c 584 Device->PATT3 = tmpr;
mbed_official 87:085cde657901 585 }
mbed_official 87:085cde657901 586
mbed_official 87:085cde657901 587 return HAL_OK;
mbed_official 87:085cde657901 588 }
mbed_official 87:085cde657901 589
mbed_official 87:085cde657901 590 /**
mbed_official 87:085cde657901 591 * @brief DeInitializes the FSMC_NAND device
mbed_official 87:085cde657901 592 * @param Device: Pointer to NAND device instance
mbed_official 87:085cde657901 593 * @param Bank: NAND bank number
mbed_official 87:085cde657901 594 * @retval HAL status
mbed_official 87:085cde657901 595 */
mbed_official 87:085cde657901 596 HAL_StatusTypeDef FSMC_NAND_DeInit(FSMC_NAND_TypeDef *Device, uint32_t Bank)
mbed_official 87:085cde657901 597 {
mbed_official 87:085cde657901 598 /* Disable the NAND Bank */
mbed_official 87:085cde657901 599 __FSMC_NAND_DISABLE(Device, Bank);
mbed_official 87:085cde657901 600
mbed_official 87:085cde657901 601 /* De-initialize the NAND Bank */
mbed_official 87:085cde657901 602 if(Bank == FSMC_NAND_BANK2)
mbed_official 87:085cde657901 603 {
mbed_official 87:085cde657901 604 /* Set the FSMC_NAND_BANK2 registers to their reset values */
mbed_official 87:085cde657901 605 Device->PCR2 = 0x00000018;
mbed_official 87:085cde657901 606 Device->SR2 = 0x00000040;
mbed_official 87:085cde657901 607 Device->PMEM2 = 0xFCFCFCFC;
mbed_official 87:085cde657901 608 Device->PATT2 = 0xFCFCFCFC;
mbed_official 87:085cde657901 609 }
mbed_official 87:085cde657901 610 /* FSMC_Bank3_NAND */
mbed_official 87:085cde657901 611 else
mbed_official 87:085cde657901 612 {
mbed_official 87:085cde657901 613 /* Set the FSMC_NAND_BANK3 registers to their reset values */
mbed_official 87:085cde657901 614 Device->PCR3 = 0x00000018;
mbed_official 87:085cde657901 615 Device->SR3 = 0x00000040;
mbed_official 87:085cde657901 616 Device->PMEM3 = 0xFCFCFCFC;
mbed_official 87:085cde657901 617 Device->PATT3 = 0xFCFCFCFC;
mbed_official 87:085cde657901 618 }
mbed_official 87:085cde657901 619
mbed_official 87:085cde657901 620 return HAL_OK;
mbed_official 87:085cde657901 621 }
mbed_official 87:085cde657901 622 /**
mbed_official 87:085cde657901 623 * @}
mbed_official 87:085cde657901 624 */
mbed_official 87:085cde657901 625
mbed_official 532:fe11edbda85c 626 /** @addtogroup FSMC_LL_NAND_Private_Functions_Group2
mbed_official 532:fe11edbda85c 627 * @brief management functions
mbed_official 532:fe11edbda85c 628 *
mbed_official 87:085cde657901 629 @verbatim
mbed_official 87:085cde657901 630 ==============================================================================
mbed_official 87:085cde657901 631 ##### FSMC_NAND Control functions #####
mbed_official 87:085cde657901 632 ==============================================================================
mbed_official 87:085cde657901 633 [..]
mbed_official 87:085cde657901 634 This subsection provides a set of functions allowing to control dynamically
mbed_official 87:085cde657901 635 the FSMC NAND interface.
mbed_official 87:085cde657901 636
mbed_official 87:085cde657901 637 @endverbatim
mbed_official 87:085cde657901 638 * @{
mbed_official 87:085cde657901 639 */
mbed_official 87:085cde657901 640
mbed_official 87:085cde657901 641 /**
mbed_official 87:085cde657901 642 * @brief Enables dynamically FSMC_NAND ECC feature.
mbed_official 87:085cde657901 643 * @param Device: Pointer to NAND device instance
mbed_official 87:085cde657901 644 * @param Bank: NAND bank number
mbed_official 87:085cde657901 645 * @retval HAL status
mbed_official 87:085cde657901 646 */
mbed_official 87:085cde657901 647 HAL_StatusTypeDef FSMC_NAND_ECC_Enable(FSMC_NAND_TypeDef *Device, uint32_t Bank)
mbed_official 87:085cde657901 648 {
mbed_official 87:085cde657901 649 /* Enable ECC feature */
mbed_official 87:085cde657901 650 if(Bank == FSMC_NAND_BANK2)
mbed_official 87:085cde657901 651 {
mbed_official 87:085cde657901 652 Device->PCR2 |= FSMC_PCR2_ECCEN;
mbed_official 87:085cde657901 653 }
mbed_official 87:085cde657901 654 else
mbed_official 87:085cde657901 655 {
mbed_official 87:085cde657901 656 Device->PCR3 |= FSMC_PCR3_ECCEN;
mbed_official 87:085cde657901 657 }
mbed_official 87:085cde657901 658
mbed_official 87:085cde657901 659 return HAL_OK;
mbed_official 87:085cde657901 660 }
mbed_official 87:085cde657901 661
mbed_official 87:085cde657901 662 /**
mbed_official 87:085cde657901 663 * @brief Disables dynamically FSMC_NAND ECC feature.
mbed_official 87:085cde657901 664 * @param Device: Pointer to NAND device instance
mbed_official 87:085cde657901 665 * @param Bank: NAND bank number
mbed_official 87:085cde657901 666 * @retval HAL status
mbed_official 87:085cde657901 667 */
mbed_official 87:085cde657901 668 HAL_StatusTypeDef FSMC_NAND_ECC_Disable(FSMC_NAND_TypeDef *Device, uint32_t Bank)
mbed_official 87:085cde657901 669 {
mbed_official 87:085cde657901 670 /* Disable ECC feature */
mbed_official 87:085cde657901 671 if(Bank == FSMC_NAND_BANK2)
mbed_official 87:085cde657901 672 {
mbed_official 87:085cde657901 673 Device->PCR2 &= ~FSMC_PCR2_ECCEN;
mbed_official 87:085cde657901 674 }
mbed_official 87:085cde657901 675 else
mbed_official 87:085cde657901 676 {
mbed_official 87:085cde657901 677 Device->PCR3 &= ~FSMC_PCR3_ECCEN;
mbed_official 87:085cde657901 678 }
mbed_official 87:085cde657901 679
mbed_official 87:085cde657901 680 return HAL_OK;
mbed_official 87:085cde657901 681 }
mbed_official 87:085cde657901 682
mbed_official 87:085cde657901 683 /**
mbed_official 87:085cde657901 684 * @brief Disables dynamically FSMC_NAND ECC feature.
mbed_official 87:085cde657901 685 * @param Device: Pointer to NAND device instance
mbed_official 87:085cde657901 686 * @param ECCval: Pointer to ECC value
mbed_official 87:085cde657901 687 * @param Bank: NAND bank number
mbed_official 87:085cde657901 688 * @param Timeout: Timeout wait value
mbed_official 87:085cde657901 689 * @retval HAL status
mbed_official 87:085cde657901 690 */
mbed_official 87:085cde657901 691 HAL_StatusTypeDef FSMC_NAND_GetECC(FSMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout)
mbed_official 87:085cde657901 692 {
mbed_official 369:2e96f1b71984 693 uint32_t tickstart = 0;
mbed_official 87:085cde657901 694
mbed_official 87:085cde657901 695 /* Check the parameters */
mbed_official 87:085cde657901 696 assert_param(IS_FSMC_NAND_DEVICE(Device));
mbed_official 87:085cde657901 697 assert_param(IS_FSMC_NAND_BANK(Bank));
mbed_official 369:2e96f1b71984 698
mbed_official 369:2e96f1b71984 699 /* Get tick */
mbed_official 369:2e96f1b71984 700 tickstart = HAL_GetTick();
mbed_official 369:2e96f1b71984 701
mbed_official 532:fe11edbda85c 702 /* Wait until FIFO is empty */
mbed_official 532:fe11edbda85c 703 while(__FSMC_NAND_GET_FLAG(Device, Bank, FSMC_FLAG_FEMPT) == RESET)
mbed_official 87:085cde657901 704 {
mbed_official 87:085cde657901 705 /* Check for the Timeout */
mbed_official 87:085cde657901 706 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 707 {
mbed_official 369:2e96f1b71984 708 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 87:085cde657901 709 {
mbed_official 87:085cde657901 710 return HAL_TIMEOUT;
mbed_official 87:085cde657901 711 }
mbed_official 87:085cde657901 712 }
mbed_official 87:085cde657901 713 }
mbed_official 87:085cde657901 714
mbed_official 87:085cde657901 715 if(Bank == FSMC_NAND_BANK2)
mbed_official 87:085cde657901 716 {
mbed_official 87:085cde657901 717 /* Get the ECCR2 register value */
mbed_official 87:085cde657901 718 *ECCval = (uint32_t)Device->ECCR2;
mbed_official 87:085cde657901 719 }
mbed_official 87:085cde657901 720 else
mbed_official 87:085cde657901 721 {
mbed_official 87:085cde657901 722 /* Get the ECCR3 register value */
mbed_official 87:085cde657901 723 *ECCval = (uint32_t)Device->ECCR3;
mbed_official 87:085cde657901 724 }
mbed_official 87:085cde657901 725
mbed_official 87:085cde657901 726 return HAL_OK;
mbed_official 87:085cde657901 727 }
mbed_official 87:085cde657901 728
mbed_official 87:085cde657901 729 /**
mbed_official 87:085cde657901 730 * @}
mbed_official 87:085cde657901 731 */
mbed_official 87:085cde657901 732
mbed_official 87:085cde657901 733 /**
mbed_official 87:085cde657901 734 * @}
mbed_official 87:085cde657901 735 */
mbed_official 87:085cde657901 736
mbed_official 532:fe11edbda85c 737 /** @addtogroup FSMC_LL_PCCARD
mbed_official 87:085cde657901 738 * @brief PCCARD Controller functions
mbed_official 87:085cde657901 739 *
mbed_official 87:085cde657901 740 @verbatim
mbed_official 87:085cde657901 741 ==============================================================================
mbed_official 87:085cde657901 742 ##### How to use PCCARD device driver #####
mbed_official 87:085cde657901 743 ==============================================================================
mbed_official 87:085cde657901 744 [..]
mbed_official 87:085cde657901 745 This driver contains a set of APIs to interface with the FSMC PCCARD bank in order
mbed_official 87:085cde657901 746 to run the PCCARD/compact flash external devices.
mbed_official 87:085cde657901 747
mbed_official 87:085cde657901 748 (+) FSMC PCCARD bank reset using the function FSMC_PCCARD_DeInit()
mbed_official 87:085cde657901 749 (+) FSMC PCCARD bank control configuration using the function FSMC_PCCARD_Init()
mbed_official 87:085cde657901 750 (+) FSMC PCCARD bank common space timing configuration using the function
mbed_official 87:085cde657901 751 FSMC_PCCARD_CommonSpace_Timing_Init()
mbed_official 87:085cde657901 752 (+) FSMC PCCARD bank attribute space timing configuration using the function
mbed_official 87:085cde657901 753 FSMC_PCCARD_AttributeSpace_Timing_Init()
mbed_official 87:085cde657901 754 (+) FSMC PCCARD bank IO space timing configuration using the function
mbed_official 87:085cde657901 755 FSMC_PCCARD_IOSpace_Timing_Init()
mbed_official 87:085cde657901 756
mbed_official 87:085cde657901 757 @endverbatim
mbed_official 87:085cde657901 758 * @{
mbed_official 87:085cde657901 759 */
mbed_official 87:085cde657901 760
mbed_official 532:fe11edbda85c 761 /** @addtogroup FSMC_LL_PCCARD_Private_Functions_Group1
mbed_official 532:fe11edbda85c 762 * @brief Initialization and Configuration functions
mbed_official 532:fe11edbda85c 763 *
mbed_official 87:085cde657901 764 @verbatim
mbed_official 87:085cde657901 765 ==============================================================================
mbed_official 87:085cde657901 766 ##### Initialization and de_initialization functions #####
mbed_official 87:085cde657901 767 ==============================================================================
mbed_official 87:085cde657901 768 [..]
mbed_official 87:085cde657901 769 This section provides functions allowing to:
mbed_official 87:085cde657901 770 (+) Initialize and configure the FSMC PCCARD interface
mbed_official 87:085cde657901 771 (+) De-initialize the FSMC PCCARD interface
mbed_official 87:085cde657901 772 (+) Configure the FSMC clock and associated GPIOs
mbed_official 87:085cde657901 773
mbed_official 87:085cde657901 774 @endverbatim
mbed_official 87:085cde657901 775 * @{
mbed_official 87:085cde657901 776 */
mbed_official 87:085cde657901 777
mbed_official 87:085cde657901 778 /**
mbed_official 87:085cde657901 779 * @brief Initializes the FSMC_PCCARD device according to the specified
mbed_official 87:085cde657901 780 * control parameters in the FSMC_PCCARD_HandleTypeDef
mbed_official 87:085cde657901 781 * @param Device: Pointer to PCCARD device instance
mbed_official 87:085cde657901 782 * @param Init: Pointer to PCCARD Initialization structure
mbed_official 87:085cde657901 783 * @retval HAL status
mbed_official 87:085cde657901 784 */
mbed_official 87:085cde657901 785 HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, FSMC_PCCARD_InitTypeDef *Init)
mbed_official 87:085cde657901 786 {
mbed_official 532:fe11edbda85c 787 uint32_t tmpr = 0;
mbed_official 532:fe11edbda85c 788
mbed_official 87:085cde657901 789 /* Check the parameters */
mbed_official 87:085cde657901 790 assert_param(IS_FSMC_WAIT_FEATURE(Init->Waitfeature));
mbed_official 87:085cde657901 791 assert_param(IS_FSMC_TCLR_TIME(Init->TCLRSetupTime));
mbed_official 87:085cde657901 792 assert_param(IS_FSMC_TAR_TIME(Init->TARSetupTime));
mbed_official 87:085cde657901 793
mbed_official 532:fe11edbda85c 794 /* Get PCCARD control register value */
mbed_official 532:fe11edbda85c 795 tmpr = Device->PCR4;
mbed_official 532:fe11edbda85c 796
mbed_official 532:fe11edbda85c 797 /* Clear TAR, TCLR, PWAITEN and PWID bits */
mbed_official 532:fe11edbda85c 798 tmpr &= ((uint32_t)~(FSMC_PCR4_TAR | FSMC_PCR4_TCLR | FSMC_PCR4_PWAITEN | \
mbed_official 532:fe11edbda85c 799 FSMC_PCR4_PWID));
mbed_official 532:fe11edbda85c 800
mbed_official 87:085cde657901 801 /* Set FSMC_PCCARD device control parameters */
mbed_official 532:fe11edbda85c 802 tmpr |= (uint32_t)(Init->Waitfeature |\
mbed_official 532:fe11edbda85c 803 FSMC_NAND_PCC_MEM_BUS_WIDTH_16 |\
mbed_official 532:fe11edbda85c 804 (Init->TCLRSetupTime << 9) |\
mbed_official 532:fe11edbda85c 805 (Init->TARSetupTime << 13));
mbed_official 532:fe11edbda85c 806
mbed_official 532:fe11edbda85c 807 Device->PCR4 = tmpr;
mbed_official 87:085cde657901 808
mbed_official 87:085cde657901 809 return HAL_OK;
mbed_official 87:085cde657901 810 }
mbed_official 87:085cde657901 811
mbed_official 87:085cde657901 812 /**
mbed_official 87:085cde657901 813 * @brief Initializes the FSMC_PCCARD Common space Timing according to the specified
mbed_official 87:085cde657901 814 * parameters in the FSMC_NAND_PCC_TimingTypeDef
mbed_official 87:085cde657901 815 * @param Device: Pointer to PCCARD device instance
mbed_official 87:085cde657901 816 * @param Timing: Pointer to PCCARD timing structure
mbed_official 87:085cde657901 817 * @retval HAL status
mbed_official 87:085cde657901 818 */
mbed_official 87:085cde657901 819 HAL_StatusTypeDef FSMC_PCCARD_CommonSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing)
mbed_official 87:085cde657901 820 {
mbed_official 532:fe11edbda85c 821 uint32_t tmpr = 0;
mbed_official 532:fe11edbda85c 822
mbed_official 87:085cde657901 823 /* Check the parameters */
mbed_official 87:085cde657901 824 assert_param(IS_FSMC_SETUP_TIME(Timing->SetupTime));
mbed_official 87:085cde657901 825 assert_param(IS_FSMC_WAIT_TIME(Timing->WaitSetupTime));
mbed_official 87:085cde657901 826 assert_param(IS_FSMC_HOLD_TIME(Timing->HoldSetupTime));
mbed_official 87:085cde657901 827 assert_param(IS_FSMC_HIZ_TIME(Timing->HiZSetupTime));
mbed_official 87:085cde657901 828
mbed_official 532:fe11edbda85c 829 /* Get PCCARD common space timing register value */
mbed_official 532:fe11edbda85c 830 tmpr = Device->PMEM4;
mbed_official 532:fe11edbda85c 831
mbed_official 532:fe11edbda85c 832 /* Clear MEMSETx, MEMWAITx, MEMHOLDx and MEMHIZx bits */
mbed_official 532:fe11edbda85c 833 tmpr &= ((uint32_t)~(FSMC_PMEM4_MEMSET4 | FSMC_PMEM4_MEMWAIT4 | FSMC_PMEM4_MEMHOLD4 | \
mbed_official 532:fe11edbda85c 834 FSMC_PMEM4_MEMHIZ4));
mbed_official 87:085cde657901 835 /* Set PCCARD timing parameters */
mbed_official 532:fe11edbda85c 836 tmpr |= (uint32_t)((Timing->SetupTime |\
mbed_official 532:fe11edbda85c 837 ((Timing->WaitSetupTime) << 8) |\
mbed_official 532:fe11edbda85c 838 (Timing->HoldSetupTime) << 16) |\
mbed_official 532:fe11edbda85c 839 ((Timing->HiZSetupTime) << 24));
mbed_official 532:fe11edbda85c 840
mbed_official 532:fe11edbda85c 841 Device->PMEM4 = tmpr;
mbed_official 532:fe11edbda85c 842
mbed_official 87:085cde657901 843 return HAL_OK;
mbed_official 87:085cde657901 844 }
mbed_official 87:085cde657901 845
mbed_official 87:085cde657901 846 /**
mbed_official 87:085cde657901 847 * @brief Initializes the FSMC_PCCARD Attribute space Timing according to the specified
mbed_official 87:085cde657901 848 * parameters in the FSMC_NAND_PCC_TimingTypeDef
mbed_official 87:085cde657901 849 * @param Device: Pointer to PCCARD device instance
mbed_official 87:085cde657901 850 * @param Timing: Pointer to PCCARD timing structure
mbed_official 87:085cde657901 851 * @retval HAL status
mbed_official 87:085cde657901 852 */
mbed_official 87:085cde657901 853 HAL_StatusTypeDef FSMC_PCCARD_AttributeSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing)
mbed_official 87:085cde657901 854 {
mbed_official 532:fe11edbda85c 855 uint32_t tmpr = 0;
mbed_official 532:fe11edbda85c 856
mbed_official 87:085cde657901 857 /* Check the parameters */
mbed_official 87:085cde657901 858 assert_param(IS_FSMC_SETUP_TIME(Timing->SetupTime));
mbed_official 87:085cde657901 859 assert_param(IS_FSMC_WAIT_TIME(Timing->WaitSetupTime));
mbed_official 87:085cde657901 860 assert_param(IS_FSMC_HOLD_TIME(Timing->HoldSetupTime));
mbed_official 87:085cde657901 861 assert_param(IS_FSMC_HIZ_TIME(Timing->HiZSetupTime));
mbed_official 87:085cde657901 862
mbed_official 532:fe11edbda85c 863 /* Get PCCARD timing parameters */
mbed_official 532:fe11edbda85c 864 tmpr = Device->PATT4;
mbed_official 532:fe11edbda85c 865
mbed_official 532:fe11edbda85c 866 /* Clear ATTSETx, ATTWAITx, ATTHOLDx and ATTHIZx bits */
mbed_official 532:fe11edbda85c 867 tmpr &= ((uint32_t)~(FSMC_PATT4_ATTSET4 | FSMC_PATT4_ATTWAIT4 | FSMC_PATT4_ATTHOLD4 | \
mbed_official 532:fe11edbda85c 868 FSMC_PATT4_ATTHIZ4));
mbed_official 532:fe11edbda85c 869
mbed_official 87:085cde657901 870 /* Set PCCARD timing parameters */
mbed_official 532:fe11edbda85c 871 tmpr |= (uint32_t)(Timing->SetupTime |\
mbed_official 532:fe11edbda85c 872 ((Timing->WaitSetupTime) << 8) |\
mbed_official 532:fe11edbda85c 873 ((Timing->HoldSetupTime) << 16) |\
mbed_official 532:fe11edbda85c 874 ((Timing->HiZSetupTime) << 24));
mbed_official 532:fe11edbda85c 875 Device->PATT4 = tmpr;
mbed_official 87:085cde657901 876
mbed_official 87:085cde657901 877 return HAL_OK;
mbed_official 87:085cde657901 878 }
mbed_official 87:085cde657901 879
mbed_official 87:085cde657901 880 /**
mbed_official 87:085cde657901 881 * @brief Initializes the FSMC_PCCARD IO space Timing according to the specified
mbed_official 87:085cde657901 882 * parameters in the FSMC_NAND_PCC_TimingTypeDef
mbed_official 87:085cde657901 883 * @param Device: Pointer to PCCARD device instance
mbed_official 87:085cde657901 884 * @param Timing: Pointer to PCCARD timing structure
mbed_official 87:085cde657901 885 * @retval HAL status
mbed_official 87:085cde657901 886 */
mbed_official 87:085cde657901 887 HAL_StatusTypeDef FSMC_PCCARD_IOSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing)
mbed_official 87:085cde657901 888 {
mbed_official 532:fe11edbda85c 889 uint32_t tmpr = 0;
mbed_official 532:fe11edbda85c 890
mbed_official 87:085cde657901 891 /* Check the parameters */
mbed_official 87:085cde657901 892 assert_param(IS_FSMC_SETUP_TIME(Timing->SetupTime));
mbed_official 87:085cde657901 893 assert_param(IS_FSMC_WAIT_TIME(Timing->WaitSetupTime));
mbed_official 87:085cde657901 894 assert_param(IS_FSMC_HOLD_TIME(Timing->HoldSetupTime));
mbed_official 87:085cde657901 895 assert_param(IS_FSMC_HIZ_TIME(Timing->HiZSetupTime));
mbed_official 87:085cde657901 896
mbed_official 532:fe11edbda85c 897 /* Get FSMC_PCCARD device timing parameters */
mbed_official 532:fe11edbda85c 898 tmpr = Device->PIO4;
mbed_official 532:fe11edbda85c 899
mbed_official 532:fe11edbda85c 900 /* Clear IOSET4, IOWAIT4, IOHOLD4 and IOHIZ4 bits */
mbed_official 532:fe11edbda85c 901 tmpr &= ((uint32_t)~(FSMC_PIO4_IOSET4 | FSMC_PIO4_IOWAIT4 | FSMC_PIO4_IOHOLD4 | \
mbed_official 532:fe11edbda85c 902 FSMC_PIO4_IOHIZ4));
mbed_official 532:fe11edbda85c 903
mbed_official 87:085cde657901 904 /* Set FSMC_PCCARD device timing parameters */
mbed_official 532:fe11edbda85c 905 tmpr |= (uint32_t)(Timing->SetupTime |\
mbed_official 532:fe11edbda85c 906 ((Timing->WaitSetupTime) << 8) |\
mbed_official 532:fe11edbda85c 907 ((Timing->HoldSetupTime) << 16) |\
mbed_official 532:fe11edbda85c 908 ((Timing->HiZSetupTime) << 24));
mbed_official 532:fe11edbda85c 909
mbed_official 532:fe11edbda85c 910 Device->PIO4 = tmpr;
mbed_official 87:085cde657901 911
mbed_official 87:085cde657901 912 return HAL_OK;
mbed_official 87:085cde657901 913 }
mbed_official 87:085cde657901 914
mbed_official 87:085cde657901 915 /**
mbed_official 87:085cde657901 916 * @brief DeInitializes the FSMC_PCCARD device
mbed_official 87:085cde657901 917 * @param Device: Pointer to PCCARD device instance
mbed_official 87:085cde657901 918 * @retval HAL status
mbed_official 87:085cde657901 919 */
mbed_official 87:085cde657901 920 HAL_StatusTypeDef FSMC_PCCARD_DeInit(FSMC_PCCARD_TypeDef *Device)
mbed_official 87:085cde657901 921 {
mbed_official 87:085cde657901 922 /* Disable the FSMC_PCCARD device */
mbed_official 87:085cde657901 923 __FSMC_PCCARD_DISABLE(Device);
mbed_official 87:085cde657901 924
mbed_official 87:085cde657901 925 /* De-initialize the FSMC_PCCARD device */
mbed_official 87:085cde657901 926 Device->PCR4 = 0x00000018;
mbed_official 87:085cde657901 927 Device->SR4 = 0x00000000;
mbed_official 87:085cde657901 928 Device->PMEM4 = 0xFCFCFCFC;
mbed_official 87:085cde657901 929 Device->PATT4 = 0xFCFCFCFC;
mbed_official 87:085cde657901 930 Device->PIO4 = 0xFCFCFCFC;
mbed_official 87:085cde657901 931
mbed_official 87:085cde657901 932 return HAL_OK;
mbed_official 87:085cde657901 933 }
mbed_official 87:085cde657901 934 /**
mbed_official 87:085cde657901 935 * @}
mbed_official 87:085cde657901 936 */
mbed_official 87:085cde657901 937
mbed_official 87:085cde657901 938 /**
mbed_official 87:085cde657901 939 * @}
mbed_official 87:085cde657901 940 */
mbed_official 87:085cde657901 941
mbed_official 532:fe11edbda85c 942 /**
mbed_official 532:fe11edbda85c 943 * @}
mbed_official 532:fe11edbda85c 944 */
mbed_official 87:085cde657901 945 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
mbed_official 532:fe11edbda85c 946 #endif /* HAL_SRAM_MODULE_ENABLED || HAL_NOR_MODULE_ENABLED || HAL_NAND_MODULE_ENABLED || HAL_PCCARD_MODULE_ENABLED */
mbed_official 87:085cde657901 947
mbed_official 87:085cde657901 948 /**
mbed_official 87:085cde657901 949 * @}
mbed_official 87:085cde657901 950 */
mbed_official 87:085cde657901 951
mbed_official 87:085cde657901 952 /**
mbed_official 87:085cde657901 953 * @}
mbed_official 87:085cde657901 954 */
mbed_official 87:085cde657901 955 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/