mbed library sources
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targets/hal/TARGET_Atmel/TARGET_SAM21/drivers/dma/dma_crc.h@592:a274ee790e56, 2015-07-17 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Jul 17 09:15:10 2015 +0100
- Revision:
- 592:a274ee790e56
- Parent:
- 579:53297373a894
Synchronized with git revision e7144f83a8d75df80c4877936b6ffe552b0be9e6
Full URL: https://github.com/mbedmicro/mbed/commit/e7144f83a8d75df80c4877936b6ffe552b0be9e6/
More API implementation for SAMR21
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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mbed_official | 579:53297373a894 | 1 | #ifndef DMA_CRC_H_INCLUDED |
mbed_official | 579:53297373a894 | 2 | #define DMA_CRC_H_INCLUDED |
mbed_official | 579:53297373a894 | 3 | |
mbed_official | 579:53297373a894 | 4 | #include <compiler.h> |
mbed_official | 579:53297373a894 | 5 | |
mbed_official | 579:53297373a894 | 6 | #ifdef __cplusplus |
mbed_official | 579:53297373a894 | 7 | extern "C" { |
mbed_official | 579:53297373a894 | 8 | #endif |
mbed_official | 579:53297373a894 | 9 | |
mbed_official | 579:53297373a894 | 10 | /** DMA channel n offset. */ |
mbed_official | 579:53297373a894 | 11 | #define DMA_CRC_CHANNEL_N_OFFSET 0x20 |
mbed_official | 579:53297373a894 | 12 | |
mbed_official | 579:53297373a894 | 13 | /** CRC Polynomial Type. */ |
mbed_official | 579:53297373a894 | 14 | enum crc_polynomial_type { |
mbed_official | 579:53297373a894 | 15 | /** CRC16 (CRC-CCITT). */ |
mbed_official | 579:53297373a894 | 16 | CRC_TYPE_16, |
mbed_official | 579:53297373a894 | 17 | /** CRC32 (IEEE 802.3). */ |
mbed_official | 579:53297373a894 | 18 | CRC_TYPE_32, |
mbed_official | 579:53297373a894 | 19 | }; |
mbed_official | 579:53297373a894 | 20 | |
mbed_official | 579:53297373a894 | 21 | /** CRC Beat Type. */ |
mbed_official | 579:53297373a894 | 22 | enum crc_beat_size { |
mbed_official | 579:53297373a894 | 23 | /** Byte bus access. */ |
mbed_official | 579:53297373a894 | 24 | CRC_BEAT_SIZE_BYTE, |
mbed_official | 579:53297373a894 | 25 | /** Half-word bus access. */ |
mbed_official | 579:53297373a894 | 26 | CRC_BEAT_SIZE_HWORD, |
mbed_official | 579:53297373a894 | 27 | /** Word bus access. */ |
mbed_official | 579:53297373a894 | 28 | CRC_BEAT_SIZE_WORD, |
mbed_official | 579:53297373a894 | 29 | }; |
mbed_official | 579:53297373a894 | 30 | |
mbed_official | 579:53297373a894 | 31 | /** Configurations for CRC calculation. */ |
mbed_official | 579:53297373a894 | 32 | struct dma_crc_config { |
mbed_official | 579:53297373a894 | 33 | /** CRC polynomial type. */ |
mbed_official | 579:53297373a894 | 34 | enum crc_polynomial_type type; |
mbed_official | 579:53297373a894 | 35 | /** CRC beat size. */ |
mbed_official | 579:53297373a894 | 36 | enum crc_beat_size size; |
mbed_official | 579:53297373a894 | 37 | }; |
mbed_official | 579:53297373a894 | 38 | |
mbed_official | 579:53297373a894 | 39 | /** |
mbed_official | 579:53297373a894 | 40 | * \brief Get DMA CRC default configurations. |
mbed_official | 579:53297373a894 | 41 | * |
mbed_official | 579:53297373a894 | 42 | * The default configuration is as follows: |
mbed_official | 579:53297373a894 | 43 | * \li Polynomial type is set to CRC-16(CRC-CCITT) |
mbed_official | 579:53297373a894 | 44 | * \li CRC Beat size: BYTE |
mbed_official | 579:53297373a894 | 45 | * |
mbed_official | 579:53297373a894 | 46 | * \param[in] config default configurations |
mbed_official | 579:53297373a894 | 47 | */ |
mbed_official | 579:53297373a894 | 48 | static inline void dma_crc_get_config_defaults(struct dma_crc_config *config) |
mbed_official | 579:53297373a894 | 49 | { |
mbed_official | 579:53297373a894 | 50 | Assert(config); |
mbed_official | 579:53297373a894 | 51 | |
mbed_official | 579:53297373a894 | 52 | config->type = CRC_TYPE_16; |
mbed_official | 579:53297373a894 | 53 | config->size = CRC_BEAT_SIZE_BYTE; |
mbed_official | 579:53297373a894 | 54 | } |
mbed_official | 579:53297373a894 | 55 | |
mbed_official | 579:53297373a894 | 56 | /** |
mbed_official | 579:53297373a894 | 57 | * \brief Enable DMA CRC module with an DMA channel. |
mbed_official | 579:53297373a894 | 58 | * |
mbed_official | 579:53297373a894 | 59 | * This function enables a CRC calculation with an allocated DMA channel. This channel ID |
mbed_official | 579:53297373a894 | 60 | * can be gotten from a successful \ref dma_allocate. |
mbed_official | 579:53297373a894 | 61 | * |
mbed_official | 579:53297373a894 | 62 | * \param[in] channel_id DMA channel expected with CRC calculation |
mbed_official | 579:53297373a894 | 63 | * \param[in] config CRC calculation configurations |
mbed_official | 579:53297373a894 | 64 | * |
mbed_official | 579:53297373a894 | 65 | * \return Status of the DMC CRC. |
mbed_official | 579:53297373a894 | 66 | * \retval STATUS_OK Get the DMA CRC module |
mbed_official | 579:53297373a894 | 67 | * \retval STATUS_BUSY DMA CRC module is already taken and not ready yet |
mbed_official | 579:53297373a894 | 68 | */ |
mbed_official | 579:53297373a894 | 69 | static inline enum status_code dma_crc_channel_enable(uint32_t channel_id, |
mbed_official | 579:53297373a894 | 70 | struct dma_crc_config *config) |
mbed_official | 579:53297373a894 | 71 | { |
mbed_official | 579:53297373a894 | 72 | if (DMAC->CRCSTATUS.reg & DMAC_CRCSTATUS_CRCBUSY) { |
mbed_official | 579:53297373a894 | 73 | return STATUS_BUSY; |
mbed_official | 579:53297373a894 | 74 | } |
mbed_official | 579:53297373a894 | 75 | |
mbed_official | 579:53297373a894 | 76 | DMAC->CRCCTRL.reg = DMAC_CRCCTRL_CRCBEATSIZE(config->size) | |
mbed_official | 579:53297373a894 | 77 | DMAC_CRCCTRL_CRCPOLY(config->type) | |
mbed_official | 579:53297373a894 | 78 | DMAC_CRCCTRL_CRCSRC(channel_id+DMA_CRC_CHANNEL_N_OFFSET); |
mbed_official | 579:53297373a894 | 79 | |
mbed_official | 579:53297373a894 | 80 | DMAC->CTRL.reg |= DMAC_CTRL_CRCENABLE; |
mbed_official | 579:53297373a894 | 81 | |
mbed_official | 579:53297373a894 | 82 | return STATUS_OK; |
mbed_official | 579:53297373a894 | 83 | } |
mbed_official | 579:53297373a894 | 84 | |
mbed_official | 579:53297373a894 | 85 | /** |
mbed_official | 579:53297373a894 | 86 | * \brief Disable DMA CRC module. |
mbed_official | 579:53297373a894 | 87 | * |
mbed_official | 579:53297373a894 | 88 | */ |
mbed_official | 579:53297373a894 | 89 | static inline void dma_crc_disable(void) |
mbed_official | 579:53297373a894 | 90 | { |
mbed_official | 579:53297373a894 | 91 | DMAC->CTRL.reg &= ~DMAC_CTRL_CRCENABLE; |
mbed_official | 579:53297373a894 | 92 | DMAC->CRCCTRL.reg = 0; |
mbed_official | 579:53297373a894 | 93 | } |
mbed_official | 579:53297373a894 | 94 | |
mbed_official | 579:53297373a894 | 95 | /** |
mbed_official | 579:53297373a894 | 96 | * \brief Get DMA CRC checksum value. |
mbed_official | 579:53297373a894 | 97 | * |
mbed_official | 579:53297373a894 | 98 | * \return Calculated CRC checksum. |
mbed_official | 579:53297373a894 | 99 | */ |
mbed_official | 579:53297373a894 | 100 | static inline uint32_t dma_crc_get_checksum(void) |
mbed_official | 579:53297373a894 | 101 | { |
mbed_official | 579:53297373a894 | 102 | if (DMAC->CRCCTRL.bit.CRCSRC == DMAC_CRCCTRL_CRCSRC_IO_Val) { |
mbed_official | 579:53297373a894 | 103 | DMAC->CRCSTATUS.reg = DMAC_CRCSTATUS_CRCBUSY; |
mbed_official | 579:53297373a894 | 104 | } |
mbed_official | 579:53297373a894 | 105 | |
mbed_official | 579:53297373a894 | 106 | return DMAC->CRCCHKSUM.reg; |
mbed_official | 579:53297373a894 | 107 | } |
mbed_official | 579:53297373a894 | 108 | |
mbed_official | 579:53297373a894 | 109 | /** |
mbed_official | 579:53297373a894 | 110 | * \brief Enable DMA CRC module with I/O. |
mbed_official | 579:53297373a894 | 111 | * |
mbed_official | 579:53297373a894 | 112 | * This function enables a CRC calculation with I/O mode. |
mbed_official | 579:53297373a894 | 113 | * |
mbed_official | 579:53297373a894 | 114 | * \param[in] config CRC calculation configurations. |
mbed_official | 579:53297373a894 | 115 | * |
mbed_official | 579:53297373a894 | 116 | * \return Status of the DMC CRC. |
mbed_official | 579:53297373a894 | 117 | * \retval STATUS_OK Get the DMA CRC module |
mbed_official | 579:53297373a894 | 118 | * \retval STATUS_BUSY DMA CRC module is already taken and not ready yet |
mbed_official | 579:53297373a894 | 119 | */ |
mbed_official | 579:53297373a894 | 120 | static inline enum status_code dma_crc_io_enable( |
mbed_official | 579:53297373a894 | 121 | struct dma_crc_config *config) |
mbed_official | 579:53297373a894 | 122 | { |
mbed_official | 579:53297373a894 | 123 | if (DMAC->CRCSTATUS.reg & DMAC_CRCSTATUS_CRCBUSY) { |
mbed_official | 579:53297373a894 | 124 | return STATUS_BUSY; |
mbed_official | 579:53297373a894 | 125 | } |
mbed_official | 579:53297373a894 | 126 | |
mbed_official | 579:53297373a894 | 127 | if (DMAC->CTRL.reg & DMAC_CTRL_CRCENABLE) { |
mbed_official | 579:53297373a894 | 128 | return STATUS_BUSY; |
mbed_official | 579:53297373a894 | 129 | } |
mbed_official | 579:53297373a894 | 130 | |
mbed_official | 579:53297373a894 | 131 | DMAC->CRCCTRL.reg = DMAC_CRCCTRL_CRCBEATSIZE(config->size) | |
mbed_official | 579:53297373a894 | 132 | DMAC_CRCCTRL_CRCPOLY(config->type) | |
mbed_official | 579:53297373a894 | 133 | DMAC_CRCCTRL_CRCSRC_IO; |
mbed_official | 579:53297373a894 | 134 | |
mbed_official | 579:53297373a894 | 135 | if (config->type == CRC_TYPE_32) { |
mbed_official | 579:53297373a894 | 136 | DMAC->CRCCHKSUM.reg = 0xFFFFFFFF; |
mbed_official | 579:53297373a894 | 137 | } |
mbed_official | 579:53297373a894 | 138 | |
mbed_official | 579:53297373a894 | 139 | DMAC->CTRL.reg |= DMAC_CTRL_CRCENABLE; |
mbed_official | 579:53297373a894 | 140 | |
mbed_official | 579:53297373a894 | 141 | return STATUS_OK; |
mbed_official | 579:53297373a894 | 142 | } |
mbed_official | 579:53297373a894 | 143 | |
mbed_official | 579:53297373a894 | 144 | /** |
mbed_official | 579:53297373a894 | 145 | * \brief Calculate CRC with I/O. |
mbed_official | 579:53297373a894 | 146 | * |
mbed_official | 579:53297373a894 | 147 | * This function calculate the CRC of the input data buffer. |
mbed_official | 579:53297373a894 | 148 | * |
mbed_official | 579:53297373a894 | 149 | * \param[in] buffer CRC Pointer to calculation buffer |
mbed_official | 579:53297373a894 | 150 | * \param[in] total_beat_size Total beat size to be calculated |
mbed_official | 579:53297373a894 | 151 | * |
mbed_official | 579:53297373a894 | 152 | * \return Calculated CRC checksum value. |
mbed_official | 579:53297373a894 | 153 | */ |
mbed_official | 579:53297373a894 | 154 | static inline void dma_crc_io_calculation(void *buffer, |
mbed_official | 579:53297373a894 | 155 | uint32_t total_beat_size) |
mbed_official | 579:53297373a894 | 156 | { |
mbed_official | 579:53297373a894 | 157 | uint32_t counter = total_beat_size; |
mbed_official | 579:53297373a894 | 158 | uint8_t *buffer_8; |
mbed_official | 579:53297373a894 | 159 | uint16_t *buffer_16; |
mbed_official | 579:53297373a894 | 160 | uint32_t *buffer_32; |
mbed_official | 579:53297373a894 | 161 | |
mbed_official | 579:53297373a894 | 162 | for (counter=0; counter<total_beat_size; counter++) { |
mbed_official | 579:53297373a894 | 163 | if (DMAC->CRCCTRL.bit.CRCBEATSIZE == CRC_BEAT_SIZE_BYTE) { |
mbed_official | 579:53297373a894 | 164 | buffer_8 = buffer; |
mbed_official | 579:53297373a894 | 165 | DMAC->CRCDATAIN.reg = buffer_8[counter]; |
mbed_official | 579:53297373a894 | 166 | } else if (DMAC->CRCCTRL.bit.CRCBEATSIZE == CRC_BEAT_SIZE_HWORD) { |
mbed_official | 579:53297373a894 | 167 | buffer_16 = buffer; |
mbed_official | 579:53297373a894 | 168 | DMAC->CRCDATAIN.reg = buffer_16[counter]; |
mbed_official | 579:53297373a894 | 169 | } else if (DMAC->CRCCTRL.bit.CRCBEATSIZE == CRC_BEAT_SIZE_WORD) { |
mbed_official | 579:53297373a894 | 170 | buffer_32 = buffer; |
mbed_official | 579:53297373a894 | 171 | DMAC->CRCDATAIN.reg = buffer_32[counter]; |
mbed_official | 579:53297373a894 | 172 | } |
mbed_official | 579:53297373a894 | 173 | /* Wait several cycle to make sure CRC complete */ |
mbed_official | 579:53297373a894 | 174 | nop(); |
mbed_official | 579:53297373a894 | 175 | nop(); |
mbed_official | 579:53297373a894 | 176 | nop(); |
mbed_official | 579:53297373a894 | 177 | nop(); |
mbed_official | 579:53297373a894 | 178 | } |
mbed_official | 579:53297373a894 | 179 | } |
mbed_official | 579:53297373a894 | 180 | |
mbed_official | 579:53297373a894 | 181 | #ifdef __cplusplus |
mbed_official | 579:53297373a894 | 182 | } |
mbed_official | 579:53297373a894 | 183 | #endif |
mbed_official | 579:53297373a894 | 184 | |
mbed_official | 579:53297373a894 | 185 | #endif /* DMA_CRC_H_INCLUDED */ |