marcus chiou
mbed library sources
Fork of
mbed-src
by 
mbed official
targets/hal/TARGET_Atmel/TARGET_SAM21/drivers/dma/dma.h@592:a274ee790e56, 2015-07-17 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Jul 17 09:15:10 2015 +0100
- Revision:
- 592:a274ee790e56
- Parent:
- 579:53297373a894
Synchronized with git revision e7144f83a8d75df80c4877936b6ffe552b0be9e6
Full URL: https://github.com/mbedmicro/mbed/commit/e7144f83a8d75df80c4877936b6ffe552b0be9e6/
More API implementation for SAMR21
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 579:53297373a894 | 1 | #ifndef DMA_H_INCLUDED |
| mbed_official | 579:53297373a894 | 2 | #define DMA_H_INCLUDED |
| mbed_official | 579:53297373a894 | 3 | |
| mbed_official | 579:53297373a894 | 4 | #ifdef __cplusplus |
| mbed_official | 579:53297373a894 | 5 | extern "C" { |
| mbed_official | 579:53297373a894 | 6 | #endif |
| mbed_official | 579:53297373a894 | 7 | |
| mbed_official | 579:53297373a894 | 8 | /** |
| mbed_official | 579:53297373a894 | 9 | * \defgroup asfdoc_sam0_dma_group SAM Direct Memory Access Controller Driver (DMAC) |
| mbed_official | 579:53297373a894 | 10 | * |
| mbed_official | 579:53297373a894 | 11 | * This driver for Atmel庐 | SMART SAM devices provides an interface for the configuration |
| mbed_official | 579:53297373a894 | 12 | * and management of the Direct Memory Access Controller(DMAC) module within |
| mbed_official | 579:53297373a894 | 13 | * the device. The DMAC can transfer data between memories and peripherals, and |
| mbed_official | 579:53297373a894 | 14 | * thus off-load these tasks from the CPU. The module supports peripheral to |
| mbed_official | 579:53297373a894 | 15 | * peripheral, peripheral to memory, memory to peripheral, and memory to memory |
| mbed_official | 579:53297373a894 | 16 | * transfers. |
| mbed_official | 579:53297373a894 | 17 | * |
| mbed_official | 579:53297373a894 | 18 | * The following peripherals are used by the DMAC Driver: |
| mbed_official | 579:53297373a894 | 19 | * - DMAC (Direct Memory Access Controller) |
| mbed_official | 579:53297373a894 | 20 | * |
| mbed_official | 579:53297373a894 | 21 | * The following devices can use this module: |
| mbed_official | 579:53297373a894 | 22 | * - Atmel | SMART SAM D21 |
| mbed_official | 579:53297373a894 | 23 | * - Atmel | SMART SAM R21 |
| mbed_official | 579:53297373a894 | 24 | * - Atmel | SMART SAM D10/D11 |
| mbed_official | 579:53297373a894 | 25 | * - Atmel | SMART SAM L21 |
| mbed_official | 579:53297373a894 | 26 | * |
| mbed_official | 579:53297373a894 | 27 | * The outline of this documentation is as follows: |
| mbed_official | 579:53297373a894 | 28 | * - \ref asfdoc_sam0_dma_prerequisites |
| mbed_official | 579:53297373a894 | 29 | * - \ref asfdoc_sam0_dma_module_overview |
| mbed_official | 579:53297373a894 | 30 | * - \ref asfdoc_sam0_dma_special_considerations |
| mbed_official | 579:53297373a894 | 31 | * - \ref asfdoc_sam0_dma_extra_info |
| mbed_official | 579:53297373a894 | 32 | * - \ref asfdoc_sam0_dma_examples |
| mbed_official | 579:53297373a894 | 33 | * - \ref asfdoc_sam0_dma_api_overview |
| mbed_official | 579:53297373a894 | 34 | * |
| mbed_official | 579:53297373a894 | 35 | * |
| mbed_official | 579:53297373a894 | 36 | * \section asfdoc_sam0_dma_prerequisites Prerequisites |
| mbed_official | 579:53297373a894 | 37 | * |
| mbed_official | 579:53297373a894 | 38 | * There are no prerequisites for this module. |
| mbed_official | 579:53297373a894 | 39 | * |
| mbed_official | 579:53297373a894 | 40 | * |
| mbed_official | 579:53297373a894 | 41 | * \section asfdoc_sam0_dma_module_overview Module Overview |
| mbed_official | 579:53297373a894 | 42 | * |
| mbed_official | 579:53297373a894 | 43 | * SAM devices with DMAC enables high data transfer rates with minimum |
| mbed_official | 579:53297373a894 | 44 | * CPU intervention and frees up CPU time. With access to all peripherals, |
| mbed_official | 579:53297373a894 | 45 | * the DMAC can handle automatic transfer of data to/from modules. |
| mbed_official | 579:53297373a894 | 46 | * It supports static and incremental addressing for both source and |
| mbed_official | 579:53297373a894 | 47 | * destination. |
| mbed_official | 579:53297373a894 | 48 | * |
| mbed_official | 579:53297373a894 | 49 | * The DMAC when used with Event System or peripheral triggers, provides a |
| mbed_official | 579:53297373a894 | 50 | * considerable advantage by reducing the power consumption and performing |
| mbed_official | 579:53297373a894 | 51 | * data transfer in the background. |
| mbed_official | 579:53297373a894 | 52 | * For example if the ADC is configured to generate an event, it can trigger |
| mbed_official | 579:53297373a894 | 53 | * the DMAC to transfer the data into another peripheral or into SRAM. |
| mbed_official | 579:53297373a894 | 54 | * The CPU can remain in sleep during this time to reduce power consumption. |
| mbed_official | 579:53297373a894 | 55 | * |
| mbed_official | 579:53297373a894 | 56 | * The DMAC module has 12 channels. The DMA channel |
| mbed_official | 579:53297373a894 | 57 | * operation can be suspended at any time by software, by events |
| mbed_official | 579:53297373a894 | 58 | * from event system, or after selectable descriptor execution. The operation |
| mbed_official | 579:53297373a894 | 59 | * can be resumed by software or by events from event system. |
| mbed_official | 579:53297373a894 | 60 | * The DMAC driver for SAM supports four types of transfers such as |
| mbed_official | 579:53297373a894 | 61 | * peripheral to peripheral, peripheral to memory, memory to peripheral, and |
| mbed_official | 579:53297373a894 | 62 | * memory to memory. |
| mbed_official | 579:53297373a894 | 63 | * |
| mbed_official | 579:53297373a894 | 64 | * The basic transfer unit is a beat which is defined as a single bus access. |
| mbed_official | 579:53297373a894 | 65 | * There can be multiple beats in a single block transfer and multiple block |
| mbed_official | 579:53297373a894 | 66 | * transfers in a DMA transaction. |
| mbed_official | 579:53297373a894 | 67 | * DMA transfer is based on descriptors, which holds transfer properties |
| mbed_official | 579:53297373a894 | 68 | * such as the source and destination addresses, transfer counter, and other |
| mbed_official | 579:53297373a894 | 69 | * additional transfer control information. |
| mbed_official | 579:53297373a894 | 70 | * The descriptors can be static or linked. When static, a single block transfer |
| mbed_official | 579:53297373a894 | 71 | * is performed. When linked, a number of transfer descriptors can be used to |
| mbed_official | 579:53297373a894 | 72 | * enable multiple block transfers within a single DMA transaction. |
| mbed_official | 579:53297373a894 | 73 | * |
| mbed_official | 579:53297373a894 | 74 | * The implementation of the DMA driver is based on the idea that DMA channel |
| mbed_official | 579:53297373a894 | 75 | * is a finite resource of entities with the same abilities. A DMA channel resource |
| mbed_official | 579:53297373a894 | 76 | * is able to move a defined set of data from a source address to destination |
| mbed_official | 579:53297373a894 | 77 | * address triggered by a transfer trigger. On the SAM devices there are 12 |
| mbed_official | 579:53297373a894 | 78 | * DMA resources available for allocation. Each of these DMA resources can trigger |
| mbed_official | 579:53297373a894 | 79 | * interrupt callback routines and peripheral events. |
| mbed_official | 579:53297373a894 | 80 | * The other main features are |
| mbed_official | 579:53297373a894 | 81 | * |
| mbed_official | 579:53297373a894 | 82 | * - Selectable transfer trigger source |
| mbed_official | 579:53297373a894 | 83 | * - Software |
| mbed_official | 579:53297373a894 | 84 | * - Event System |
| mbed_official | 579:53297373a894 | 85 | * - Peripheral |
| mbed_official | 579:53297373a894 | 86 | * - Event input and output is supported for the four lower channels |
| mbed_official | 579:53297373a894 | 87 | * - Four level channel priority |
| mbed_official | 579:53297373a894 | 88 | * - Optional interrupt generation on transfer complete, channel error or channel suspend |
| mbed_official | 579:53297373a894 | 89 | * - Supports multi-buffer or circular buffer mode by linking multiple descriptors |
| mbed_official | 579:53297373a894 | 90 | * - Beat size configurable as 8-bit, 16-bit, or 32-bit |
| mbed_official | 579:53297373a894 | 91 | * |
| mbed_official | 579:53297373a894 | 92 | * A simplified block diagram of the DMA Resource can be seen in |
| mbed_official | 579:53297373a894 | 93 | * \ref asfdoc_sam0_dma_module_block_diagram "the figure below". |
| mbed_official | 579:53297373a894 | 94 | * |
| mbed_official | 579:53297373a894 | 95 | * \anchor asfdoc_sam0_dma_module_block_diagram |
| mbed_official | 579:53297373a894 | 96 | * \dot |
| mbed_official | 579:53297373a894 | 97 | * digraph overview { |
| mbed_official | 579:53297373a894 | 98 | * splines = false; |
| mbed_official | 579:53297373a894 | 99 | * rankdir=LR; |
| mbed_official | 579:53297373a894 | 100 | * |
| mbed_official | 579:53297373a894 | 101 | * mux1 [label="Transfer Trigger", shape=box]; |
| mbed_official | 579:53297373a894 | 102 | * |
| mbed_official | 579:53297373a894 | 103 | * dma [label="DMA Channel", shape=polygon, sides=6, orientation=60, style=filled, fillcolor=darkolivegreen1, height=1, width=1]; |
| mbed_official | 579:53297373a894 | 104 | * descriptor [label="Transfer Descriptor", shape=box, style=filled, fillcolor=lightblue]; |
| mbed_official | 579:53297373a894 | 105 | * |
| mbed_official | 579:53297373a894 | 106 | * mux1 -> dma; |
| mbed_official | 579:53297373a894 | 107 | * descriptor -> dma; |
| mbed_official | 579:53297373a894 | 108 | * |
| mbed_official | 579:53297373a894 | 109 | * interrupt [label="Interrupt", shape=box]; |
| mbed_official | 579:53297373a894 | 110 | * events [label="Events", shape=box]; |
| mbed_official | 579:53297373a894 | 111 | * |
| mbed_official | 579:53297373a894 | 112 | * dma:e -> interrupt:w; |
| mbed_official | 579:53297373a894 | 113 | * dma:e -> events:w; |
| mbed_official | 579:53297373a894 | 114 | * |
| mbed_official | 579:53297373a894 | 115 | * {rank=same; descriptor dma} |
| mbed_official | 579:53297373a894 | 116 | * |
| mbed_official | 579:53297373a894 | 117 | * } |
| mbed_official | 579:53297373a894 | 118 | * \enddot |
| mbed_official | 579:53297373a894 | 119 | * |
| mbed_official | 579:53297373a894 | 120 | * \subsection asfdoc_sam0_dma_features Driver Feature Macro Definition |
| mbed_official | 579:53297373a894 | 121 | * <table> |
| mbed_official | 579:53297373a894 | 122 | * <tr> |
| mbed_official | 579:53297373a894 | 123 | * <th>Driver Feature Macro</th> |
| mbed_official | 579:53297373a894 | 124 | * <th>Supported devices</th> |
| mbed_official | 579:53297373a894 | 125 | * </tr> |
| mbed_official | 579:53297373a894 | 126 | * <tr> |
| mbed_official | 579:53297373a894 | 127 | * <td>FEATURE_DMA_CHANNEL_STANDBY</td> |
| mbed_official | 579:53297373a894 | 128 | * <td>SAML21</td> |
| mbed_official | 579:53297373a894 | 129 | * </tr> |
| mbed_official | 579:53297373a894 | 130 | * </table> |
| mbed_official | 579:53297373a894 | 131 | * \note The specific features are only available in the driver when the |
| mbed_official | 579:53297373a894 | 132 | * selected device supports those features. |
| mbed_official | 579:53297373a894 | 133 | * |
| mbed_official | 579:53297373a894 | 134 | * \subsection asfdoc_sam0_dma_module_overview_dma_transf_term Terminology Used in DMAC Transfers |
| mbed_official | 579:53297373a894 | 135 | * |
| mbed_official | 579:53297373a894 | 136 | * <table border="0" cellborder="1" cellspacing="0" > |
| mbed_official | 579:53297373a894 | 137 | * <tr> |
| mbed_official | 579:53297373a894 | 138 | * <th> Name </th> <th> Description </th> |
| mbed_official | 579:53297373a894 | 139 | * </tr> |
| mbed_official | 579:53297373a894 | 140 | * <tr> |
| mbed_official | 579:53297373a894 | 141 | * <td > Beat </td> |
| mbed_official | 579:53297373a894 | 142 | * <td > It is a single bus access by the DMAC. |
| mbed_official | 579:53297373a894 | 143 | * Configurable as 8-bit, 16-bit, or 32-bit |
| mbed_official | 579:53297373a894 | 144 | * </td> |
| mbed_official | 579:53297373a894 | 145 | * </tr> |
| mbed_official | 579:53297373a894 | 146 | * <tr> |
| mbed_official | 579:53297373a894 | 147 | * <td > Burst </td> |
| mbed_official | 579:53297373a894 | 148 | * <td> It is a transfer of n-beats (n=1,4,8,16). |
| mbed_official | 579:53297373a894 | 149 | * For the DMAC module in SAM, the burst size is one beat. |
| mbed_official | 579:53297373a894 | 150 | * Arbitration takes place each time a burst transfer is completed |
| mbed_official | 579:53297373a894 | 151 | * </td> |
| mbed_official | 579:53297373a894 | 152 | * </tr> |
| mbed_official | 579:53297373a894 | 153 | * <tr> |
| mbed_official | 579:53297373a894 | 154 | * <td > Block transfer </td> |
| mbed_official | 579:53297373a894 | 155 | * <td> A single block transfer is a configurable number of (1 to 64k) |
| mbed_official | 579:53297373a894 | 156 | * beat transfers |
| mbed_official | 579:53297373a894 | 157 | * </td> |
| mbed_official | 579:53297373a894 | 158 | * </tr> |
| mbed_official | 579:53297373a894 | 159 | * </table> |
| mbed_official | 579:53297373a894 | 160 | * |
| mbed_official | 579:53297373a894 | 161 | * \subsection asfdoc_sam0_dma_module_overview_dma_channels DMA Channels |
| mbed_official | 579:53297373a894 | 162 | * The DMAC in each device consists of several DMA channels, which |
| mbed_official | 579:53297373a894 | 163 | * along with the transfer descriptors defines the data transfer properties. |
| mbed_official | 579:53297373a894 | 164 | * - The transfer control descriptor defines the source and destination |
| mbed_official | 579:53297373a894 | 165 | * addresses, source and destination address increment settings, the |
| mbed_official | 579:53297373a894 | 166 | * block transfer count and event output condition selection |
| mbed_official | 579:53297373a894 | 167 | * - Dedicated channel registers control the peripheral trigger source, |
| mbed_official | 579:53297373a894 | 168 | * trigger mode settings, event input actions, and channel priority level |
| mbed_official | 579:53297373a894 | 169 | * settings |
| mbed_official | 579:53297373a894 | 170 | * |
| mbed_official | 579:53297373a894 | 171 | * With a successful DMA resource allocation, a dedicated |
| mbed_official | 579:53297373a894 | 172 | * DMA channel will be assigned. The channel will be occupied until the |
| mbed_official | 579:53297373a894 | 173 | * DMA resource is freed. A DMA resource handle is used to identify the specific |
| mbed_official | 579:53297373a894 | 174 | * DMA resource. |
| mbed_official | 579:53297373a894 | 175 | * When there are multiple channels with active requests, the arbiter prioritizes |
| mbed_official | 579:53297373a894 | 176 | * the channels requesting access to the bus. |
| mbed_official | 579:53297373a894 | 177 | * |
| mbed_official | 579:53297373a894 | 178 | * \subsection asfdoc_sam0_dma_module_overview_dma_trigger DMA Triggers |
| mbed_official | 579:53297373a894 | 179 | * DMA transfer can be started only when a DMA transfer request is acknowledged/granted by the arbiter. A |
| mbed_official | 579:53297373a894 | 180 | * transfer request can be triggered from software, peripheral, or an event. There |
| mbed_official | 579:53297373a894 | 181 | * are dedicated source trigger selections for each DMA channel usage. |
| mbed_official | 579:53297373a894 | 182 | |
| mbed_official | 579:53297373a894 | 183 | * |
| mbed_official | 579:53297373a894 | 184 | * \subsection asfdoc_sam0_dma_module_overview_dma_transfer_descriptor DMA Transfer Descriptor |
| mbed_official | 579:53297373a894 | 185 | * The transfer descriptor resides in the SRAM and |
| mbed_official | 579:53297373a894 | 186 | * defines these channel properties. |
| mbed_official | 579:53297373a894 | 187 | * <table border="0" cellborder="1" cellspacing="0" > |
| mbed_official | 579:53297373a894 | 188 | * <tr> |
| mbed_official | 579:53297373a894 | 189 | * <th> Field name </th> <th> Field width </th> |
| mbed_official | 579:53297373a894 | 190 | * </tr> |
| mbed_official | 579:53297373a894 | 191 | * <tr> |
| mbed_official | 579:53297373a894 | 192 | * <td > Descriptor Next Address </td> <td > 32 bits </td> |
| mbed_official | 579:53297373a894 | 193 | * </tr> |
| mbed_official | 579:53297373a894 | 194 | * <tr> |
| mbed_official | 579:53297373a894 | 195 | * <td > Destination Address </td> <td> 32 bits </td> |
| mbed_official | 579:53297373a894 | 196 | * </tr> |
| mbed_official | 579:53297373a894 | 197 | * <tr> |
| mbed_official | 579:53297373a894 | 198 | * <td > Source Address </td> <td> 32 bits </td> |
| mbed_official | 579:53297373a894 | 199 | * </tr> |
| mbed_official | 579:53297373a894 | 200 | * <tr> |
| mbed_official | 579:53297373a894 | 201 | * <td > Block Transfer Counter </td> <td> 16 bits </td> |
| mbed_official | 579:53297373a894 | 202 | * </tr> |
| mbed_official | 579:53297373a894 | 203 | * <tr> |
| mbed_official | 579:53297373a894 | 204 | * <td > Block Transfer Control </td> <td> 16 bits </td> |
| mbed_official | 579:53297373a894 | 205 | * </tr> |
| mbed_official | 579:53297373a894 | 206 | * </table> |
| mbed_official | 579:53297373a894 | 207 | * |
| mbed_official | 579:53297373a894 | 208 | * Before starting a transfer, at least one descriptor should be configured. |
| mbed_official | 579:53297373a894 | 209 | * After a successful allocation of a DMA channel, the transfer descriptor can |
| mbed_official | 579:53297373a894 | 210 | * be added with a call to \ref dma_add_descriptor(). If there is a transfer |
| mbed_official | 579:53297373a894 | 211 | * descriptor already allocated to the DMA resource, the descriptor will |
| mbed_official | 579:53297373a894 | 212 | * be linked to the next descriptor address. |
| mbed_official | 579:53297373a894 | 213 | * |
| mbed_official | 579:53297373a894 | 214 | * \subsection asfdoc_sam0_dma_module_overview_dma_output DMA Interrupts/Events |
| mbed_official | 579:53297373a894 | 215 | * Both an interrupt callback and an peripheral event can be triggered by the |
| mbed_official | 579:53297373a894 | 216 | * DMA transfer. Three types of callbacks are supported by the DMA driver: |
| mbed_official | 579:53297373a894 | 217 | * transfer complete, channel suspend, and transfer error. Each of these callback |
| mbed_official | 579:53297373a894 | 218 | * types can be registered and enabled for each channel independently through |
| mbed_official | 579:53297373a894 | 219 | * the DMA driver API. |
| mbed_official | 579:53297373a894 | 220 | * |
| mbed_official | 579:53297373a894 | 221 | * The DMAC module can also generate events on transfer complete. Event |
| mbed_official | 579:53297373a894 | 222 | * generation is enabled through the DMA channel, event channel configuration, |
| mbed_official | 579:53297373a894 | 223 | * and event user multiplexing is done through the events driver. |
| mbed_official | 579:53297373a894 | 224 | * |
| mbed_official | 579:53297373a894 | 225 | * The DMAC can generate events in the below cases: |
| mbed_official | 579:53297373a894 | 226 | * |
| mbed_official | 579:53297373a894 | 227 | * - When a block transfer is complete |
| mbed_official | 579:53297373a894 | 228 | * |
| mbed_official | 579:53297373a894 | 229 | * - When each beat transfer within a block transfer is complete |
| mbed_official | 579:53297373a894 | 230 | * |
| mbed_official | 579:53297373a894 | 231 | * \section asfdoc_sam0_dma_special_considerations Special Considerations |
| mbed_official | 579:53297373a894 | 232 | * |
| mbed_official | 579:53297373a894 | 233 | * There are no special considerations for this module. |
| mbed_official | 579:53297373a894 | 234 | * |
| mbed_official | 579:53297373a894 | 235 | * |
| mbed_official | 579:53297373a894 | 236 | * \section asfdoc_sam0_dma_extra_info Extra Information |
| mbed_official | 579:53297373a894 | 237 | * |
| mbed_official | 579:53297373a894 | 238 | * For extra information, see \ref asfdoc_sam0_dma_extra. This includes: |
| mbed_official | 579:53297373a894 | 239 | * - \ref asfdoc_sam0_dma_extra_acronyms |
| mbed_official | 579:53297373a894 | 240 | * - \ref asfdoc_sam0_dma_extra_dependencies |
| mbed_official | 579:53297373a894 | 241 | * - \ref asfdoc_sam0_dma_extra_errata |
| mbed_official | 579:53297373a894 | 242 | * - \ref asfdoc_sam0_dma_extra_history |
| mbed_official | 579:53297373a894 | 243 | * |
| mbed_official | 579:53297373a894 | 244 | * |
| mbed_official | 579:53297373a894 | 245 | * \section asfdoc_sam0_dma_examples Examples |
| mbed_official | 579:53297373a894 | 246 | * |
| mbed_official | 579:53297373a894 | 247 | * For a list of examples related to this driver, see |
| mbed_official | 579:53297373a894 | 248 | * \ref asfdoc_sam0_dma_exqsg. |
| mbed_official | 579:53297373a894 | 249 | * |
| mbed_official | 579:53297373a894 | 250 | * |
| mbed_official | 579:53297373a894 | 251 | * \section asfdoc_sam0_dma_api_overview API Overview |
| mbed_official | 579:53297373a894 | 252 | * @{ |
| mbed_official | 579:53297373a894 | 253 | */ |
| mbed_official | 579:53297373a894 | 254 | |
| mbed_official | 579:53297373a894 | 255 | #include <compiler.h> |
| mbed_official | 579:53297373a894 | 256 | #include "conf_dma.h" |
| mbed_official | 579:53297373a894 | 257 | |
| mbed_official | 579:53297373a894 | 258 | #if (SAML21) |
| mbed_official | 579:53297373a894 | 259 | #define FEATURE_DMA_CHANNEL_STANDBY |
| mbed_official | 579:53297373a894 | 260 | #endif |
| mbed_official | 579:53297373a894 | 261 | |
| mbed_official | 579:53297373a894 | 262 | /** DMA invalid channel number. */ |
| mbed_official | 579:53297373a894 | 263 | #define DMA_INVALID_CHANNEL 0xff |
| mbed_official | 579:53297373a894 | 264 | |
| mbed_official | 579:53297373a894 | 265 | /** ExInitial description section. */ |
| mbed_official | 579:53297373a894 | 266 | extern DmacDescriptor descriptor_section[CONF_MAX_USED_CHANNEL_NUM]; |
| mbed_official | 579:53297373a894 | 267 | |
| mbed_official | 579:53297373a894 | 268 | /** DMA priority level. */ |
| mbed_official | 579:53297373a894 | 269 | enum dma_priority_level { |
| mbed_official | 579:53297373a894 | 270 | /** Priority level 0. */ |
| mbed_official | 579:53297373a894 | 271 | DMA_PRIORITY_LEVEL_0, |
| mbed_official | 579:53297373a894 | 272 | /** Priority level 1. */ |
| mbed_official | 579:53297373a894 | 273 | DMA_PRIORITY_LEVEL_1, |
| mbed_official | 579:53297373a894 | 274 | /** Priority level 2. */ |
| mbed_official | 579:53297373a894 | 275 | DMA_PRIORITY_LEVEL_2, |
| mbed_official | 579:53297373a894 | 276 | /** Priority level 3. */ |
| mbed_official | 579:53297373a894 | 277 | DMA_PRIORITY_LEVEL_3, |
| mbed_official | 579:53297373a894 | 278 | }; |
| mbed_official | 579:53297373a894 | 279 | |
| mbed_official | 579:53297373a894 | 280 | /** DMA input actions. */ |
| mbed_official | 579:53297373a894 | 281 | enum dma_event_input_action { |
| mbed_official | 579:53297373a894 | 282 | /** No action. */ |
| mbed_official | 579:53297373a894 | 283 | DMA_EVENT_INPUT_NOACT, |
| mbed_official | 579:53297373a894 | 284 | /** Normal transfer and periodic transfer trigger. */ |
| mbed_official | 579:53297373a894 | 285 | DMA_EVENT_INPUT_TRIG, |
| mbed_official | 579:53297373a894 | 286 | /** Conditional transfer trigger. */ |
| mbed_official | 579:53297373a894 | 287 | DMA_EVENT_INPUT_CTRIG, |
| mbed_official | 579:53297373a894 | 288 | /** Conditional block transfer. */ |
| mbed_official | 579:53297373a894 | 289 | DMA_EVENT_INPUT_CBLOCK, |
| mbed_official | 579:53297373a894 | 290 | /** Channel suspend operation. */ |
| mbed_official | 579:53297373a894 | 291 | DMA_EVENT_INPUT_SUSPEND, |
| mbed_official | 579:53297373a894 | 292 | /** Channel resume operation. */ |
| mbed_official | 579:53297373a894 | 293 | DMA_EVENT_INPUT_RESUME, |
| mbed_official | 579:53297373a894 | 294 | /** Skip next block suspend action. */ |
| mbed_official | 579:53297373a894 | 295 | DMA_EVENT_INPUT_SSKIP, |
| mbed_official | 579:53297373a894 | 296 | }; |
| mbed_official | 579:53297373a894 | 297 | |
| mbed_official | 579:53297373a894 | 298 | /** |
| mbed_official | 579:53297373a894 | 299 | * Address increment step size. These bits select the address increment step |
| mbed_official | 579:53297373a894 | 300 | * size. The setting apply to source or destination address, depending on |
| mbed_official | 579:53297373a894 | 301 | * STEPSEL setting. |
| mbed_official | 579:53297373a894 | 302 | */ |
| mbed_official | 579:53297373a894 | 303 | enum dma_address_increment_stepsize { |
| mbed_official | 579:53297373a894 | 304 | /** The address is incremented by (beat size * 1). */ |
| mbed_official | 579:53297373a894 | 305 | DMA_ADDRESS_INCREMENT_STEP_SIZE_1 = 0, |
| mbed_official | 579:53297373a894 | 306 | /** The address is incremented by (beat size * 2). */ |
| mbed_official | 579:53297373a894 | 307 | DMA_ADDRESS_INCREMENT_STEP_SIZE_2, |
| mbed_official | 579:53297373a894 | 308 | /** The address is incremented by (beat size * 4). */ |
| mbed_official | 579:53297373a894 | 309 | DMA_ADDRESS_INCREMENT_STEP_SIZE_4, |
| mbed_official | 579:53297373a894 | 310 | /** The address is incremented by (beat size * 8). */ |
| mbed_official | 579:53297373a894 | 311 | DMA_ADDRESS_INCREMENT_STEP_SIZE_8, |
| mbed_official | 579:53297373a894 | 312 | /** The address is incremented by (beat size * 16). */ |
| mbed_official | 579:53297373a894 | 313 | DMA_ADDRESS_INCREMENT_STEP_SIZE_16, |
| mbed_official | 579:53297373a894 | 314 | /** The address is incremented by (beat size * 32). */ |
| mbed_official | 579:53297373a894 | 315 | DMA_ADDRESS_INCREMENT_STEP_SIZE_32, |
| mbed_official | 579:53297373a894 | 316 | /** The address is incremented by (beat size * 64). */ |
| mbed_official | 579:53297373a894 | 317 | DMA_ADDRESS_INCREMENT_STEP_SIZE_64, |
| mbed_official | 579:53297373a894 | 318 | /** The address is incremented by (beat size * 128). */ |
| mbed_official | 579:53297373a894 | 319 | DMA_ADDRESS_INCREMENT_STEP_SIZE_128, |
| mbed_official | 579:53297373a894 | 320 | }; |
| mbed_official | 579:53297373a894 | 321 | |
| mbed_official | 579:53297373a894 | 322 | /** |
| mbed_official | 579:53297373a894 | 323 | * DMA step selection. This bit determines whether the step size setting |
| mbed_official | 579:53297373a894 | 324 | * is applied to source or destination address. |
| mbed_official | 579:53297373a894 | 325 | */ |
| mbed_official | 579:53297373a894 | 326 | enum dma_step_selection { |
| mbed_official | 579:53297373a894 | 327 | /** Step size settings apply to the destination address. */ |
| mbed_official | 579:53297373a894 | 328 | DMA_STEPSEL_DST = 0, |
| mbed_official | 579:53297373a894 | 329 | /** Step size settings apply to the source address. */ |
| mbed_official | 579:53297373a894 | 330 | DMA_STEPSEL_SRC, |
| mbed_official | 579:53297373a894 | 331 | }; |
| mbed_official | 579:53297373a894 | 332 | |
| mbed_official | 579:53297373a894 | 333 | /** The basic transfer unit in DMAC is a beat, which is defined as a |
| mbed_official | 579:53297373a894 | 334 | * single bus access. Its size is configurable and applies to both read |
| mbed_official | 579:53297373a894 | 335 | * and write. */ |
| mbed_official | 579:53297373a894 | 336 | enum dma_beat_size { |
| mbed_official | 579:53297373a894 | 337 | /** 8-bit access. */ |
| mbed_official | 579:53297373a894 | 338 | DMA_BEAT_SIZE_BYTE = 0, |
| mbed_official | 579:53297373a894 | 339 | /** 16-bit access. */ |
| mbed_official | 579:53297373a894 | 340 | DMA_BEAT_SIZE_HWORD, |
| mbed_official | 579:53297373a894 | 341 | /** 32-bit access. */ |
| mbed_official | 579:53297373a894 | 342 | DMA_BEAT_SIZE_WORD, |
| mbed_official | 579:53297373a894 | 343 | }; |
| mbed_official | 579:53297373a894 | 344 | |
| mbed_official | 579:53297373a894 | 345 | /** |
| mbed_official | 579:53297373a894 | 346 | * Block action definitions. |
| mbed_official | 579:53297373a894 | 347 | */ |
| mbed_official | 579:53297373a894 | 348 | enum dma_block_action { |
| mbed_official | 579:53297373a894 | 349 | /** No action. */ |
| mbed_official | 579:53297373a894 | 350 | DMA_BLOCK_ACTION_NOACT = 0, |
| mbed_official | 579:53297373a894 | 351 | /** Channel in normal operation and sets transfer complete interrupt flag |
| mbed_official | 579:53297373a894 | 352 | * after block transfer. */ |
| mbed_official | 579:53297373a894 | 353 | DMA_BLOCK_ACTION_INT, |
| mbed_official | 579:53297373a894 | 354 | /** Trigger channel suspend after block transfer and sets channel |
| mbed_official | 579:53297373a894 | 355 | * suspend interrupt flag once the channel is suspended. */ |
| mbed_official | 579:53297373a894 | 356 | DMA_BLOCK_ACTION_SUSPEND, |
| mbed_official | 579:53297373a894 | 357 | /** Sets transfer complete interrupt flag after a block transfer and |
| mbed_official | 579:53297373a894 | 358 | * trigger channel suspend. The channel suspend interrupt flag will be set |
| mbed_official | 579:53297373a894 | 359 | * once the channel is suspended. */ |
| mbed_official | 579:53297373a894 | 360 | DMA_BLOCK_ACTION_BOTH, |
| mbed_official | 579:53297373a894 | 361 | }; |
| mbed_official | 579:53297373a894 | 362 | |
| mbed_official | 579:53297373a894 | 363 | /** Event output selection. */ |
| mbed_official | 579:53297373a894 | 364 | enum dma_event_output_selection { |
| mbed_official | 579:53297373a894 | 365 | /** Event generation disable. */ |
| mbed_official | 579:53297373a894 | 366 | DMA_EVENT_OUTPUT_DISABLE = 0, |
| mbed_official | 579:53297373a894 | 367 | /** Event strobe when block transfer complete. */ |
| mbed_official | 579:53297373a894 | 368 | DMA_EVENT_OUTPUT_BLOCK, |
| mbed_official | 579:53297373a894 | 369 | /** Event output reserved. */ |
| mbed_official | 579:53297373a894 | 370 | DMA_EVENT_OUTPUT_RESERVED, |
| mbed_official | 579:53297373a894 | 371 | /** Event strobe when beat transfer complete. */ |
| mbed_official | 579:53297373a894 | 372 | DMA_EVENT_OUTPUT_BEAT, |
| mbed_official | 579:53297373a894 | 373 | }; |
| mbed_official | 579:53297373a894 | 374 | |
| mbed_official | 579:53297373a894 | 375 | /** DMA trigger action type. */ |
| mbed_official | 579:53297373a894 | 376 | enum dma_transfer_trigger_action { |
| mbed_official | 579:53297373a894 | 377 | /** Perform a block transfer when triggered. */ |
| mbed_official | 579:53297373a894 | 378 | DMA_TRIGGER_ACTON_BLOCK = DMAC_CHCTRLB_TRIGACT_BLOCK_Val, |
| mbed_official | 579:53297373a894 | 379 | /** Perform a beat transfer when triggered. */ |
| mbed_official | 579:53297373a894 | 380 | DMA_TRIGGER_ACTON_BEAT = DMAC_CHCTRLB_TRIGACT_BEAT_Val, |
| mbed_official | 579:53297373a894 | 381 | /** Perform a transaction when triggered. */ |
| mbed_official | 579:53297373a894 | 382 | DMA_TRIGGER_ACTON_TRANSACTION = DMAC_CHCTRLB_TRIGACT_TRANSACTION_Val, |
| mbed_official | 579:53297373a894 | 383 | }; |
| mbed_official | 579:53297373a894 | 384 | |
| mbed_official | 579:53297373a894 | 385 | /** |
| mbed_official | 579:53297373a894 | 386 | * Callback types for DMA callback driver. |
| mbed_official | 579:53297373a894 | 387 | */ |
| mbed_official | 579:53297373a894 | 388 | enum dma_callback_type { |
| mbed_official | 579:53297373a894 | 389 | /** Callback for transfer complete. */ |
| mbed_official | 579:53297373a894 | 390 | DMA_CALLBACK_TRANSFER_DONE, |
| mbed_official | 579:53297373a894 | 391 | /** Callback for any of transfer errors. A transfer error is flagged |
| mbed_official | 579:53297373a894 | 392 | * if a bus error is detected during an AHB access or when the DMAC |
| mbed_official | 579:53297373a894 | 393 | * fetches an invalid descriptor. */ |
| mbed_official | 579:53297373a894 | 394 | DMA_CALLBACK_TRANSFER_ERROR, |
| mbed_official | 579:53297373a894 | 395 | /** Callback for channel suspend. */ |
| mbed_official | 579:53297373a894 | 396 | DMA_CALLBACK_CHANNEL_SUSPEND, |
| mbed_official | 579:53297373a894 | 397 | /** Number of available callbacks. */ |
| mbed_official | 579:53297373a894 | 398 | DMA_CALLBACK_N, |
| mbed_official | 579:53297373a894 | 399 | }; |
| mbed_official | 579:53297373a894 | 400 | |
| mbed_official | 579:53297373a894 | 401 | /** |
| mbed_official | 579:53297373a894 | 402 | * DMA transfer descriptor configuration. When the source or destination address |
| mbed_official | 579:53297373a894 | 403 | * increment is enabled, the addresses stored into the configuration structure |
| mbed_official | 579:53297373a894 | 404 | * must correspond to the end of the transfer. |
| mbed_official | 579:53297373a894 | 405 | * |
| mbed_official | 579:53297373a894 | 406 | */ |
| mbed_official | 579:53297373a894 | 407 | struct dma_descriptor_config { |
| mbed_official | 579:53297373a894 | 408 | /** Descriptor valid flag used to identify whether a descriptor is |
| mbed_official | 579:53297373a894 | 409 | valid or not. */ |
| mbed_official | 579:53297373a894 | 410 | bool descriptor_valid; |
| mbed_official | 579:53297373a894 | 411 | /** This is used to generate an event on specific transfer action in |
| mbed_official | 579:53297373a894 | 412 | a channel. Supported only in four lower channels. */ |
| mbed_official | 579:53297373a894 | 413 | enum dma_event_output_selection event_output_selection; |
| mbed_official | 579:53297373a894 | 414 | /** Action taken when a block transfer is completed. */ |
| mbed_official | 579:53297373a894 | 415 | enum dma_block_action block_action; |
| mbed_official | 579:53297373a894 | 416 | /** Beat size is configurable as 8-bit, 16-bit, or 32-bit. */ |
| mbed_official | 579:53297373a894 | 417 | enum dma_beat_size beat_size; |
| mbed_official | 579:53297373a894 | 418 | /** Used for enabling the source address increment. */ |
| mbed_official | 579:53297373a894 | 419 | bool src_increment_enable; |
| mbed_official | 579:53297373a894 | 420 | /** Used for enabling the destination address increment. */ |
| mbed_official | 579:53297373a894 | 421 | bool dst_increment_enable; |
| mbed_official | 579:53297373a894 | 422 | /** This bit selects whether the source or destination address is |
| mbed_official | 579:53297373a894 | 423 | using the step size settings. */ |
| mbed_official | 579:53297373a894 | 424 | enum dma_step_selection step_selection; |
| mbed_official | 579:53297373a894 | 425 | /** The step size for source/destination address increment. |
| mbed_official | 579:53297373a894 | 426 | The next address is calculated |
| mbed_official | 579:53297373a894 | 427 | as next_addr = addr + (2^step_size * beat size). */ |
| mbed_official | 579:53297373a894 | 428 | enum dma_address_increment_stepsize step_size; |
| mbed_official | 579:53297373a894 | 429 | /** It is the number of beats in a block. This count value is |
| mbed_official | 579:53297373a894 | 430 | * decremented by one after each beat data transfer. */ |
| mbed_official | 579:53297373a894 | 431 | uint16_t block_transfer_count; |
| mbed_official | 579:53297373a894 | 432 | /** Transfer source address. */ |
| mbed_official | 579:53297373a894 | 433 | uint32_t source_address; |
| mbed_official | 579:53297373a894 | 434 | /** Transfer destination address. */ |
| mbed_official | 579:53297373a894 | 435 | uint32_t destination_address; |
| mbed_official | 579:53297373a894 | 436 | /** Set to zero for static descriptors. This must have a valid memory |
| mbed_official | 579:53297373a894 | 437 | address for linked descriptors. */ |
| mbed_official | 579:53297373a894 | 438 | uint32_t next_descriptor_address; |
| mbed_official | 579:53297373a894 | 439 | }; |
| mbed_official | 579:53297373a894 | 440 | |
| mbed_official | 579:53297373a894 | 441 | /** Configurations for DMA events. */ |
| mbed_official | 579:53297373a894 | 442 | struct dma_events_config { |
| mbed_official | 579:53297373a894 | 443 | /** Event input actions. */ |
| mbed_official | 579:53297373a894 | 444 | enum dma_event_input_action input_action; |
| mbed_official | 579:53297373a894 | 445 | /** Enable DMA event output. */ |
| mbed_official | 579:53297373a894 | 446 | bool event_output_enable; |
| mbed_official | 579:53297373a894 | 447 | }; |
| mbed_official | 579:53297373a894 | 448 | |
| mbed_official | 579:53297373a894 | 449 | /** DMA configurations for transfer. */ |
| mbed_official | 579:53297373a894 | 450 | struct dma_resource_config { |
| mbed_official | 579:53297373a894 | 451 | /** DMA transfer priority. */ |
| mbed_official | 579:53297373a894 | 452 | enum dma_priority_level priority; |
| mbed_official | 579:53297373a894 | 453 | /**DMA peripheral trigger index. */ |
| mbed_official | 579:53297373a894 | 454 | uint8_t peripheral_trigger; |
| mbed_official | 579:53297373a894 | 455 | /** DMA trigger action. */ |
| mbed_official | 579:53297373a894 | 456 | enum dma_transfer_trigger_action trigger_action; |
| mbed_official | 579:53297373a894 | 457 | #ifdef FEATURE_DMA_CHANNEL_STANDBY |
| mbed_official | 579:53297373a894 | 458 | /** Keep DMA channel enabled in standby sleep mode if true. */ |
| mbed_official | 579:53297373a894 | 459 | bool run_in_standby; |
| mbed_official | 579:53297373a894 | 460 | #endif |
| mbed_official | 579:53297373a894 | 461 | /** DMA events configurations. */ |
| mbed_official | 579:53297373a894 | 462 | struct dma_events_config event_config; |
| mbed_official | 579:53297373a894 | 463 | }; |
| mbed_official | 579:53297373a894 | 464 | |
| mbed_official | 579:53297373a894 | 465 | /** Forward definition of the DMA resource. */ |
| mbed_official | 579:53297373a894 | 466 | struct dma_resource; |
| mbed_official | 579:53297373a894 | 467 | /** Type definition for a DMA resource callback function. */ |
| mbed_official | 579:53297373a894 | 468 | typedef void (*dma_callback_t)(const struct dma_resource *const resource); |
| mbed_official | 579:53297373a894 | 469 | |
| mbed_official | 579:53297373a894 | 470 | /** Structure for DMA transfer resource. */ |
| mbed_official | 579:53297373a894 | 471 | struct dma_resource { |
| mbed_official | 579:53297373a894 | 472 | /** Allocated DMA channel ID. */ |
| mbed_official | 579:53297373a894 | 473 | uint8_t channel_id; |
| mbed_official | 579:53297373a894 | 474 | /** Array of callback functions for DMA transfer job. */ |
| mbed_official | 579:53297373a894 | 475 | dma_callback_t callback[DMA_CALLBACK_N]; |
| mbed_official | 579:53297373a894 | 476 | /** Bit mask for enabled callbacks. */ |
| mbed_official | 579:53297373a894 | 477 | uint8_t callback_enable; |
| mbed_official | 579:53297373a894 | 478 | /** Status of the last job. */ |
| mbed_official | 579:53297373a894 | 479 | volatile enum status_code job_status; |
| mbed_official | 579:53297373a894 | 480 | /** Transferred data size. */ |
| mbed_official | 579:53297373a894 | 481 | uint32_t transfered_size; |
| mbed_official | 579:53297373a894 | 482 | /** DMA transfer descriptor. */ |
| mbed_official | 579:53297373a894 | 483 | DmacDescriptor* descriptor; |
| mbed_official | 579:53297373a894 | 484 | }; |
| mbed_official | 579:53297373a894 | 485 | |
| mbed_official | 579:53297373a894 | 486 | /** |
| mbed_official | 579:53297373a894 | 487 | * \brief Get DMA resource status. |
| mbed_official | 579:53297373a894 | 488 | * |
| mbed_official | 579:53297373a894 | 489 | * \param[in] resource Pointer to the DMA resource |
| mbed_official | 579:53297373a894 | 490 | * |
| mbed_official | 579:53297373a894 | 491 | * \return Status of the DMA resource. |
| mbed_official | 579:53297373a894 | 492 | */ |
| mbed_official | 579:53297373a894 | 493 | static inline enum status_code dma_get_job_status(struct dma_resource *resource) |
| mbed_official | 579:53297373a894 | 494 | { |
| mbed_official | 579:53297373a894 | 495 | Assert(resource); |
| mbed_official | 579:53297373a894 | 496 | |
| mbed_official | 579:53297373a894 | 497 | return resource->job_status; |
| mbed_official | 579:53297373a894 | 498 | } |
| mbed_official | 579:53297373a894 | 499 | |
| mbed_official | 579:53297373a894 | 500 | /** |
| mbed_official | 579:53297373a894 | 501 | * \brief Check if the given DMA resource is busy. |
| mbed_official | 579:53297373a894 | 502 | * |
| mbed_official | 579:53297373a894 | 503 | * \param[in] resource Pointer to the DMA resource |
| mbed_official | 579:53297373a894 | 504 | * |
| mbed_official | 579:53297373a894 | 505 | * \return Status which indicates whether the DMA resource is busy. |
| mbed_official | 579:53297373a894 | 506 | * |
| mbed_official | 579:53297373a894 | 507 | * \retval true The DMA resource has an on-going transfer |
| mbed_official | 579:53297373a894 | 508 | * \retval false The DMA resource is not busy |
| mbed_official | 579:53297373a894 | 509 | */ |
| mbed_official | 579:53297373a894 | 510 | static inline bool dma_is_busy(struct dma_resource *resource) |
| mbed_official | 579:53297373a894 | 511 | { |
| mbed_official | 579:53297373a894 | 512 | Assert(resource); |
| mbed_official | 579:53297373a894 | 513 | |
| mbed_official | 579:53297373a894 | 514 | return (resource->job_status == STATUS_BUSY); |
| mbed_official | 579:53297373a894 | 515 | } |
| mbed_official | 579:53297373a894 | 516 | |
| mbed_official | 579:53297373a894 | 517 | /** |
| mbed_official | 579:53297373a894 | 518 | * \brief Enable a callback function for a dedicated DMA resource. |
| mbed_official | 579:53297373a894 | 519 | * |
| mbed_official | 579:53297373a894 | 520 | * \param[in] resource Pointer to the DMA resource |
| mbed_official | 579:53297373a894 | 521 | * \param[in] type Callback function type |
| mbed_official | 579:53297373a894 | 522 | * |
| mbed_official | 579:53297373a894 | 523 | */ |
| mbed_official | 579:53297373a894 | 524 | static inline void dma_enable_callback(struct dma_resource *resource, |
| mbed_official | 579:53297373a894 | 525 | enum dma_callback_type type) |
| mbed_official | 579:53297373a894 | 526 | { |
| mbed_official | 579:53297373a894 | 527 | Assert(resource); |
| mbed_official | 579:53297373a894 | 528 | |
| mbed_official | 579:53297373a894 | 529 | resource->callback_enable |= 1 << type; |
| mbed_official | 579:53297373a894 | 530 | } |
| mbed_official | 579:53297373a894 | 531 | |
| mbed_official | 579:53297373a894 | 532 | /** |
| mbed_official | 579:53297373a894 | 533 | * \brief Disable a callback function for a dedicated DMA resource. |
| mbed_official | 579:53297373a894 | 534 | * |
| mbed_official | 579:53297373a894 | 535 | * \param[in] resource Pointer to the DMA resource |
| mbed_official | 579:53297373a894 | 536 | * \param[in] type Callback function type |
| mbed_official | 579:53297373a894 | 537 | * |
| mbed_official | 579:53297373a894 | 538 | */ |
| mbed_official | 579:53297373a894 | 539 | static inline void dma_disable_callback(struct dma_resource *resource, |
| mbed_official | 579:53297373a894 | 540 | enum dma_callback_type type) |
| mbed_official | 579:53297373a894 | 541 | { |
| mbed_official | 579:53297373a894 | 542 | Assert(resource); |
| mbed_official | 579:53297373a894 | 543 | |
| mbed_official | 579:53297373a894 | 544 | resource->callback_enable &= ~(1 << type); |
| mbed_official | 579:53297373a894 | 545 | } |
| mbed_official | 579:53297373a894 | 546 | |
| mbed_official | 579:53297373a894 | 547 | /** |
| mbed_official | 579:53297373a894 | 548 | * \brief Register a callback function for a dedicated DMA resource. |
| mbed_official | 579:53297373a894 | 549 | * |
| mbed_official | 579:53297373a894 | 550 | * There are three types of callback functions, which can be registered: |
| mbed_official | 579:53297373a894 | 551 | * - Callback for transfer complete |
| mbed_official | 579:53297373a894 | 552 | * - Callback for transfer error |
| mbed_official | 579:53297373a894 | 553 | * - Callback for channel suspend |
| mbed_official | 579:53297373a894 | 554 | * |
| mbed_official | 579:53297373a894 | 555 | * \param[in] resource Pointer to the DMA resource |
| mbed_official | 579:53297373a894 | 556 | * \param[in] callback Pointer to the callback function |
| mbed_official | 579:53297373a894 | 557 | * \param[in] type Callback function type |
| mbed_official | 579:53297373a894 | 558 | * |
| mbed_official | 579:53297373a894 | 559 | */ |
| mbed_official | 579:53297373a894 | 560 | static inline void dma_register_callback(struct dma_resource *resource, |
| mbed_official | 579:53297373a894 | 561 | dma_callback_t callback, enum dma_callback_type type) |
| mbed_official | 579:53297373a894 | 562 | { |
| mbed_official | 579:53297373a894 | 563 | Assert(resource); |
| mbed_official | 579:53297373a894 | 564 | |
| mbed_official | 579:53297373a894 | 565 | resource->callback[type] = callback; |
| mbed_official | 579:53297373a894 | 566 | } |
| mbed_official | 579:53297373a894 | 567 | |
| mbed_official | 579:53297373a894 | 568 | /** |
| mbed_official | 579:53297373a894 | 569 | * \brief Unregister a callback function for a dedicated DMA resource. |
| mbed_official | 579:53297373a894 | 570 | * |
| mbed_official | 579:53297373a894 | 571 | * There are three types of callback functions: |
| mbed_official | 579:53297373a894 | 572 | * - Callback for transfer complete |
| mbed_official | 579:53297373a894 | 573 | * - Callback for transfer error |
| mbed_official | 579:53297373a894 | 574 | * - Callback for channel suspend |
| mbed_official | 579:53297373a894 | 575 | * |
| mbed_official | 579:53297373a894 | 576 | * The application can unregister any of the callback functions which |
| mbed_official | 579:53297373a894 | 577 | * are already registered and are no longer needed. |
| mbed_official | 579:53297373a894 | 578 | * |
| mbed_official | 579:53297373a894 | 579 | * \param[in] resource Pointer to the DMA resource |
| mbed_official | 579:53297373a894 | 580 | * \param[in] type Callback function type |
| mbed_official | 579:53297373a894 | 581 | * |
| mbed_official | 579:53297373a894 | 582 | */ |
| mbed_official | 579:53297373a894 | 583 | static inline void dma_unregister_callback(struct dma_resource *resource, |
| mbed_official | 579:53297373a894 | 584 | enum dma_callback_type type) |
| mbed_official | 579:53297373a894 | 585 | { |
| mbed_official | 579:53297373a894 | 586 | Assert(resource); |
| mbed_official | 579:53297373a894 | 587 | |
| mbed_official | 579:53297373a894 | 588 | resource->callback[type] = NULL; |
| mbed_official | 579:53297373a894 | 589 | } |
| mbed_official | 579:53297373a894 | 590 | |
| mbed_official | 579:53297373a894 | 591 | /** |
| mbed_official | 579:53297373a894 | 592 | * \brief Will set a software trigger for resource. |
| mbed_official | 579:53297373a894 | 593 | * |
| mbed_official | 579:53297373a894 | 594 | * This function is used to set a software trigger on the DMA channel |
| mbed_official | 579:53297373a894 | 595 | * associated with resource. If a trigger is already pending no new trigger |
| mbed_official | 579:53297373a894 | 596 | * will be generated for the channel. |
| mbed_official | 579:53297373a894 | 597 | * |
| mbed_official | 579:53297373a894 | 598 | * \param[in] resource Pointer to the DMA resource |
| mbed_official | 579:53297373a894 | 599 | */ |
| mbed_official | 579:53297373a894 | 600 | static inline void dma_trigger_transfer(struct dma_resource *resource) |
| mbed_official | 579:53297373a894 | 601 | { |
| mbed_official | 579:53297373a894 | 602 | Assert(resource); |
| mbed_official | 579:53297373a894 | 603 | |
| mbed_official | 579:53297373a894 | 604 | DMAC->SWTRIGCTRL.reg |= (1 << resource->channel_id); |
| mbed_official | 579:53297373a894 | 605 | } |
| mbed_official | 579:53297373a894 | 606 | |
| mbed_official | 579:53297373a894 | 607 | /** |
| mbed_official | 579:53297373a894 | 608 | * \brief Initializes DMA transfer configuration with predefined default values. |
| mbed_official | 579:53297373a894 | 609 | * |
| mbed_official | 579:53297373a894 | 610 | * This function will initialize a given DMA descriptor configuration structure to |
| mbed_official | 579:53297373a894 | 611 | * a set of known default values. This function should be called on |
| mbed_official | 579:53297373a894 | 612 | * any new instance of the configuration structure before being |
| mbed_official | 579:53297373a894 | 613 | * modified by the user application. |
| mbed_official | 579:53297373a894 | 614 | * |
| mbed_official | 579:53297373a894 | 615 | * The default configuration is as follows: |
| mbed_official | 579:53297373a894 | 616 | * \li Set the descriptor as valid |
| mbed_official | 579:53297373a894 | 617 | * \li Disable event output |
| mbed_official | 579:53297373a894 | 618 | * \li No block action |
| mbed_official | 579:53297373a894 | 619 | * \li Set beat size as byte |
| mbed_official | 579:53297373a894 | 620 | * \li Enable source increment |
| mbed_official | 579:53297373a894 | 621 | * \li Enable destination increment |
| mbed_official | 579:53297373a894 | 622 | * \li Step size is applied to the destination address |
| mbed_official | 579:53297373a894 | 623 | * \li Address increment is beat size multiplied by 1 |
| mbed_official | 579:53297373a894 | 624 | * \li Default transfer size is set to 0 |
| mbed_official | 579:53297373a894 | 625 | * \li Default source address is set to NULL |
| mbed_official | 579:53297373a894 | 626 | * \li Default destination address is set to NULL |
| mbed_official | 579:53297373a894 | 627 | * \li Default next descriptor not available |
| mbed_official | 579:53297373a894 | 628 | * \param[out] config Pointer to the configuration |
| mbed_official | 579:53297373a894 | 629 | * |
| mbed_official | 579:53297373a894 | 630 | */ |
| mbed_official | 579:53297373a894 | 631 | static inline void dma_descriptor_get_config_defaults(struct dma_descriptor_config *config) |
| mbed_official | 579:53297373a894 | 632 | { |
| mbed_official | 579:53297373a894 | 633 | Assert(config); |
| mbed_official | 579:53297373a894 | 634 | |
| mbed_official | 579:53297373a894 | 635 | /* Set descriptor as valid */ |
| mbed_official | 579:53297373a894 | 636 | config->descriptor_valid = true; |
| mbed_official | 579:53297373a894 | 637 | /* Disable event output */ |
| mbed_official | 579:53297373a894 | 638 | config->event_output_selection = DMA_EVENT_OUTPUT_DISABLE; |
| mbed_official | 579:53297373a894 | 639 | /* No block action */ |
| mbed_official | 579:53297373a894 | 640 | config->block_action = DMA_BLOCK_ACTION_NOACT; |
| mbed_official | 579:53297373a894 | 641 | /* Set beat size to one byte */ |
| mbed_official | 579:53297373a894 | 642 | config->beat_size = DMA_BEAT_SIZE_BYTE; |
| mbed_official | 579:53297373a894 | 643 | /* Enable source increment */ |
| mbed_official | 579:53297373a894 | 644 | config->src_increment_enable = true; |
| mbed_official | 579:53297373a894 | 645 | /* Enable destination increment */ |
| mbed_official | 579:53297373a894 | 646 | config->dst_increment_enable = true; |
| mbed_official | 579:53297373a894 | 647 | /* Step size is applied to the destination address */ |
| mbed_official | 579:53297373a894 | 648 | config->step_selection = DMA_STEPSEL_DST; |
| mbed_official | 579:53297373a894 | 649 | /* Address increment is beat size multiplied by 1*/ |
| mbed_official | 579:53297373a894 | 650 | config->step_size = DMA_ADDRESS_INCREMENT_STEP_SIZE_1; |
| mbed_official | 579:53297373a894 | 651 | /* Default transfer size is set to 0 */ |
| mbed_official | 579:53297373a894 | 652 | config->block_transfer_count = 0; |
| mbed_official | 579:53297373a894 | 653 | /* Default source address is set to NULL */ |
| mbed_official | 579:53297373a894 | 654 | config->source_address = (uint32_t)NULL; |
| mbed_official | 579:53297373a894 | 655 | /* Default destination address is set to NULL */ |
| mbed_official | 579:53297373a894 | 656 | config->destination_address = (uint32_t)NULL; |
| mbed_official | 579:53297373a894 | 657 | /** Next descriptor address set to 0 */ |
| mbed_official | 579:53297373a894 | 658 | config->next_descriptor_address = 0; |
| mbed_official | 579:53297373a894 | 659 | } |
| mbed_official | 579:53297373a894 | 660 | |
| mbed_official | 579:53297373a894 | 661 | /** |
| mbed_official | 579:53297373a894 | 662 | * \brief Update DMA descriptor. |
| mbed_official | 579:53297373a894 | 663 | * |
| mbed_official | 579:53297373a894 | 664 | * This function can update the descriptor of an allocated DMA resource. |
| mbed_official | 579:53297373a894 | 665 | * |
| mbed_official | 579:53297373a894 | 666 | */ |
| mbed_official | 579:53297373a894 | 667 | static inline void dma_update_descriptor(struct dma_resource *resource, |
| mbed_official | 579:53297373a894 | 668 | DmacDescriptor* descriptor) |
| mbed_official | 579:53297373a894 | 669 | { |
| mbed_official | 579:53297373a894 | 670 | Assert(resource); |
| mbed_official | 579:53297373a894 | 671 | |
| mbed_official | 579:53297373a894 | 672 | resource->descriptor = descriptor; |
| mbed_official | 579:53297373a894 | 673 | } |
| mbed_official | 579:53297373a894 | 674 | |
| mbed_official | 579:53297373a894 | 675 | /** |
| mbed_official | 579:53297373a894 | 676 | * \brief Reset DMA descriptor. |
| mbed_official | 579:53297373a894 | 677 | * |
| mbed_official | 579:53297373a894 | 678 | * This function will clear the DESCADDR register of an allocated DMA resource. |
| mbed_official | 579:53297373a894 | 679 | * |
| mbed_official | 579:53297373a894 | 680 | */ |
| mbed_official | 579:53297373a894 | 681 | static inline void dma_reset_descriptor(struct dma_resource *resource) |
| mbed_official | 579:53297373a894 | 682 | { |
| mbed_official | 579:53297373a894 | 683 | Assert(resource); |
| mbed_official | 579:53297373a894 | 684 | |
| mbed_official | 579:53297373a894 | 685 | resource->descriptor = NULL; |
| mbed_official | 579:53297373a894 | 686 | } |
| mbed_official | 579:53297373a894 | 687 | |
| mbed_official | 579:53297373a894 | 688 | void dma_get_config_defaults(struct dma_resource_config *config); |
| mbed_official | 579:53297373a894 | 689 | enum status_code dma_allocate(struct dma_resource *resource, |
| mbed_official | 579:53297373a894 | 690 | struct dma_resource_config *config); |
| mbed_official | 579:53297373a894 | 691 | enum status_code dma_free(struct dma_resource *resource); |
| mbed_official | 579:53297373a894 | 692 | enum status_code dma_start_transfer_job(struct dma_resource *resource); |
| mbed_official | 579:53297373a894 | 693 | void dma_abort_job(struct dma_resource *resource); |
| mbed_official | 579:53297373a894 | 694 | void dma_suspend_job(struct dma_resource *resource); |
| mbed_official | 579:53297373a894 | 695 | void dma_resume_job(struct dma_resource *resource); |
| mbed_official | 579:53297373a894 | 696 | void dma_descriptor_create(DmacDescriptor* descriptor, |
| mbed_official | 579:53297373a894 | 697 | struct dma_descriptor_config *config); |
| mbed_official | 579:53297373a894 | 698 | enum status_code dma_add_descriptor(struct dma_resource *resource, |
| mbed_official | 579:53297373a894 | 699 | DmacDescriptor* descriptor); |
| mbed_official | 579:53297373a894 | 700 | |
| mbed_official | 579:53297373a894 | 701 | /** @} */ |
| mbed_official | 579:53297373a894 | 702 | |
| mbed_official | 579:53297373a894 | 703 | /** |
| mbed_official | 579:53297373a894 | 704 | * \page asfdoc_sam0_dma_extra Extra Information for DMAC Driver |
| mbed_official | 579:53297373a894 | 705 | * |
| mbed_official | 579:53297373a894 | 706 | * \section asfdoc_sam0_dma_extra_acronyms Acronyms |
| mbed_official | 579:53297373a894 | 707 | * Below is a table listing the acronyms used in this module, along with their |
| mbed_official | 579:53297373a894 | 708 | * intended meanings. |
| mbed_official | 579:53297373a894 | 709 | * |
| mbed_official | 579:53297373a894 | 710 | * <table> |
| mbed_official | 579:53297373a894 | 711 | * <tr> |
| mbed_official | 579:53297373a894 | 712 | * <th>Acronym</th> |
| mbed_official | 579:53297373a894 | 713 | * <th>Description</th> |
| mbed_official | 579:53297373a894 | 714 | * </tr> |
| mbed_official | 579:53297373a894 | 715 | * <tr> |
| mbed_official | 579:53297373a894 | 716 | * <td>DMA</td> |
| mbed_official | 579:53297373a894 | 717 | * <td>Direct Memory Access</td> |
| mbed_official | 579:53297373a894 | 718 | * </tr> |
| mbed_official | 579:53297373a894 | 719 | * <tr> |
| mbed_official | 579:53297373a894 | 720 | * <td>DMAC</td> |
| mbed_official | 579:53297373a894 | 721 | * <td>Direct Memory Access Controller </td> |
| mbed_official | 579:53297373a894 | 722 | * </tr> |
| mbed_official | 579:53297373a894 | 723 | * <tr> |
| mbed_official | 579:53297373a894 | 724 | * <td>CPU</td> |
| mbed_official | 579:53297373a894 | 725 | * <td>Central Processing Unit</td> |
| mbed_official | 579:53297373a894 | 726 | * </tr> |
| mbed_official | 579:53297373a894 | 727 | * </table> |
| mbed_official | 579:53297373a894 | 728 | * |
| mbed_official | 579:53297373a894 | 729 | * |
| mbed_official | 579:53297373a894 | 730 | * \section asfdoc_sam0_dma_extra_dependencies Dependencies |
| mbed_official | 579:53297373a894 | 731 | * This driver has the following dependencies: |
| mbed_official | 579:53297373a894 | 732 | * |
| mbed_official | 579:53297373a894 | 733 | * - \ref asfdoc_sam0_system_clock_group "System Clock Driver" |
| mbed_official | 579:53297373a894 | 734 | * |
| mbed_official | 579:53297373a894 | 735 | * |
| mbed_official | 579:53297373a894 | 736 | * \section asfdoc_sam0_dma_extra_errata Errata |
| mbed_official | 579:53297373a894 | 737 | * There are no errata related to this driver. |
| mbed_official | 579:53297373a894 | 738 | * |
| mbed_official | 579:53297373a894 | 739 | * |
| mbed_official | 579:53297373a894 | 740 | * \section asfdoc_sam0_dma_extra_history Module History |
| mbed_official | 579:53297373a894 | 741 | * An overview of the module history is presented in the table below, with |
| mbed_official | 579:53297373a894 | 742 | * details on the enhancements and fixes made to the module since its first |
| mbed_official | 579:53297373a894 | 743 | * release. The current version of this corresponds to the newest version in |
| mbed_official | 579:53297373a894 | 744 | * the table. |
| mbed_official | 579:53297373a894 | 745 | * |
| mbed_official | 579:53297373a894 | 746 | * <table> |
| mbed_official | 579:53297373a894 | 747 | * <tr> |
| mbed_official | 579:53297373a894 | 748 | * <th>Changelog</th> |
| mbed_official | 579:53297373a894 | 749 | * </tr> |
| mbed_official | 579:53297373a894 | 750 | * <tr> |
| mbed_official | 579:53297373a894 | 751 | * <td>Add SAM L21 support</td> |
| mbed_official | 579:53297373a894 | 752 | * </tr> |
| mbed_official | 579:53297373a894 | 753 | * <tr> |
| mbed_official | 579:53297373a894 | 754 | * <td>Initial Release</td> |
| mbed_official | 579:53297373a894 | 755 | * </tr> |
| mbed_official | 579:53297373a894 | 756 | * </table> |
| mbed_official | 579:53297373a894 | 757 | */ |
| mbed_official | 579:53297373a894 | 758 | |
| mbed_official | 579:53297373a894 | 759 | /** |
| mbed_official | 579:53297373a894 | 760 | * \page asfdoc_sam0_dma_exqsg Examples for DMAC Driver |
| mbed_official | 579:53297373a894 | 761 | * |
| mbed_official | 579:53297373a894 | 762 | * This is a list of the available Quick Start Guides (QSGs) and example |
| mbed_official | 579:53297373a894 | 763 | * applications for \ref asfdoc_sam0_dma_group. QSGs are simple examples with |
| mbed_official | 579:53297373a894 | 764 | * step-by-step instructions to configure and use this driver in a selection of |
| mbed_official | 579:53297373a894 | 765 | * use cases. Note that QSGs can be compiled as a standalone application or be |
| mbed_official | 579:53297373a894 | 766 | * added to the user application. |
| mbed_official | 579:53297373a894 | 767 | * |
| mbed_official | 579:53297373a894 | 768 | * - \subpage asfdoc_sam0_dma_basic_use_case |
| mbed_official | 579:53297373a894 | 769 | * |
| mbed_official | 579:53297373a894 | 770 | * \note More DMA usage examples are available in peripheral QSGs. |
| mbed_official | 579:53297373a894 | 771 | * A quick start guide for TC/TCC |
| mbed_official | 579:53297373a894 | 772 | * shows the usage of DMA event trigger; SERCOM SPI/USART/I<SUP>2</SUP>C has example for |
| mbed_official | 579:53297373a894 | 773 | * DMA transfer from peripheral to memory or from memory to peripheral; |
| mbed_official | 579:53297373a894 | 774 | * ADC/DAC shows peripheral to peripheral transfer. |
| mbed_official | 579:53297373a894 | 775 | * |
| mbed_official | 579:53297373a894 | 776 | * \page asfdoc_sam0_dma_document_revision_history Document Revision History |
| mbed_official | 579:53297373a894 | 777 | * |
| mbed_official | 579:53297373a894 | 778 | * <table> |
| mbed_official | 579:53297373a894 | 779 | * <tr> |
| mbed_official | 579:53297373a894 | 780 | * <th>Doc. Rev.</td> |
| mbed_official | 579:53297373a894 | 781 | * <th>Date</td> |
| mbed_official | 579:53297373a894 | 782 | * <th>Comments</td> |
| mbed_official | 579:53297373a894 | 783 | * </tr> |
| mbed_official | 579:53297373a894 | 784 | * <tr> |
| mbed_official | 579:53297373a894 | 785 | * <td>C</td> |
| mbed_official | 579:53297373a894 | 786 | * <td>11/2014</td> |
| mbed_official | 579:53297373a894 | 787 | * <td>Added SAML21 support</td> |
| mbed_official | 579:53297373a894 | 788 | * </tr> |
| mbed_official | 579:53297373a894 | 789 | * <tr> |
| mbed_official | 579:53297373a894 | 790 | * <td>B</td> |
| mbed_official | 579:53297373a894 | 791 | * <td>12/2014</td> |
| mbed_official | 579:53297373a894 | 792 | * <td>Added SAMR21 and SAMD10/D11 support</td> |
| mbed_official | 579:53297373a894 | 793 | * </tr> |
| mbed_official | 579:53297373a894 | 794 | * <tr> |
| mbed_official | 579:53297373a894 | 795 | * <td>A</td> |
| mbed_official | 579:53297373a894 | 796 | * <td>02/2014</td> |
| mbed_official | 579:53297373a894 | 797 | * <td>Initial release</td> |
| mbed_official | 579:53297373a894 | 798 | * </tr> |
| mbed_official | 579:53297373a894 | 799 | * </table> |
| mbed_official | 579:53297373a894 | 800 | */ |
| mbed_official | 579:53297373a894 | 801 | |
| mbed_official | 579:53297373a894 | 802 | #ifdef __cplusplus |
| mbed_official | 579:53297373a894 | 803 | } |
| mbed_official | 579:53297373a894 | 804 | #endif |
| mbed_official | 579:53297373a894 | 805 | |
| mbed_official | 579:53297373a894 | 806 | #endif /* DMA_H_INCLUDED */ |