marcus chiou
mbed library sources
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mbed official
targets/cmsis/TARGET_Atmel/TARGET_SAM21/utils/cmsis/samd21/include/instance/ins_usb.h@592:a274ee790e56, 2015-07-17 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Jul 17 09:15:10 2015 +0100
- Revision:
- 592:a274ee790e56
- Parent:
- 579:53297373a894
Synchronized with git revision e7144f83a8d75df80c4877936b6ffe552b0be9e6
Full URL: https://github.com/mbedmicro/mbed/commit/e7144f83a8d75df80c4877936b6ffe552b0be9e6/
More API implementation for SAMR21
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 579:53297373a894 | 1 | #ifndef _SAMD21_USB_INSTANCE_ |
| mbed_official | 579:53297373a894 | 2 | #define _SAMD21_USB_INSTANCE_ |
| mbed_official | 579:53297373a894 | 3 | |
| mbed_official | 579:53297373a894 | 4 | /* ========== Register definition for USB peripheral ========== */ |
| mbed_official | 579:53297373a894 | 5 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 579:53297373a894 | 6 | #define REG_USB_CTRLA (0x41005000U) /**< \brief (USB) Control A */ |
| mbed_official | 579:53297373a894 | 7 | #define REG_USB_SYNCBUSY (0x41005002U) /**< \brief (USB) Synchronization Busy */ |
| mbed_official | 579:53297373a894 | 8 | #define REG_USB_QOSCTRL (0x41005003U) /**< \brief (USB) USB Quality Of Service */ |
| mbed_official | 579:53297373a894 | 9 | #define REG_USB_FSMSTATUS (0x4100500DU) /**< \brief (USB) Finite State Machine Status */ |
| mbed_official | 579:53297373a894 | 10 | #define REG_USB_DESCADD (0x41005024U) /**< \brief (USB) Descriptor Address */ |
| mbed_official | 579:53297373a894 | 11 | #define REG_USB_PADCAL (0x41005028U) /**< \brief (USB) USB PAD Calibration */ |
| mbed_official | 579:53297373a894 | 12 | #define REG_USB_DEVICE_CTRLB (0x41005008U) /**< \brief (USB) DEVICE Control B */ |
| mbed_official | 579:53297373a894 | 13 | #define REG_USB_DEVICE_DADD (0x4100500AU) /**< \brief (USB) DEVICE Device Address */ |
| mbed_official | 579:53297373a894 | 14 | #define REG_USB_DEVICE_STATUS (0x4100500CU) /**< \brief (USB) DEVICE Status */ |
| mbed_official | 579:53297373a894 | 15 | #define REG_USB_DEVICE_FNUM (0x41005010U) /**< \brief (USB) DEVICE Device Frame Number */ |
| mbed_official | 579:53297373a894 | 16 | #define REG_USB_DEVICE_INTENCLR (0x41005014U) /**< \brief (USB) DEVICE Device Interrupt Enable Clear */ |
| mbed_official | 579:53297373a894 | 17 | #define REG_USB_DEVICE_INTENSET (0x41005018U) /**< \brief (USB) DEVICE Device Interrupt Enable Set */ |
| mbed_official | 579:53297373a894 | 18 | #define REG_USB_DEVICE_INTFLAG (0x4100501CU) /**< \brief (USB) DEVICE Device Interrupt Flag */ |
| mbed_official | 579:53297373a894 | 19 | #define REG_USB_DEVICE_EPINTSMRY (0x41005020U) /**< \brief (USB) DEVICE End Point Interrupt Summary */ |
| mbed_official | 579:53297373a894 | 20 | #define REG_USB_DEVICE_ENDPOINT_EPCFG0 (0x41005100U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 0 */ |
| mbed_official | 579:53297373a894 | 21 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR0 (0x41005104U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 0 */ |
| mbed_official | 579:53297373a894 | 22 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET0 (0x41005105U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 0 */ |
| mbed_official | 579:53297373a894 | 23 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUS0 (0x41005106U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 0 */ |
| mbed_official | 579:53297373a894 | 24 | #define REG_USB_DEVICE_ENDPOINT_EPINTFLAG0 (0x41005107U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 0 */ |
| mbed_official | 579:53297373a894 | 25 | #define REG_USB_DEVICE_ENDPOINT_EPINTENCLR0 (0x41005108U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 0 */ |
| mbed_official | 579:53297373a894 | 26 | #define REG_USB_DEVICE_ENDPOINT_EPINTENSET0 (0x41005109U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 0 */ |
| mbed_official | 579:53297373a894 | 27 | #define REG_USB_DEVICE_ENDPOINT_EPCFG1 (0x41005120U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 1 */ |
| mbed_official | 579:53297373a894 | 28 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR1 (0x41005124U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 1 */ |
| mbed_official | 579:53297373a894 | 29 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET1 (0x41005125U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 1 */ |
| mbed_official | 579:53297373a894 | 30 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUS1 (0x41005126U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 1 */ |
| mbed_official | 579:53297373a894 | 31 | #define REG_USB_DEVICE_ENDPOINT_EPINTFLAG1 (0x41005127U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 1 */ |
| mbed_official | 579:53297373a894 | 32 | #define REG_USB_DEVICE_ENDPOINT_EPINTENCLR1 (0x41005128U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 1 */ |
| mbed_official | 579:53297373a894 | 33 | #define REG_USB_DEVICE_ENDPOINT_EPINTENSET1 (0x41005129U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 1 */ |
| mbed_official | 579:53297373a894 | 34 | #define REG_USB_DEVICE_ENDPOINT_EPCFG2 (0x41005140U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 2 */ |
| mbed_official | 579:53297373a894 | 35 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR2 (0x41005144U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 2 */ |
| mbed_official | 579:53297373a894 | 36 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET2 (0x41005145U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 2 */ |
| mbed_official | 579:53297373a894 | 37 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUS2 (0x41005146U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 2 */ |
| mbed_official | 579:53297373a894 | 38 | #define REG_USB_DEVICE_ENDPOINT_EPINTFLAG2 (0x41005147U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 2 */ |
| mbed_official | 579:53297373a894 | 39 | #define REG_USB_DEVICE_ENDPOINT_EPINTENCLR2 (0x41005148U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 2 */ |
| mbed_official | 579:53297373a894 | 40 | #define REG_USB_DEVICE_ENDPOINT_EPINTENSET2 (0x41005149U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 2 */ |
| mbed_official | 579:53297373a894 | 41 | #define REG_USB_DEVICE_ENDPOINT_EPCFG3 (0x41005160U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 3 */ |
| mbed_official | 579:53297373a894 | 42 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR3 (0x41005164U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 3 */ |
| mbed_official | 579:53297373a894 | 43 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET3 (0x41005165U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 3 */ |
| mbed_official | 579:53297373a894 | 44 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUS3 (0x41005166U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 3 */ |
| mbed_official | 579:53297373a894 | 45 | #define REG_USB_DEVICE_ENDPOINT_EPINTFLAG3 (0x41005167U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 3 */ |
| mbed_official | 579:53297373a894 | 46 | #define REG_USB_DEVICE_ENDPOINT_EPINTENCLR3 (0x41005168U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 3 */ |
| mbed_official | 579:53297373a894 | 47 | #define REG_USB_DEVICE_ENDPOINT_EPINTENSET3 (0x41005169U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 3 */ |
| mbed_official | 579:53297373a894 | 48 | #define REG_USB_DEVICE_ENDPOINT_EPCFG4 (0x41005180U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 4 */ |
| mbed_official | 579:53297373a894 | 49 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR4 (0x41005184U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 4 */ |
| mbed_official | 579:53297373a894 | 50 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET4 (0x41005185U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 4 */ |
| mbed_official | 579:53297373a894 | 51 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUS4 (0x41005186U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 4 */ |
| mbed_official | 579:53297373a894 | 52 | #define REG_USB_DEVICE_ENDPOINT_EPINTFLAG4 (0x41005187U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 4 */ |
| mbed_official | 579:53297373a894 | 53 | #define REG_USB_DEVICE_ENDPOINT_EPINTENCLR4 (0x41005188U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 4 */ |
| mbed_official | 579:53297373a894 | 54 | #define REG_USB_DEVICE_ENDPOINT_EPINTENSET4 (0x41005189U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 4 */ |
| mbed_official | 579:53297373a894 | 55 | #define REG_USB_DEVICE_ENDPOINT_EPCFG5 (0x410051A0U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 5 */ |
| mbed_official | 579:53297373a894 | 56 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR5 (0x410051A4U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 5 */ |
| mbed_official | 579:53297373a894 | 57 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET5 (0x410051A5U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 5 */ |
| mbed_official | 579:53297373a894 | 58 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUS5 (0x410051A6U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 5 */ |
| mbed_official | 579:53297373a894 | 59 | #define REG_USB_DEVICE_ENDPOINT_EPINTFLAG5 (0x410051A7U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 5 */ |
| mbed_official | 579:53297373a894 | 60 | #define REG_USB_DEVICE_ENDPOINT_EPINTENCLR5 (0x410051A8U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 5 */ |
| mbed_official | 579:53297373a894 | 61 | #define REG_USB_DEVICE_ENDPOINT_EPINTENSET5 (0x410051A9U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 5 */ |
| mbed_official | 579:53297373a894 | 62 | #define REG_USB_DEVICE_ENDPOINT_EPCFG6 (0x410051C0U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 6 */ |
| mbed_official | 579:53297373a894 | 63 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR6 (0x410051C4U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 6 */ |
| mbed_official | 579:53297373a894 | 64 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET6 (0x410051C5U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 6 */ |
| mbed_official | 579:53297373a894 | 65 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUS6 (0x410051C6U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 6 */ |
| mbed_official | 579:53297373a894 | 66 | #define REG_USB_DEVICE_ENDPOINT_EPINTFLAG6 (0x410051C7U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 6 */ |
| mbed_official | 579:53297373a894 | 67 | #define REG_USB_DEVICE_ENDPOINT_EPINTENCLR6 (0x410051C8U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 6 */ |
| mbed_official | 579:53297373a894 | 68 | #define REG_USB_DEVICE_ENDPOINT_EPINTENSET6 (0x410051C9U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 6 */ |
| mbed_official | 579:53297373a894 | 69 | #define REG_USB_DEVICE_ENDPOINT_EPCFG7 (0x410051E0U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 7 */ |
| mbed_official | 579:53297373a894 | 70 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR7 (0x410051E4U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 7 */ |
| mbed_official | 579:53297373a894 | 71 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET7 (0x410051E5U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 7 */ |
| mbed_official | 579:53297373a894 | 72 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUS7 (0x410051E6U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 7 */ |
| mbed_official | 579:53297373a894 | 73 | #define REG_USB_DEVICE_ENDPOINT_EPINTFLAG7 (0x410051E7U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 7 */ |
| mbed_official | 579:53297373a894 | 74 | #define REG_USB_DEVICE_ENDPOINT_EPINTENCLR7 (0x410051E8U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 7 */ |
| mbed_official | 579:53297373a894 | 75 | #define REG_USB_DEVICE_ENDPOINT_EPINTENSET7 (0x410051E9U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 7 */ |
| mbed_official | 579:53297373a894 | 76 | #define REG_USB_HOST_CTRLB (0x41005008U) /**< \brief (USB) HOST Control B */ |
| mbed_official | 579:53297373a894 | 77 | #define REG_USB_HOST_HSOFC (0x4100500AU) /**< \brief (USB) HOST Host Start Of Frame Control */ |
| mbed_official | 579:53297373a894 | 78 | #define REG_USB_HOST_STATUS (0x4100500CU) /**< \brief (USB) HOST Status */ |
| mbed_official | 579:53297373a894 | 79 | #define REG_USB_HOST_FNUM (0x41005010U) /**< \brief (USB) HOST Host Frame Number */ |
| mbed_official | 579:53297373a894 | 80 | #define REG_USB_HOST_FLENHIGH (0x41005012U) /**< \brief (USB) HOST Host Frame Length */ |
| mbed_official | 579:53297373a894 | 81 | #define REG_USB_HOST_INTENCLR (0x41005014U) /**< \brief (USB) HOST Host Interrupt Enable Clear */ |
| mbed_official | 579:53297373a894 | 82 | #define REG_USB_HOST_INTENSET (0x41005018U) /**< \brief (USB) HOST Host Interrupt Enable Set */ |
| mbed_official | 579:53297373a894 | 83 | #define REG_USB_HOST_INTFLAG (0x4100501CU) /**< \brief (USB) HOST Host Interrupt Flag */ |
| mbed_official | 579:53297373a894 | 84 | #define REG_USB_HOST_PINTSMRY (0x41005020U) /**< \brief (USB) HOST Pipe Interrupt Summary */ |
| mbed_official | 579:53297373a894 | 85 | #define REG_USB_HOST_PIPE_PCFG0 (0x41005100U) /**< \brief (USB) HOST_PIPE End Point Configuration 0 */ |
| mbed_official | 579:53297373a894 | 86 | #define REG_USB_HOST_PIPE_BINTERVAL0 (0x41005103U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 0 */ |
| mbed_official | 579:53297373a894 | 87 | #define REG_USB_HOST_PIPE_PSTATUSCLR0 (0x41005104U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 0 */ |
| mbed_official | 579:53297373a894 | 88 | #define REG_USB_HOST_PIPE_PSTATUSSET0 (0x41005105U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 0 */ |
| mbed_official | 579:53297373a894 | 89 | #define REG_USB_HOST_PIPE_PSTATUS0 (0x41005106U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 0 */ |
| mbed_official | 579:53297373a894 | 90 | #define REG_USB_HOST_PIPE_PINTFLAG0 (0x41005107U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 0 */ |
| mbed_official | 579:53297373a894 | 91 | #define REG_USB_HOST_PIPE_PINTENCLR0 (0x41005108U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 0 */ |
| mbed_official | 579:53297373a894 | 92 | #define REG_USB_HOST_PIPE_PINTENSET0 (0x41005109U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 0 */ |
| mbed_official | 579:53297373a894 | 93 | #define REG_USB_HOST_PIPE_PCFG1 (0x41005120U) /**< \brief (USB) HOST_PIPE End Point Configuration 1 */ |
| mbed_official | 579:53297373a894 | 94 | #define REG_USB_HOST_PIPE_BINTERVAL1 (0x41005123U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 1 */ |
| mbed_official | 579:53297373a894 | 95 | #define REG_USB_HOST_PIPE_PSTATUSCLR1 (0x41005124U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 1 */ |
| mbed_official | 579:53297373a894 | 96 | #define REG_USB_HOST_PIPE_PSTATUSSET1 (0x41005125U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 1 */ |
| mbed_official | 579:53297373a894 | 97 | #define REG_USB_HOST_PIPE_PSTATUS1 (0x41005126U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 1 */ |
| mbed_official | 579:53297373a894 | 98 | #define REG_USB_HOST_PIPE_PINTFLAG1 (0x41005127U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 1 */ |
| mbed_official | 579:53297373a894 | 99 | #define REG_USB_HOST_PIPE_PINTENCLR1 (0x41005128U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 1 */ |
| mbed_official | 579:53297373a894 | 100 | #define REG_USB_HOST_PIPE_PINTENSET1 (0x41005129U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 1 */ |
| mbed_official | 579:53297373a894 | 101 | #define REG_USB_HOST_PIPE_PCFG2 (0x41005140U) /**< \brief (USB) HOST_PIPE End Point Configuration 2 */ |
| mbed_official | 579:53297373a894 | 102 | #define REG_USB_HOST_PIPE_BINTERVAL2 (0x41005143U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 2 */ |
| mbed_official | 579:53297373a894 | 103 | #define REG_USB_HOST_PIPE_PSTATUSCLR2 (0x41005144U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 2 */ |
| mbed_official | 579:53297373a894 | 104 | #define REG_USB_HOST_PIPE_PSTATUSSET2 (0x41005145U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 2 */ |
| mbed_official | 579:53297373a894 | 105 | #define REG_USB_HOST_PIPE_PSTATUS2 (0x41005146U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 2 */ |
| mbed_official | 579:53297373a894 | 106 | #define REG_USB_HOST_PIPE_PINTFLAG2 (0x41005147U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 2 */ |
| mbed_official | 579:53297373a894 | 107 | #define REG_USB_HOST_PIPE_PINTENCLR2 (0x41005148U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 2 */ |
| mbed_official | 579:53297373a894 | 108 | #define REG_USB_HOST_PIPE_PINTENSET2 (0x41005149U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 2 */ |
| mbed_official | 579:53297373a894 | 109 | #define REG_USB_HOST_PIPE_PCFG3 (0x41005160U) /**< \brief (USB) HOST_PIPE End Point Configuration 3 */ |
| mbed_official | 579:53297373a894 | 110 | #define REG_USB_HOST_PIPE_BINTERVAL3 (0x41005163U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 3 */ |
| mbed_official | 579:53297373a894 | 111 | #define REG_USB_HOST_PIPE_PSTATUSCLR3 (0x41005164U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 3 */ |
| mbed_official | 579:53297373a894 | 112 | #define REG_USB_HOST_PIPE_PSTATUSSET3 (0x41005165U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 3 */ |
| mbed_official | 579:53297373a894 | 113 | #define REG_USB_HOST_PIPE_PSTATUS3 (0x41005166U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 3 */ |
| mbed_official | 579:53297373a894 | 114 | #define REG_USB_HOST_PIPE_PINTFLAG3 (0x41005167U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 3 */ |
| mbed_official | 579:53297373a894 | 115 | #define REG_USB_HOST_PIPE_PINTENCLR3 (0x41005168U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 3 */ |
| mbed_official | 579:53297373a894 | 116 | #define REG_USB_HOST_PIPE_PINTENSET3 (0x41005169U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 3 */ |
| mbed_official | 579:53297373a894 | 117 | #define REG_USB_HOST_PIPE_PCFG4 (0x41005180U) /**< \brief (USB) HOST_PIPE End Point Configuration 4 */ |
| mbed_official | 579:53297373a894 | 118 | #define REG_USB_HOST_PIPE_BINTERVAL4 (0x41005183U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 4 */ |
| mbed_official | 579:53297373a894 | 119 | #define REG_USB_HOST_PIPE_PSTATUSCLR4 (0x41005184U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 4 */ |
| mbed_official | 579:53297373a894 | 120 | #define REG_USB_HOST_PIPE_PSTATUSSET4 (0x41005185U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 4 */ |
| mbed_official | 579:53297373a894 | 121 | #define REG_USB_HOST_PIPE_PSTATUS4 (0x41005186U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 4 */ |
| mbed_official | 579:53297373a894 | 122 | #define REG_USB_HOST_PIPE_PINTFLAG4 (0x41005187U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 4 */ |
| mbed_official | 579:53297373a894 | 123 | #define REG_USB_HOST_PIPE_PINTENCLR4 (0x41005188U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 4 */ |
| mbed_official | 579:53297373a894 | 124 | #define REG_USB_HOST_PIPE_PINTENSET4 (0x41005189U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 4 */ |
| mbed_official | 579:53297373a894 | 125 | #define REG_USB_HOST_PIPE_PCFG5 (0x410051A0U) /**< \brief (USB) HOST_PIPE End Point Configuration 5 */ |
| mbed_official | 579:53297373a894 | 126 | #define REG_USB_HOST_PIPE_BINTERVAL5 (0x410051A3U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 5 */ |
| mbed_official | 579:53297373a894 | 127 | #define REG_USB_HOST_PIPE_PSTATUSCLR5 (0x410051A4U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 5 */ |
| mbed_official | 579:53297373a894 | 128 | #define REG_USB_HOST_PIPE_PSTATUSSET5 (0x410051A5U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 5 */ |
| mbed_official | 579:53297373a894 | 129 | #define REG_USB_HOST_PIPE_PSTATUS5 (0x410051A6U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 5 */ |
| mbed_official | 579:53297373a894 | 130 | #define REG_USB_HOST_PIPE_PINTFLAG5 (0x410051A7U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 5 */ |
| mbed_official | 579:53297373a894 | 131 | #define REG_USB_HOST_PIPE_PINTENCLR5 (0x410051A8U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 5 */ |
| mbed_official | 579:53297373a894 | 132 | #define REG_USB_HOST_PIPE_PINTENSET5 (0x410051A9U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 5 */ |
| mbed_official | 579:53297373a894 | 133 | #define REG_USB_HOST_PIPE_PCFG6 (0x410051C0U) /**< \brief (USB) HOST_PIPE End Point Configuration 6 */ |
| mbed_official | 579:53297373a894 | 134 | #define REG_USB_HOST_PIPE_BINTERVAL6 (0x410051C3U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 6 */ |
| mbed_official | 579:53297373a894 | 135 | #define REG_USB_HOST_PIPE_PSTATUSCLR6 (0x410051C4U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 6 */ |
| mbed_official | 579:53297373a894 | 136 | #define REG_USB_HOST_PIPE_PSTATUSSET6 (0x410051C5U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 6 */ |
| mbed_official | 579:53297373a894 | 137 | #define REG_USB_HOST_PIPE_PSTATUS6 (0x410051C6U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 6 */ |
| mbed_official | 579:53297373a894 | 138 | #define REG_USB_HOST_PIPE_PINTFLAG6 (0x410051C7U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 6 */ |
| mbed_official | 579:53297373a894 | 139 | #define REG_USB_HOST_PIPE_PINTENCLR6 (0x410051C8U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 6 */ |
| mbed_official | 579:53297373a894 | 140 | #define REG_USB_HOST_PIPE_PINTENSET6 (0x410051C9U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 6 */ |
| mbed_official | 579:53297373a894 | 141 | #define REG_USB_HOST_PIPE_PCFG7 (0x410051E0U) /**< \brief (USB) HOST_PIPE End Point Configuration 7 */ |
| mbed_official | 579:53297373a894 | 142 | #define REG_USB_HOST_PIPE_BINTERVAL7 (0x410051E3U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 7 */ |
| mbed_official | 579:53297373a894 | 143 | #define REG_USB_HOST_PIPE_PSTATUSCLR7 (0x410051E4U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 7 */ |
| mbed_official | 579:53297373a894 | 144 | #define REG_USB_HOST_PIPE_PSTATUSSET7 (0x410051E5U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 7 */ |
| mbed_official | 579:53297373a894 | 145 | #define REG_USB_HOST_PIPE_PSTATUS7 (0x410051E6U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 7 */ |
| mbed_official | 579:53297373a894 | 146 | #define REG_USB_HOST_PIPE_PINTFLAG7 (0x410051E7U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 7 */ |
| mbed_official | 579:53297373a894 | 147 | #define REG_USB_HOST_PIPE_PINTENCLR7 (0x410051E8U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 7 */ |
| mbed_official | 579:53297373a894 | 148 | #define REG_USB_HOST_PIPE_PINTENSET7 (0x410051E9U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 7 */ |
| mbed_official | 579:53297373a894 | 149 | #else |
| mbed_official | 579:53297373a894 | 150 | #define REG_USB_CTRLA (*(RwReg8 *)0x41005000U) /**< \brief (USB) Control A */ |
| mbed_official | 579:53297373a894 | 151 | #define REG_USB_SYNCBUSY (*(RoReg8 *)0x41005002U) /**< \brief (USB) Synchronization Busy */ |
| mbed_official | 579:53297373a894 | 152 | #define REG_USB_QOSCTRL (*(RwReg8 *)0x41005003U) /**< \brief (USB) USB Quality Of Service */ |
| mbed_official | 579:53297373a894 | 153 | #define REG_USB_FSMSTATUS (*(RoReg8 *)0x4100500DU) /**< \brief (USB) Finite State Machine Status */ |
| mbed_official | 579:53297373a894 | 154 | #define REG_USB_DESCADD (*(RwReg *)0x41005024U) /**< \brief (USB) Descriptor Address */ |
| mbed_official | 579:53297373a894 | 155 | #define REG_USB_PADCAL (*(RwReg16*)0x41005028U) /**< \brief (USB) USB PAD Calibration */ |
| mbed_official | 579:53297373a894 | 156 | #define REG_USB_DEVICE_CTRLB (*(RwReg16*)0x41005008U) /**< \brief (USB) DEVICE Control B */ |
| mbed_official | 579:53297373a894 | 157 | #define REG_USB_DEVICE_DADD (*(RwReg8 *)0x4100500AU) /**< \brief (USB) DEVICE Device Address */ |
| mbed_official | 579:53297373a894 | 158 | #define REG_USB_DEVICE_STATUS (*(RoReg8 *)0x4100500CU) /**< \brief (USB) DEVICE Status */ |
| mbed_official | 579:53297373a894 | 159 | #define REG_USB_DEVICE_FNUM (*(RoReg16*)0x41005010U) /**< \brief (USB) DEVICE Device Frame Number */ |
| mbed_official | 579:53297373a894 | 160 | #define REG_USB_DEVICE_INTENCLR (*(RwReg16*)0x41005014U) /**< \brief (USB) DEVICE Device Interrupt Enable Clear */ |
| mbed_official | 579:53297373a894 | 161 | #define REG_USB_DEVICE_INTENSET (*(RwReg16*)0x41005018U) /**< \brief (USB) DEVICE Device Interrupt Enable Set */ |
| mbed_official | 579:53297373a894 | 162 | #define REG_USB_DEVICE_INTFLAG (*(RwReg16*)0x4100501CU) /**< \brief (USB) DEVICE Device Interrupt Flag */ |
| mbed_official | 579:53297373a894 | 163 | #define REG_USB_DEVICE_EPINTSMRY (*(RoReg16*)0x41005020U) /**< \brief (USB) DEVICE End Point Interrupt Summary */ |
| mbed_official | 579:53297373a894 | 164 | #define REG_USB_DEVICE_ENDPOINT_EPCFG0 (*(RwReg8 *)0x41005100U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 0 */ |
| mbed_official | 579:53297373a894 | 165 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR0 (*(WoReg8 *)0x41005104U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 0 */ |
| mbed_official | 579:53297373a894 | 166 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET0 (*(WoReg8 *)0x41005105U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 0 */ |
| mbed_official | 579:53297373a894 | 167 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUS0 (*(RoReg8 *)0x41005106U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 0 */ |
| mbed_official | 579:53297373a894 | 168 | #define REG_USB_DEVICE_ENDPOINT_EPINTFLAG0 (*(RwReg8 *)0x41005107U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 0 */ |
| mbed_official | 579:53297373a894 | 169 | #define REG_USB_DEVICE_ENDPOINT_EPINTENCLR0 (*(RwReg8 *)0x41005108U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 0 */ |
| mbed_official | 579:53297373a894 | 170 | #define REG_USB_DEVICE_ENDPOINT_EPINTENSET0 (*(RwReg8 *)0x41005109U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 0 */ |
| mbed_official | 579:53297373a894 | 171 | #define REG_USB_DEVICE_ENDPOINT_EPCFG1 (*(RwReg8 *)0x41005120U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 1 */ |
| mbed_official | 579:53297373a894 | 172 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR1 (*(WoReg8 *)0x41005124U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 1 */ |
| mbed_official | 579:53297373a894 | 173 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET1 (*(WoReg8 *)0x41005125U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 1 */ |
| mbed_official | 579:53297373a894 | 174 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUS1 (*(RoReg8 *)0x41005126U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 1 */ |
| mbed_official | 579:53297373a894 | 175 | #define REG_USB_DEVICE_ENDPOINT_EPINTFLAG1 (*(RwReg8 *)0x41005127U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 1 */ |
| mbed_official | 579:53297373a894 | 176 | #define REG_USB_DEVICE_ENDPOINT_EPINTENCLR1 (*(RwReg8 *)0x41005128U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 1 */ |
| mbed_official | 579:53297373a894 | 177 | #define REG_USB_DEVICE_ENDPOINT_EPINTENSET1 (*(RwReg8 *)0x41005129U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 1 */ |
| mbed_official | 579:53297373a894 | 178 | #define REG_USB_DEVICE_ENDPOINT_EPCFG2 (*(RwReg8 *)0x41005140U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 2 */ |
| mbed_official | 579:53297373a894 | 179 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR2 (*(WoReg8 *)0x41005144U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 2 */ |
| mbed_official | 579:53297373a894 | 180 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET2 (*(WoReg8 *)0x41005145U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 2 */ |
| mbed_official | 579:53297373a894 | 181 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUS2 (*(RoReg8 *)0x41005146U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 2 */ |
| mbed_official | 579:53297373a894 | 182 | #define REG_USB_DEVICE_ENDPOINT_EPINTFLAG2 (*(RwReg8 *)0x41005147U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 2 */ |
| mbed_official | 579:53297373a894 | 183 | #define REG_USB_DEVICE_ENDPOINT_EPINTENCLR2 (*(RwReg8 *)0x41005148U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 2 */ |
| mbed_official | 579:53297373a894 | 184 | #define REG_USB_DEVICE_ENDPOINT_EPINTENSET2 (*(RwReg8 *)0x41005149U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 2 */ |
| mbed_official | 579:53297373a894 | 185 | #define REG_USB_DEVICE_ENDPOINT_EPCFG3 (*(RwReg8 *)0x41005160U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 3 */ |
| mbed_official | 579:53297373a894 | 186 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR3 (*(WoReg8 *)0x41005164U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 3 */ |
| mbed_official | 579:53297373a894 | 187 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET3 (*(WoReg8 *)0x41005165U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 3 */ |
| mbed_official | 579:53297373a894 | 188 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUS3 (*(RoReg8 *)0x41005166U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 3 */ |
| mbed_official | 579:53297373a894 | 189 | #define REG_USB_DEVICE_ENDPOINT_EPINTFLAG3 (*(RwReg8 *)0x41005167U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 3 */ |
| mbed_official | 579:53297373a894 | 190 | #define REG_USB_DEVICE_ENDPOINT_EPINTENCLR3 (*(RwReg8 *)0x41005168U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 3 */ |
| mbed_official | 579:53297373a894 | 191 | #define REG_USB_DEVICE_ENDPOINT_EPINTENSET3 (*(RwReg8 *)0x41005169U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 3 */ |
| mbed_official | 579:53297373a894 | 192 | #define REG_USB_DEVICE_ENDPOINT_EPCFG4 (*(RwReg8 *)0x41005180U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 4 */ |
| mbed_official | 579:53297373a894 | 193 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR4 (*(WoReg8 *)0x41005184U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 4 */ |
| mbed_official | 579:53297373a894 | 194 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET4 (*(WoReg8 *)0x41005185U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 4 */ |
| mbed_official | 579:53297373a894 | 195 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUS4 (*(RoReg8 *)0x41005186U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 4 */ |
| mbed_official | 579:53297373a894 | 196 | #define REG_USB_DEVICE_ENDPOINT_EPINTFLAG4 (*(RwReg8 *)0x41005187U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 4 */ |
| mbed_official | 579:53297373a894 | 197 | #define REG_USB_DEVICE_ENDPOINT_EPINTENCLR4 (*(RwReg8 *)0x41005188U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 4 */ |
| mbed_official | 579:53297373a894 | 198 | #define REG_USB_DEVICE_ENDPOINT_EPINTENSET4 (*(RwReg8 *)0x41005189U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 4 */ |
| mbed_official | 579:53297373a894 | 199 | #define REG_USB_DEVICE_ENDPOINT_EPCFG5 (*(RwReg8 *)0x410051A0U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 5 */ |
| mbed_official | 579:53297373a894 | 200 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR5 (*(WoReg8 *)0x410051A4U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 5 */ |
| mbed_official | 579:53297373a894 | 201 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET5 (*(WoReg8 *)0x410051A5U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 5 */ |
| mbed_official | 579:53297373a894 | 202 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUS5 (*(RoReg8 *)0x410051A6U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 5 */ |
| mbed_official | 579:53297373a894 | 203 | #define REG_USB_DEVICE_ENDPOINT_EPINTFLAG5 (*(RwReg8 *)0x410051A7U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 5 */ |
| mbed_official | 579:53297373a894 | 204 | #define REG_USB_DEVICE_ENDPOINT_EPINTENCLR5 (*(RwReg8 *)0x410051A8U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 5 */ |
| mbed_official | 579:53297373a894 | 205 | #define REG_USB_DEVICE_ENDPOINT_EPINTENSET5 (*(RwReg8 *)0x410051A9U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 5 */ |
| mbed_official | 579:53297373a894 | 206 | #define REG_USB_DEVICE_ENDPOINT_EPCFG6 (*(RwReg8 *)0x410051C0U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 6 */ |
| mbed_official | 579:53297373a894 | 207 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR6 (*(WoReg8 *)0x410051C4U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 6 */ |
| mbed_official | 579:53297373a894 | 208 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET6 (*(WoReg8 *)0x410051C5U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 6 */ |
| mbed_official | 579:53297373a894 | 209 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUS6 (*(RoReg8 *)0x410051C6U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 6 */ |
| mbed_official | 579:53297373a894 | 210 | #define REG_USB_DEVICE_ENDPOINT_EPINTFLAG6 (*(RwReg8 *)0x410051C7U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 6 */ |
| mbed_official | 579:53297373a894 | 211 | #define REG_USB_DEVICE_ENDPOINT_EPINTENCLR6 (*(RwReg8 *)0x410051C8U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 6 */ |
| mbed_official | 579:53297373a894 | 212 | #define REG_USB_DEVICE_ENDPOINT_EPINTENSET6 (*(RwReg8 *)0x410051C9U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 6 */ |
| mbed_official | 579:53297373a894 | 213 | #define REG_USB_DEVICE_ENDPOINT_EPCFG7 (*(RwReg8 *)0x410051E0U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 7 */ |
| mbed_official | 579:53297373a894 | 214 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR7 (*(WoReg8 *)0x410051E4U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 7 */ |
| mbed_official | 579:53297373a894 | 215 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET7 (*(WoReg8 *)0x410051E5U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 7 */ |
| mbed_official | 579:53297373a894 | 216 | #define REG_USB_DEVICE_ENDPOINT_EPSTATUS7 (*(RoReg8 *)0x410051E6U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 7 */ |
| mbed_official | 579:53297373a894 | 217 | #define REG_USB_DEVICE_ENDPOINT_EPINTFLAG7 (*(RwReg8 *)0x410051E7U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 7 */ |
| mbed_official | 579:53297373a894 | 218 | #define REG_USB_DEVICE_ENDPOINT_EPINTENCLR7 (*(RwReg8 *)0x410051E8U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 7 */ |
| mbed_official | 579:53297373a894 | 219 | #define REG_USB_DEVICE_ENDPOINT_EPINTENSET7 (*(RwReg8 *)0x410051E9U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 7 */ |
| mbed_official | 579:53297373a894 | 220 | #define REG_USB_HOST_CTRLB (*(RwReg16*)0x41005008U) /**< \brief (USB) HOST Control B */ |
| mbed_official | 579:53297373a894 | 221 | #define REG_USB_HOST_HSOFC (*(RwReg8 *)0x4100500AU) /**< \brief (USB) HOST Host Start Of Frame Control */ |
| mbed_official | 579:53297373a894 | 222 | #define REG_USB_HOST_STATUS (*(RwReg8 *)0x4100500CU) /**< \brief (USB) HOST Status */ |
| mbed_official | 579:53297373a894 | 223 | #define REG_USB_HOST_FNUM (*(RwReg16*)0x41005010U) /**< \brief (USB) HOST Host Frame Number */ |
| mbed_official | 579:53297373a894 | 224 | #define REG_USB_HOST_FLENHIGH (*(RoReg8 *)0x41005012U) /**< \brief (USB) HOST Host Frame Length */ |
| mbed_official | 579:53297373a894 | 225 | #define REG_USB_HOST_INTENCLR (*(RwReg16*)0x41005014U) /**< \brief (USB) HOST Host Interrupt Enable Clear */ |
| mbed_official | 579:53297373a894 | 226 | #define REG_USB_HOST_INTENSET (*(RwReg16*)0x41005018U) /**< \brief (USB) HOST Host Interrupt Enable Set */ |
| mbed_official | 579:53297373a894 | 227 | #define REG_USB_HOST_INTFLAG (*(RwReg16*)0x4100501CU) /**< \brief (USB) HOST Host Interrupt Flag */ |
| mbed_official | 579:53297373a894 | 228 | #define REG_USB_HOST_PINTSMRY (*(RoReg16*)0x41005020U) /**< \brief (USB) HOST Pipe Interrupt Summary */ |
| mbed_official | 579:53297373a894 | 229 | #define REG_USB_HOST_PIPE_PCFG0 (*(RwReg8 *)0x41005100U) /**< \brief (USB) HOST_PIPE End Point Configuration 0 */ |
| mbed_official | 579:53297373a894 | 230 | #define REG_USB_HOST_PIPE_BINTERVAL0 (*(RwReg8 *)0x41005103U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 0 */ |
| mbed_official | 579:53297373a894 | 231 | #define REG_USB_HOST_PIPE_PSTATUSCLR0 (*(WoReg8 *)0x41005104U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 0 */ |
| mbed_official | 579:53297373a894 | 232 | #define REG_USB_HOST_PIPE_PSTATUSSET0 (*(WoReg8 *)0x41005105U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 0 */ |
| mbed_official | 579:53297373a894 | 233 | #define REG_USB_HOST_PIPE_PSTATUS0 (*(RoReg8 *)0x41005106U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 0 */ |
| mbed_official | 579:53297373a894 | 234 | #define REG_USB_HOST_PIPE_PINTFLAG0 (*(RwReg8 *)0x41005107U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 0 */ |
| mbed_official | 579:53297373a894 | 235 | #define REG_USB_HOST_PIPE_PINTENCLR0 (*(RwReg8 *)0x41005108U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 0 */ |
| mbed_official | 579:53297373a894 | 236 | #define REG_USB_HOST_PIPE_PINTENSET0 (*(RwReg8 *)0x41005109U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 0 */ |
| mbed_official | 579:53297373a894 | 237 | #define REG_USB_HOST_PIPE_PCFG1 (*(RwReg8 *)0x41005120U) /**< \brief (USB) HOST_PIPE End Point Configuration 1 */ |
| mbed_official | 579:53297373a894 | 238 | #define REG_USB_HOST_PIPE_BINTERVAL1 (*(RwReg8 *)0x41005123U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 1 */ |
| mbed_official | 579:53297373a894 | 239 | #define REG_USB_HOST_PIPE_PSTATUSCLR1 (*(WoReg8 *)0x41005124U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 1 */ |
| mbed_official | 579:53297373a894 | 240 | #define REG_USB_HOST_PIPE_PSTATUSSET1 (*(WoReg8 *)0x41005125U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 1 */ |
| mbed_official | 579:53297373a894 | 241 | #define REG_USB_HOST_PIPE_PSTATUS1 (*(RoReg8 *)0x41005126U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 1 */ |
| mbed_official | 579:53297373a894 | 242 | #define REG_USB_HOST_PIPE_PINTFLAG1 (*(RwReg8 *)0x41005127U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 1 */ |
| mbed_official | 579:53297373a894 | 243 | #define REG_USB_HOST_PIPE_PINTENCLR1 (*(RwReg8 *)0x41005128U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 1 */ |
| mbed_official | 579:53297373a894 | 244 | #define REG_USB_HOST_PIPE_PINTENSET1 (*(RwReg8 *)0x41005129U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 1 */ |
| mbed_official | 579:53297373a894 | 245 | #define REG_USB_HOST_PIPE_PCFG2 (*(RwReg8 *)0x41005140U) /**< \brief (USB) HOST_PIPE End Point Configuration 2 */ |
| mbed_official | 579:53297373a894 | 246 | #define REG_USB_HOST_PIPE_BINTERVAL2 (*(RwReg8 *)0x41005143U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 2 */ |
| mbed_official | 579:53297373a894 | 247 | #define REG_USB_HOST_PIPE_PSTATUSCLR2 (*(WoReg8 *)0x41005144U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 2 */ |
| mbed_official | 579:53297373a894 | 248 | #define REG_USB_HOST_PIPE_PSTATUSSET2 (*(WoReg8 *)0x41005145U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 2 */ |
| mbed_official | 579:53297373a894 | 249 | #define REG_USB_HOST_PIPE_PSTATUS2 (*(RoReg8 *)0x41005146U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 2 */ |
| mbed_official | 579:53297373a894 | 250 | #define REG_USB_HOST_PIPE_PINTFLAG2 (*(RwReg8 *)0x41005147U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 2 */ |
| mbed_official | 579:53297373a894 | 251 | #define REG_USB_HOST_PIPE_PINTENCLR2 (*(RwReg8 *)0x41005148U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 2 */ |
| mbed_official | 579:53297373a894 | 252 | #define REG_USB_HOST_PIPE_PINTENSET2 (*(RwReg8 *)0x41005149U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 2 */ |
| mbed_official | 579:53297373a894 | 253 | #define REG_USB_HOST_PIPE_PCFG3 (*(RwReg8 *)0x41005160U) /**< \brief (USB) HOST_PIPE End Point Configuration 3 */ |
| mbed_official | 579:53297373a894 | 254 | #define REG_USB_HOST_PIPE_BINTERVAL3 (*(RwReg8 *)0x41005163U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 3 */ |
| mbed_official | 579:53297373a894 | 255 | #define REG_USB_HOST_PIPE_PSTATUSCLR3 (*(WoReg8 *)0x41005164U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 3 */ |
| mbed_official | 579:53297373a894 | 256 | #define REG_USB_HOST_PIPE_PSTATUSSET3 (*(WoReg8 *)0x41005165U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 3 */ |
| mbed_official | 579:53297373a894 | 257 | #define REG_USB_HOST_PIPE_PSTATUS3 (*(RoReg8 *)0x41005166U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 3 */ |
| mbed_official | 579:53297373a894 | 258 | #define REG_USB_HOST_PIPE_PINTFLAG3 (*(RwReg8 *)0x41005167U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 3 */ |
| mbed_official | 579:53297373a894 | 259 | #define REG_USB_HOST_PIPE_PINTENCLR3 (*(RwReg8 *)0x41005168U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 3 */ |
| mbed_official | 579:53297373a894 | 260 | #define REG_USB_HOST_PIPE_PINTENSET3 (*(RwReg8 *)0x41005169U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 3 */ |
| mbed_official | 579:53297373a894 | 261 | #define REG_USB_HOST_PIPE_PCFG4 (*(RwReg8 *)0x41005180U) /**< \brief (USB) HOST_PIPE End Point Configuration 4 */ |
| mbed_official | 579:53297373a894 | 262 | #define REG_USB_HOST_PIPE_BINTERVAL4 (*(RwReg8 *)0x41005183U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 4 */ |
| mbed_official | 579:53297373a894 | 263 | #define REG_USB_HOST_PIPE_PSTATUSCLR4 (*(WoReg8 *)0x41005184U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 4 */ |
| mbed_official | 579:53297373a894 | 264 | #define REG_USB_HOST_PIPE_PSTATUSSET4 (*(WoReg8 *)0x41005185U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 4 */ |
| mbed_official | 579:53297373a894 | 265 | #define REG_USB_HOST_PIPE_PSTATUS4 (*(RoReg8 *)0x41005186U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 4 */ |
| mbed_official | 579:53297373a894 | 266 | #define REG_USB_HOST_PIPE_PINTFLAG4 (*(RwReg8 *)0x41005187U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 4 */ |
| mbed_official | 579:53297373a894 | 267 | #define REG_USB_HOST_PIPE_PINTENCLR4 (*(RwReg8 *)0x41005188U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 4 */ |
| mbed_official | 579:53297373a894 | 268 | #define REG_USB_HOST_PIPE_PINTENSET4 (*(RwReg8 *)0x41005189U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 4 */ |
| mbed_official | 579:53297373a894 | 269 | #define REG_USB_HOST_PIPE_PCFG5 (*(RwReg8 *)0x410051A0U) /**< \brief (USB) HOST_PIPE End Point Configuration 5 */ |
| mbed_official | 579:53297373a894 | 270 | #define REG_USB_HOST_PIPE_BINTERVAL5 (*(RwReg8 *)0x410051A3U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 5 */ |
| mbed_official | 579:53297373a894 | 271 | #define REG_USB_HOST_PIPE_PSTATUSCLR5 (*(WoReg8 *)0x410051A4U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 5 */ |
| mbed_official | 579:53297373a894 | 272 | #define REG_USB_HOST_PIPE_PSTATUSSET5 (*(WoReg8 *)0x410051A5U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 5 */ |
| mbed_official | 579:53297373a894 | 273 | #define REG_USB_HOST_PIPE_PSTATUS5 (*(RoReg8 *)0x410051A6U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 5 */ |
| mbed_official | 579:53297373a894 | 274 | #define REG_USB_HOST_PIPE_PINTFLAG5 (*(RwReg8 *)0x410051A7U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 5 */ |
| mbed_official | 579:53297373a894 | 275 | #define REG_USB_HOST_PIPE_PINTENCLR5 (*(RwReg8 *)0x410051A8U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 5 */ |
| mbed_official | 579:53297373a894 | 276 | #define REG_USB_HOST_PIPE_PINTENSET5 (*(RwReg8 *)0x410051A9U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 5 */ |
| mbed_official | 579:53297373a894 | 277 | #define REG_USB_HOST_PIPE_PCFG6 (*(RwReg8 *)0x410051C0U) /**< \brief (USB) HOST_PIPE End Point Configuration 6 */ |
| mbed_official | 579:53297373a894 | 278 | #define REG_USB_HOST_PIPE_BINTERVAL6 (*(RwReg8 *)0x410051C3U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 6 */ |
| mbed_official | 579:53297373a894 | 279 | #define REG_USB_HOST_PIPE_PSTATUSCLR6 (*(WoReg8 *)0x410051C4U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 6 */ |
| mbed_official | 579:53297373a894 | 280 | #define REG_USB_HOST_PIPE_PSTATUSSET6 (*(WoReg8 *)0x410051C5U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 6 */ |
| mbed_official | 579:53297373a894 | 281 | #define REG_USB_HOST_PIPE_PSTATUS6 (*(RoReg8 *)0x410051C6U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 6 */ |
| mbed_official | 579:53297373a894 | 282 | #define REG_USB_HOST_PIPE_PINTFLAG6 (*(RwReg8 *)0x410051C7U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 6 */ |
| mbed_official | 579:53297373a894 | 283 | #define REG_USB_HOST_PIPE_PINTENCLR6 (*(RwReg8 *)0x410051C8U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 6 */ |
| mbed_official | 579:53297373a894 | 284 | #define REG_USB_HOST_PIPE_PINTENSET6 (*(RwReg8 *)0x410051C9U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 6 */ |
| mbed_official | 579:53297373a894 | 285 | #define REG_USB_HOST_PIPE_PCFG7 (*(RwReg8 *)0x410051E0U) /**< \brief (USB) HOST_PIPE End Point Configuration 7 */ |
| mbed_official | 579:53297373a894 | 286 | #define REG_USB_HOST_PIPE_BINTERVAL7 (*(RwReg8 *)0x410051E3U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 7 */ |
| mbed_official | 579:53297373a894 | 287 | #define REG_USB_HOST_PIPE_PSTATUSCLR7 (*(WoReg8 *)0x410051E4U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 7 */ |
| mbed_official | 579:53297373a894 | 288 | #define REG_USB_HOST_PIPE_PSTATUSSET7 (*(WoReg8 *)0x410051E5U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 7 */ |
| mbed_official | 579:53297373a894 | 289 | #define REG_USB_HOST_PIPE_PSTATUS7 (*(RoReg8 *)0x410051E6U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 7 */ |
| mbed_official | 579:53297373a894 | 290 | #define REG_USB_HOST_PIPE_PINTFLAG7 (*(RwReg8 *)0x410051E7U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 7 */ |
| mbed_official | 579:53297373a894 | 291 | #define REG_USB_HOST_PIPE_PINTENCLR7 (*(RwReg8 *)0x410051E8U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 7 */ |
| mbed_official | 579:53297373a894 | 292 | #define REG_USB_HOST_PIPE_PINTENSET7 (*(RwReg8 *)0x410051E9U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 7 */ |
| mbed_official | 579:53297373a894 | 293 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 579:53297373a894 | 294 | |
| mbed_official | 579:53297373a894 | 295 | /* ========== Instance parameters for USB peripheral ========== */ |
| mbed_official | 579:53297373a894 | 296 | #define USB_EPT_NBR 8 // Number of USB end points (obsolete) |
| mbed_official | 579:53297373a894 | 297 | #define USB_EPT_NUM 8 // Number of USB end points |
| mbed_official | 579:53297373a894 | 298 | #define USB_GCLK_ID 6 // Index of Generic Clock |
| mbed_official | 579:53297373a894 | 299 | #define USB_PIPE_NUM 8 // Number of USB pipes |
| mbed_official | 579:53297373a894 | 300 | |
| mbed_official | 579:53297373a894 | 301 | #endif /* _SAMD21_USB_INSTANCE_ */ |