marcus chiou / mbed-src

mbed library sources

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targets/cmsis/TARGET_Atmel/TARGET_SAM21/utils/cmsis/samd21/include/instance/ins_mtb.h@592:a274ee790e56, 2015-07-17 (annotated)

Committer:
mbed_official
Date:
Fri Jul 17 09:15:10 2015 +0100
Revision:
592:a274ee790e56
Parent:
579:53297373a894 
Synchronized with git revision e7144f83a8d75df80c4877936b6ffe552b0be9e6



Full URL: https://github.com/mbedmicro/mbed/commit/e7144f83a8d75df80c4877936b6ffe552b0be9e6/



More API implementation for SAMR21

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 579:53297373a894 1 #ifndef _SAMD21_MTB_INSTANCE_
mbed_official 579:53297373a894 2 #define _SAMD21_MTB_INSTANCE_
mbed_official 579:53297373a894 3
mbed_official 579:53297373a894 4 /* ========== Register definition for MTB peripheral ========== */
mbed_official 579:53297373a894 5 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
mbed_official 579:53297373a894 6 #define REG_MTB_POSITION (0x41006000U) /**< \brief (MTB) MTB Position */
mbed_official 579:53297373a894 7 #define REG_MTB_MASTER (0x41006004U) /**< \brief (MTB) MTB Master */
mbed_official 579:53297373a894 8 #define REG_MTB_FLOW (0x41006008U) /**< \brief (MTB) MTB Flow */
mbed_official 579:53297373a894 9 #define REG_MTB_BASE (0x4100600CU) /**< \brief (MTB) MTB Base */
mbed_official 579:53297373a894 10 #define REG_MTB_ITCTRL (0x41006F00U) /**< \brief (MTB) MTB Integration Mode Control */
mbed_official 579:53297373a894 11 #define REG_MTB_CLAIMSET (0x41006FA0U) /**< \brief (MTB) MTB Claim Set */
mbed_official 579:53297373a894 12 #define REG_MTB_CLAIMCLR (0x41006FA4U) /**< \brief (MTB) MTB Claim Clear */
mbed_official 579:53297373a894 13 #define REG_MTB_LOCKACCESS (0x41006FB0U) /**< \brief (MTB) MTB Lock Access */
mbed_official 579:53297373a894 14 #define REG_MTB_LOCKSTATUS (0x41006FB4U) /**< \brief (MTB) MTB Lock Status */
mbed_official 579:53297373a894 15 #define REG_MTB_AUTHSTATUS (0x41006FB8U) /**< \brief (MTB) MTB Authentication Status */
mbed_official 579:53297373a894 16 #define REG_MTB_DEVARCH (0x41006FBCU) /**< \brief (MTB) MTB Device Architecture */
mbed_official 579:53297373a894 17 #define REG_MTB_DEVID (0x41006FC8U) /**< \brief (MTB) MTB Device Configuration */
mbed_official 579:53297373a894 18 #define REG_MTB_DEVTYPE (0x41006FCCU) /**< \brief (MTB) MTB Device Type */
mbed_official 579:53297373a894 19 #define REG_MTB_PID4 (0x41006FD0U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 20 #define REG_MTB_PID5 (0x41006FD4U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 21 #define REG_MTB_PID6 (0x41006FD8U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 22 #define REG_MTB_PID7 (0x41006FDCU) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 23 #define REG_MTB_PID0 (0x41006FE0U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 24 #define REG_MTB_PID1 (0x41006FE4U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 25 #define REG_MTB_PID2 (0x41006FE8U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 26 #define REG_MTB_PID3 (0x41006FECU) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 27 #define REG_MTB_CID0 (0x41006FF0U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 28 #define REG_MTB_CID1 (0x41006FF4U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 29 #define REG_MTB_CID2 (0x41006FF8U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 30 #define REG_MTB_CID3 (0x41006FFCU) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 31 #else
mbed_official 579:53297373a894 32 #define REG_MTB_POSITION (*(RwReg *)0x41006000U) /**< \brief (MTB) MTB Position */
mbed_official 579:53297373a894 33 #define REG_MTB_MASTER (*(RwReg *)0x41006004U) /**< \brief (MTB) MTB Master */
mbed_official 579:53297373a894 34 #define REG_MTB_FLOW (*(RwReg *)0x41006008U) /**< \brief (MTB) MTB Flow */
mbed_official 579:53297373a894 35 #define REG_MTB_BASE (*(RoReg *)0x4100600CU) /**< \brief (MTB) MTB Base */
mbed_official 579:53297373a894 36 #define REG_MTB_ITCTRL (*(RwReg *)0x41006F00U) /**< \brief (MTB) MTB Integration Mode Control */
mbed_official 579:53297373a894 37 #define REG_MTB_CLAIMSET (*(RwReg *)0x41006FA0U) /**< \brief (MTB) MTB Claim Set */
mbed_official 579:53297373a894 38 #define REG_MTB_CLAIMCLR (*(RwReg *)0x41006FA4U) /**< \brief (MTB) MTB Claim Clear */
mbed_official 579:53297373a894 39 #define REG_MTB_LOCKACCESS (*(RwReg *)0x41006FB0U) /**< \brief (MTB) MTB Lock Access */
mbed_official 579:53297373a894 40 #define REG_MTB_LOCKSTATUS (*(RoReg *)0x41006FB4U) /**< \brief (MTB) MTB Lock Status */
mbed_official 579:53297373a894 41 #define REG_MTB_AUTHSTATUS (*(RoReg *)0x41006FB8U) /**< \brief (MTB) MTB Authentication Status */
mbed_official 579:53297373a894 42 #define REG_MTB_DEVARCH (*(RoReg *)0x41006FBCU) /**< \brief (MTB) MTB Device Architecture */
mbed_official 579:53297373a894 43 #define REG_MTB_DEVID (*(RoReg *)0x41006FC8U) /**< \brief (MTB) MTB Device Configuration */
mbed_official 579:53297373a894 44 #define REG_MTB_DEVTYPE (*(RoReg *)0x41006FCCU) /**< \brief (MTB) MTB Device Type */
mbed_official 579:53297373a894 45 #define REG_MTB_PID4 (*(RoReg *)0x41006FD0U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 46 #define REG_MTB_PID5 (*(RoReg *)0x41006FD4U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 47 #define REG_MTB_PID6 (*(RoReg *)0x41006FD8U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 48 #define REG_MTB_PID7 (*(RoReg *)0x41006FDCU) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 49 #define REG_MTB_PID0 (*(RoReg *)0x41006FE0U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 50 #define REG_MTB_PID1 (*(RoReg *)0x41006FE4U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 51 #define REG_MTB_PID2 (*(RoReg *)0x41006FE8U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 52 #define REG_MTB_PID3 (*(RoReg *)0x41006FECU) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 53 #define REG_MTB_CID0 (*(RoReg *)0x41006FF0U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 54 #define REG_MTB_CID1 (*(RoReg *)0x41006FF4U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 55 #define REG_MTB_CID2 (*(RoReg *)0x41006FF8U) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 56 #define REG_MTB_CID3 (*(RoReg *)0x41006FFCU) /**< \brief (MTB) CoreSight */
mbed_official 579:53297373a894 57 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
mbed_official 579:53297373a894 58
mbed_official 579:53297373a894 59
mbed_official 579:53297373a894 60 #endif /* _SAMD21_MTB_INSTANCE_ */