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targets/cmsis/TARGET_Atmel/TARGET_SAM21/utils/cmsis/samd21/include/component/comp_rfctrl.h@592:a274ee790e56, 2015-07-17 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Jul 17 09:15:10 2015 +0100
- Revision:
- 592:a274ee790e56
- Parent:
- 579:53297373a894
Synchronized with git revision e7144f83a8d75df80c4877936b6ffe552b0be9e6
Full URL: https://github.com/mbedmicro/mbed/commit/e7144f83a8d75df80c4877936b6ffe552b0be9e6/
More API implementation for SAMR21
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 579:53297373a894 | 1 | #ifndef _SAMR21_RFCTRL_COMPONENT_ |
mbed_official | 579:53297373a894 | 2 | #define _SAMR21_RFCTRL_COMPONENT_ |
mbed_official | 579:53297373a894 | 3 | |
mbed_official | 579:53297373a894 | 4 | /* ========================================================================== */ |
mbed_official | 579:53297373a894 | 5 | /** SOFTWARE API DEFINITION FOR RFCTRL */ |
mbed_official | 579:53297373a894 | 6 | /* ========================================================================== */ |
mbed_official | 579:53297373a894 | 7 | /** \addtogroup SAMR21_RFCTRL RF233 control module */ |
mbed_official | 579:53297373a894 | 8 | /*@{*/ |
mbed_official | 579:53297373a894 | 9 | |
mbed_official | 579:53297373a894 | 10 | #define RFCTRL_U2233 |
mbed_official | 579:53297373a894 | 11 | #define REV_RFCTRL 0x100 |
mbed_official | 579:53297373a894 | 12 | |
mbed_official | 579:53297373a894 | 13 | /* -------- RFCTRL_FECFG : (RFCTRL Offset: 0x0) (R/W 16) Front-end control bus configuration -------- */ |
mbed_official | 579:53297373a894 | 14 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
mbed_official | 579:53297373a894 | 15 | typedef union { |
mbed_official | 579:53297373a894 | 16 | struct { |
mbed_official | 579:53297373a894 | 17 | uint16_t F0CFG:2; /*!< bit: 0.. 1 Front-end control signal 0 configuration */ |
mbed_official | 579:53297373a894 | 18 | uint16_t F1CFG:2; /*!< bit: 2.. 3 Front-end control signal 1 configuration */ |
mbed_official | 579:53297373a894 | 19 | uint16_t F2CFG:2; /*!< bit: 4.. 5 Front-end control signal 2 configuration */ |
mbed_official | 579:53297373a894 | 20 | uint16_t F3CFG:2; /*!< bit: 6.. 7 Front-end control signal 3 configuration */ |
mbed_official | 579:53297373a894 | 21 | uint16_t F4CFG:2; /*!< bit: 8.. 9 Front-end control signal 4 configuration */ |
mbed_official | 579:53297373a894 | 22 | uint16_t F5CFG:2; /*!< bit: 10..11 Front-end control signal 5 configuration */ |
mbed_official | 579:53297373a894 | 23 | uint16_t :4; /*!< bit: 12..15 Reserved */ |
mbed_official | 579:53297373a894 | 24 | } bit; /*!< Structure used for bit access */ |
mbed_official | 579:53297373a894 | 25 | uint16_t reg; /*!< Type used for register access */ |
mbed_official | 579:53297373a894 | 26 | } RFCTRL_FECFG_Type; |
mbed_official | 579:53297373a894 | 27 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
mbed_official | 579:53297373a894 | 28 | |
mbed_official | 579:53297373a894 | 29 | #define RFCTRL_FECFG_OFFSET 0x0 /**< \brief (RFCTRL_FECFG offset) Front-end control bus configuration */ |
mbed_official | 579:53297373a894 | 30 | #define RFCTRL_FECFG_RESETVALUE 0x0000ul /**< \brief (RFCTRL_FECFG reset_value) Front-end control bus configuration */ |
mbed_official | 579:53297373a894 | 31 | |
mbed_official | 579:53297373a894 | 32 | #define RFCTRL_FECFG_F0CFG_Pos 0 /**< \brief (RFCTRL_FECFG) Front-end control signal 0 configuration */ |
mbed_official | 579:53297373a894 | 33 | #define RFCTRL_FECFG_F0CFG_Msk (0x3ul << RFCTRL_FECFG_F0CFG_Pos) |
mbed_official | 579:53297373a894 | 34 | #define RFCTRL_FECFG_F0CFG(value) ((RFCTRL_FECFG_F0CFG_Msk & ((value) << RFCTRL_FECFG_F0CFG_Pos))) |
mbed_official | 579:53297373a894 | 35 | #define RFCTRL_FECFG_F1CFG_Pos 2 /**< \brief (RFCTRL_FECFG) Front-end control signal 1 configuration */ |
mbed_official | 579:53297373a894 | 36 | #define RFCTRL_FECFG_F1CFG_Msk (0x3ul << RFCTRL_FECFG_F1CFG_Pos) |
mbed_official | 579:53297373a894 | 37 | #define RFCTRL_FECFG_F1CFG(value) ((RFCTRL_FECFG_F1CFG_Msk & ((value) << RFCTRL_FECFG_F1CFG_Pos))) |
mbed_official | 579:53297373a894 | 38 | #define RFCTRL_FECFG_F2CFG_Pos 4 /**< \brief (RFCTRL_FECFG) Front-end control signal 2 configuration */ |
mbed_official | 579:53297373a894 | 39 | #define RFCTRL_FECFG_F2CFG_Msk (0x3ul << RFCTRL_FECFG_F2CFG_Pos) |
mbed_official | 579:53297373a894 | 40 | #define RFCTRL_FECFG_F2CFG(value) ((RFCTRL_FECFG_F2CFG_Msk & ((value) << RFCTRL_FECFG_F2CFG_Pos))) |
mbed_official | 579:53297373a894 | 41 | #define RFCTRL_FECFG_F3CFG_Pos 6 /**< \brief (RFCTRL_FECFG) Front-end control signal 3 configuration */ |
mbed_official | 579:53297373a894 | 42 | #define RFCTRL_FECFG_F3CFG_Msk (0x3ul << RFCTRL_FECFG_F3CFG_Pos) |
mbed_official | 579:53297373a894 | 43 | #define RFCTRL_FECFG_F3CFG(value) ((RFCTRL_FECFG_F3CFG_Msk & ((value) << RFCTRL_FECFG_F3CFG_Pos))) |
mbed_official | 579:53297373a894 | 44 | #define RFCTRL_FECFG_F4CFG_Pos 8 /**< \brief (RFCTRL_FECFG) Front-end control signal 4 configuration */ |
mbed_official | 579:53297373a894 | 45 | #define RFCTRL_FECFG_F4CFG_Msk (0x3ul << RFCTRL_FECFG_F4CFG_Pos) |
mbed_official | 579:53297373a894 | 46 | #define RFCTRL_FECFG_F4CFG(value) ((RFCTRL_FECFG_F4CFG_Msk & ((value) << RFCTRL_FECFG_F4CFG_Pos))) |
mbed_official | 579:53297373a894 | 47 | #define RFCTRL_FECFG_F5CFG_Pos 10 /**< \brief (RFCTRL_FECFG) Front-end control signal 5 configuration */ |
mbed_official | 579:53297373a894 | 48 | #define RFCTRL_FECFG_F5CFG_Msk (0x3ul << RFCTRL_FECFG_F5CFG_Pos) |
mbed_official | 579:53297373a894 | 49 | #define RFCTRL_FECFG_F5CFG(value) ((RFCTRL_FECFG_F5CFG_Msk & ((value) << RFCTRL_FECFG_F5CFG_Pos))) |
mbed_official | 579:53297373a894 | 50 | #define RFCTRL_FECFG_MASK 0x0FFFul /**< \brief (RFCTRL_FECFG) MASK Register */ |
mbed_official | 579:53297373a894 | 51 | |
mbed_official | 579:53297373a894 | 52 | /** \brief RFCTRL hardware registers */ |
mbed_official | 579:53297373a894 | 53 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
mbed_official | 579:53297373a894 | 54 | typedef struct { |
mbed_official | 579:53297373a894 | 55 | __IO RFCTRL_FECFG_Type FECFG; /**< \brief Offset: 0x0 (R/W 16) Front-end control bus configuration */ |
mbed_official | 579:53297373a894 | 56 | } Rfctrl; |
mbed_official | 579:53297373a894 | 57 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
mbed_official | 579:53297373a894 | 58 | |
mbed_official | 579:53297373a894 | 59 | /*@}*/ |
mbed_official | 579:53297373a894 | 60 | |
mbed_official | 579:53297373a894 | 61 | #endif /* _SAMR21_RFCTRL_COMPONENT_ */ |