mbed library sources

Fork of mbed-src by mbed official

Committer:
mbed_official
Date:
Fri Jul 17 09:15:10 2015 +0100
Revision:
592:a274ee790e56
Parent:
579:53297373a894
Synchronized with git revision e7144f83a8d75df80c4877936b6ffe552b0be9e6

Full URL: https://github.com/mbedmicro/mbed/commit/e7144f83a8d75df80c4877936b6ffe552b0be9e6/

More API implementation for SAMR21

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 579:53297373a894 1 #ifndef _SAMD21_AC_COMPONENT_
mbed_official 579:53297373a894 2 #define _SAMD21_AC_COMPONENT_
mbed_official 579:53297373a894 3
mbed_official 579:53297373a894 4 /* ========================================================================== */
mbed_official 579:53297373a894 5 /** SOFTWARE API DEFINITION FOR AC */
mbed_official 579:53297373a894 6 /* ========================================================================== */
mbed_official 579:53297373a894 7 /** \addtogroup SAMD21_AC Analog Comparators */
mbed_official 579:53297373a894 8 /*@{*/
mbed_official 579:53297373a894 9
mbed_official 579:53297373a894 10 #define AC_U2205
mbed_official 579:53297373a894 11 #define REV_AC 0x111
mbed_official 579:53297373a894 12
mbed_official 579:53297373a894 13 /* -------- AC_CTRLA : (AC Offset: 0x00) (R/W 8) Control A -------- */
mbed_official 579:53297373a894 14 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
mbed_official 579:53297373a894 15 typedef union {
mbed_official 579:53297373a894 16 struct {
mbed_official 579:53297373a894 17 uint8_t SWRST:1; /*!< bit: 0 Software Reset */
mbed_official 579:53297373a894 18 uint8_t ENABLE:1; /*!< bit: 1 Enable */
mbed_official 579:53297373a894 19 uint8_t RUNSTDBY:1; /*!< bit: 2 Run in Standby */
mbed_official 579:53297373a894 20 uint8_t :4; /*!< bit: 3.. 6 Reserved */
mbed_official 579:53297373a894 21 uint8_t LPMUX:1; /*!< bit: 7 Low-Power Mux */
mbed_official 579:53297373a894 22 } bit; /*!< Structure used for bit access */
mbed_official 579:53297373a894 23 uint8_t reg; /*!< Type used for register access */
mbed_official 579:53297373a894 24 } AC_CTRLA_Type;
mbed_official 579:53297373a894 25 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
mbed_official 579:53297373a894 26
mbed_official 579:53297373a894 27 #define AC_CTRLA_OFFSET 0x00 /**< \brief (AC_CTRLA offset) Control A */
mbed_official 579:53297373a894 28 #define AC_CTRLA_RESETVALUE 0x00ul /**< \brief (AC_CTRLA reset_value) Control A */
mbed_official 579:53297373a894 29
mbed_official 579:53297373a894 30 #define AC_CTRLA_SWRST_Pos 0 /**< \brief (AC_CTRLA) Software Reset */
mbed_official 579:53297373a894 31 #define AC_CTRLA_SWRST (0x1ul << AC_CTRLA_SWRST_Pos)
mbed_official 579:53297373a894 32 #define AC_CTRLA_ENABLE_Pos 1 /**< \brief (AC_CTRLA) Enable */
mbed_official 579:53297373a894 33 #define AC_CTRLA_ENABLE (0x1ul << AC_CTRLA_ENABLE_Pos)
mbed_official 579:53297373a894 34 #define AC_CTRLA_RUNSTDBY_Pos 2 /**< \brief (AC_CTRLA) Run in Standby */
mbed_official 579:53297373a894 35 #define AC_CTRLA_RUNSTDBY_Msk (0x1ul << AC_CTRLA_RUNSTDBY_Pos)
mbed_official 579:53297373a894 36 #define AC_CTRLA_RUNSTDBY(value) ((AC_CTRLA_RUNSTDBY_Msk & ((value) << AC_CTRLA_RUNSTDBY_Pos)))
mbed_official 579:53297373a894 37 #define AC_CTRLA_LPMUX_Pos 7 /**< \brief (AC_CTRLA) Low-Power Mux */
mbed_official 579:53297373a894 38 #define AC_CTRLA_LPMUX (0x1ul << AC_CTRLA_LPMUX_Pos)
mbed_official 579:53297373a894 39 #define AC_CTRLA_MASK 0x87ul /**< \brief (AC_CTRLA) MASK Register */
mbed_official 579:53297373a894 40
mbed_official 579:53297373a894 41 /* -------- AC_CTRLB : (AC Offset: 0x01) ( /W 8) Control B -------- */
mbed_official 579:53297373a894 42 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
mbed_official 579:53297373a894 43 typedef union {
mbed_official 579:53297373a894 44 struct {
mbed_official 579:53297373a894 45 uint8_t START0:1; /*!< bit: 0 Comparator 0 Start Comparison */
mbed_official 579:53297373a894 46 uint8_t START1:1; /*!< bit: 1 Comparator 1 Start Comparison */
mbed_official 579:53297373a894 47 uint8_t :6; /*!< bit: 2.. 7 Reserved */
mbed_official 579:53297373a894 48 } bit; /*!< Structure used for bit access */
mbed_official 579:53297373a894 49 struct {
mbed_official 579:53297373a894 50 uint8_t START:2; /*!< bit: 0.. 1 Comparator x Start Comparison */
mbed_official 579:53297373a894 51 uint8_t :6; /*!< bit: 2.. 7 Reserved */
mbed_official 579:53297373a894 52 } vec; /*!< Structure used for vec access */
mbed_official 579:53297373a894 53 uint8_t reg; /*!< Type used for register access */
mbed_official 579:53297373a894 54 } AC_CTRLB_Type;
mbed_official 579:53297373a894 55 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
mbed_official 579:53297373a894 56
mbed_official 579:53297373a894 57 #define AC_CTRLB_OFFSET 0x01 /**< \brief (AC_CTRLB offset) Control B */
mbed_official 579:53297373a894 58 #define AC_CTRLB_RESETVALUE 0x00ul /**< \brief (AC_CTRLB reset_value) Control B */
mbed_official 579:53297373a894 59
mbed_official 579:53297373a894 60 #define AC_CTRLB_START0_Pos 0 /**< \brief (AC_CTRLB) Comparator 0 Start Comparison */
mbed_official 579:53297373a894 61 #define AC_CTRLB_START0 (1 << AC_CTRLB_START0_Pos)
mbed_official 579:53297373a894 62 #define AC_CTRLB_START1_Pos 1 /**< \brief (AC_CTRLB) Comparator 1 Start Comparison */
mbed_official 579:53297373a894 63 #define AC_CTRLB_START1 (1 << AC_CTRLB_START1_Pos)
mbed_official 579:53297373a894 64 #define AC_CTRLB_START_Pos 0 /**< \brief (AC_CTRLB) Comparator x Start Comparison */
mbed_official 579:53297373a894 65 #define AC_CTRLB_START_Msk (0x3ul << AC_CTRLB_START_Pos)
mbed_official 579:53297373a894 66 #define AC_CTRLB_START(value) ((AC_CTRLB_START_Msk & ((value) << AC_CTRLB_START_Pos)))
mbed_official 579:53297373a894 67 #define AC_CTRLB_MASK 0x03ul /**< \brief (AC_CTRLB) MASK Register */
mbed_official 579:53297373a894 68
mbed_official 579:53297373a894 69 /* -------- AC_EVCTRL : (AC Offset: 0x02) (R/W 16) Event Control -------- */
mbed_official 579:53297373a894 70 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
mbed_official 579:53297373a894 71 typedef union {
mbed_official 579:53297373a894 72 struct {
mbed_official 579:53297373a894 73 uint16_t COMPEO0:1; /*!< bit: 0 Comparator 0 Event Output Enable */
mbed_official 579:53297373a894 74 uint16_t COMPEO1:1; /*!< bit: 1 Comparator 1 Event Output Enable */
mbed_official 579:53297373a894 75 uint16_t :2; /*!< bit: 2.. 3 Reserved */
mbed_official 579:53297373a894 76 uint16_t WINEO0:1; /*!< bit: 4 Window 0 Event Output Enable */
mbed_official 579:53297373a894 77 uint16_t :3; /*!< bit: 5.. 7 Reserved */
mbed_official 579:53297373a894 78 uint16_t COMPEI0:1; /*!< bit: 8 Comparator 0 Event Input */
mbed_official 579:53297373a894 79 uint16_t COMPEI1:1; /*!< bit: 9 Comparator 1 Event Input */
mbed_official 579:53297373a894 80 uint16_t :6; /*!< bit: 10..15 Reserved */
mbed_official 579:53297373a894 81 } bit; /*!< Structure used for bit access */
mbed_official 579:53297373a894 82 struct {
mbed_official 579:53297373a894 83 uint16_t COMPEO:2; /*!< bit: 0.. 1 Comparator x Event Output Enable */
mbed_official 579:53297373a894 84 uint16_t :2; /*!< bit: 2.. 3 Reserved */
mbed_official 579:53297373a894 85 uint16_t WINEO:1; /*!< bit: 4 Window x Event Output Enable */
mbed_official 579:53297373a894 86 uint16_t :3; /*!< bit: 5.. 7 Reserved */
mbed_official 579:53297373a894 87 uint16_t COMPEI:2; /*!< bit: 8.. 9 Comparator x Event Input */
mbed_official 579:53297373a894 88 uint16_t :6; /*!< bit: 10..15 Reserved */
mbed_official 579:53297373a894 89 } vec; /*!< Structure used for vec access */
mbed_official 579:53297373a894 90 uint16_t reg; /*!< Type used for register access */
mbed_official 579:53297373a894 91 } AC_EVCTRL_Type;
mbed_official 579:53297373a894 92 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
mbed_official 579:53297373a894 93
mbed_official 579:53297373a894 94 #define AC_EVCTRL_OFFSET 0x02 /**< \brief (AC_EVCTRL offset) Event Control */
mbed_official 579:53297373a894 95 #define AC_EVCTRL_RESETVALUE 0x0000ul /**< \brief (AC_EVCTRL reset_value) Event Control */
mbed_official 579:53297373a894 96
mbed_official 579:53297373a894 97 #define AC_EVCTRL_COMPEO0_Pos 0 /**< \brief (AC_EVCTRL) Comparator 0 Event Output Enable */
mbed_official 579:53297373a894 98 #define AC_EVCTRL_COMPEO0 (1 << AC_EVCTRL_COMPEO0_Pos)
mbed_official 579:53297373a894 99 #define AC_EVCTRL_COMPEO1_Pos 1 /**< \brief (AC_EVCTRL) Comparator 1 Event Output Enable */
mbed_official 579:53297373a894 100 #define AC_EVCTRL_COMPEO1 (1 << AC_EVCTRL_COMPEO1_Pos)
mbed_official 579:53297373a894 101 #define AC_EVCTRL_COMPEO_Pos 0 /**< \brief (AC_EVCTRL) Comparator x Event Output Enable */
mbed_official 579:53297373a894 102 #define AC_EVCTRL_COMPEO_Msk (0x3ul << AC_EVCTRL_COMPEO_Pos)
mbed_official 579:53297373a894 103 #define AC_EVCTRL_COMPEO(value) ((AC_EVCTRL_COMPEO_Msk & ((value) << AC_EVCTRL_COMPEO_Pos)))
mbed_official 579:53297373a894 104 #define AC_EVCTRL_WINEO0_Pos 4 /**< \brief (AC_EVCTRL) Window 0 Event Output Enable */
mbed_official 579:53297373a894 105 #define AC_EVCTRL_WINEO0 (1 << AC_EVCTRL_WINEO0_Pos)
mbed_official 579:53297373a894 106 #define AC_EVCTRL_WINEO_Pos 4 /**< \brief (AC_EVCTRL) Window x Event Output Enable */
mbed_official 579:53297373a894 107 #define AC_EVCTRL_WINEO_Msk (0x1ul << AC_EVCTRL_WINEO_Pos)
mbed_official 579:53297373a894 108 #define AC_EVCTRL_WINEO(value) ((AC_EVCTRL_WINEO_Msk & ((value) << AC_EVCTRL_WINEO_Pos)))
mbed_official 579:53297373a894 109 #define AC_EVCTRL_COMPEI0_Pos 8 /**< \brief (AC_EVCTRL) Comparator 0 Event Input */
mbed_official 579:53297373a894 110 #define AC_EVCTRL_COMPEI0 (1 << AC_EVCTRL_COMPEI0_Pos)
mbed_official 579:53297373a894 111 #define AC_EVCTRL_COMPEI1_Pos 9 /**< \brief (AC_EVCTRL) Comparator 1 Event Input */
mbed_official 579:53297373a894 112 #define AC_EVCTRL_COMPEI1 (1 << AC_EVCTRL_COMPEI1_Pos)
mbed_official 579:53297373a894 113 #define AC_EVCTRL_COMPEI_Pos 8 /**< \brief (AC_EVCTRL) Comparator x Event Input */
mbed_official 579:53297373a894 114 #define AC_EVCTRL_COMPEI_Msk (0x3ul << AC_EVCTRL_COMPEI_Pos)
mbed_official 579:53297373a894 115 #define AC_EVCTRL_COMPEI(value) ((AC_EVCTRL_COMPEI_Msk & ((value) << AC_EVCTRL_COMPEI_Pos)))
mbed_official 579:53297373a894 116 #define AC_EVCTRL_MASK 0x0313ul /**< \brief (AC_EVCTRL) MASK Register */
mbed_official 579:53297373a894 117
mbed_official 579:53297373a894 118 /* -------- AC_INTENCLR : (AC Offset: 0x04) (R/W 8) Interrupt Enable Clear -------- */
mbed_official 579:53297373a894 119 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
mbed_official 579:53297373a894 120 typedef union {
mbed_official 579:53297373a894 121 struct {
mbed_official 579:53297373a894 122 uint8_t COMP0:1; /*!< bit: 0 Comparator 0 Interrupt Enable */
mbed_official 579:53297373a894 123 uint8_t COMP1:1; /*!< bit: 1 Comparator 1 Interrupt Enable */
mbed_official 579:53297373a894 124 uint8_t :2; /*!< bit: 2.. 3 Reserved */
mbed_official 579:53297373a894 125 uint8_t WIN0:1; /*!< bit: 4 Window 0 Interrupt Enable */
mbed_official 579:53297373a894 126 uint8_t :3; /*!< bit: 5.. 7 Reserved */
mbed_official 579:53297373a894 127 } bit; /*!< Structure used for bit access */
mbed_official 579:53297373a894 128 struct {
mbed_official 579:53297373a894 129 uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x Interrupt Enable */
mbed_official 579:53297373a894 130 uint8_t :2; /*!< bit: 2.. 3 Reserved */
mbed_official 579:53297373a894 131 uint8_t WIN:1; /*!< bit: 4 Window x Interrupt Enable */
mbed_official 579:53297373a894 132 uint8_t :3; /*!< bit: 5.. 7 Reserved */
mbed_official 579:53297373a894 133 } vec; /*!< Structure used for vec access */
mbed_official 579:53297373a894 134 uint8_t reg; /*!< Type used for register access */
mbed_official 579:53297373a894 135 } AC_INTENCLR_Type;
mbed_official 579:53297373a894 136 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
mbed_official 579:53297373a894 137
mbed_official 579:53297373a894 138 #define AC_INTENCLR_OFFSET 0x04 /**< \brief (AC_INTENCLR offset) Interrupt Enable Clear */
mbed_official 579:53297373a894 139 #define AC_INTENCLR_RESETVALUE 0x00ul /**< \brief (AC_INTENCLR reset_value) Interrupt Enable Clear */
mbed_official 579:53297373a894 140
mbed_official 579:53297373a894 141 #define AC_INTENCLR_COMP0_Pos 0 /**< \brief (AC_INTENCLR) Comparator 0 Interrupt Enable */
mbed_official 579:53297373a894 142 #define AC_INTENCLR_COMP0 (1 << AC_INTENCLR_COMP0_Pos)
mbed_official 579:53297373a894 143 #define AC_INTENCLR_COMP1_Pos 1 /**< \brief (AC_INTENCLR) Comparator 1 Interrupt Enable */
mbed_official 579:53297373a894 144 #define AC_INTENCLR_COMP1 (1 << AC_INTENCLR_COMP1_Pos)
mbed_official 579:53297373a894 145 #define AC_INTENCLR_COMP_Pos 0 /**< \brief (AC_INTENCLR) Comparator x Interrupt Enable */
mbed_official 579:53297373a894 146 #define AC_INTENCLR_COMP_Msk (0x3ul << AC_INTENCLR_COMP_Pos)
mbed_official 579:53297373a894 147 #define AC_INTENCLR_COMP(value) ((AC_INTENCLR_COMP_Msk & ((value) << AC_INTENCLR_COMP_Pos)))
mbed_official 579:53297373a894 148 #define AC_INTENCLR_WIN0_Pos 4 /**< \brief (AC_INTENCLR) Window 0 Interrupt Enable */
mbed_official 579:53297373a894 149 #define AC_INTENCLR_WIN0 (1 << AC_INTENCLR_WIN0_Pos)
mbed_official 579:53297373a894 150 #define AC_INTENCLR_WIN_Pos 4 /**< \brief (AC_INTENCLR) Window x Interrupt Enable */
mbed_official 579:53297373a894 151 #define AC_INTENCLR_WIN_Msk (0x1ul << AC_INTENCLR_WIN_Pos)
mbed_official 579:53297373a894 152 #define AC_INTENCLR_WIN(value) ((AC_INTENCLR_WIN_Msk & ((value) << AC_INTENCLR_WIN_Pos)))
mbed_official 579:53297373a894 153 #define AC_INTENCLR_MASK 0x13ul /**< \brief (AC_INTENCLR) MASK Register */
mbed_official 579:53297373a894 154
mbed_official 579:53297373a894 155 /* -------- AC_INTENSET : (AC Offset: 0x05) (R/W 8) Interrupt Enable Set -------- */
mbed_official 579:53297373a894 156 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
mbed_official 579:53297373a894 157 typedef union {
mbed_official 579:53297373a894 158 struct {
mbed_official 579:53297373a894 159 uint8_t COMP0:1; /*!< bit: 0 Comparator 0 Interrupt Enable */
mbed_official 579:53297373a894 160 uint8_t COMP1:1; /*!< bit: 1 Comparator 1 Interrupt Enable */
mbed_official 579:53297373a894 161 uint8_t :2; /*!< bit: 2.. 3 Reserved */
mbed_official 579:53297373a894 162 uint8_t WIN0:1; /*!< bit: 4 Window 0 Interrupt Enable */
mbed_official 579:53297373a894 163 uint8_t :3; /*!< bit: 5.. 7 Reserved */
mbed_official 579:53297373a894 164 } bit; /*!< Structure used for bit access */
mbed_official 579:53297373a894 165 struct {
mbed_official 579:53297373a894 166 uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x Interrupt Enable */
mbed_official 579:53297373a894 167 uint8_t :2; /*!< bit: 2.. 3 Reserved */
mbed_official 579:53297373a894 168 uint8_t WIN:1; /*!< bit: 4 Window x Interrupt Enable */
mbed_official 579:53297373a894 169 uint8_t :3; /*!< bit: 5.. 7 Reserved */
mbed_official 579:53297373a894 170 } vec; /*!< Structure used for vec access */
mbed_official 579:53297373a894 171 uint8_t reg; /*!< Type used for register access */
mbed_official 579:53297373a894 172 } AC_INTENSET_Type;
mbed_official 579:53297373a894 173 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
mbed_official 579:53297373a894 174
mbed_official 579:53297373a894 175 #define AC_INTENSET_OFFSET 0x05 /**< \brief (AC_INTENSET offset) Interrupt Enable Set */
mbed_official 579:53297373a894 176 #define AC_INTENSET_RESETVALUE 0x00ul /**< \brief (AC_INTENSET reset_value) Interrupt Enable Set */
mbed_official 579:53297373a894 177
mbed_official 579:53297373a894 178 #define AC_INTENSET_COMP0_Pos 0 /**< \brief (AC_INTENSET) Comparator 0 Interrupt Enable */
mbed_official 579:53297373a894 179 #define AC_INTENSET_COMP0 (1 << AC_INTENSET_COMP0_Pos)
mbed_official 579:53297373a894 180 #define AC_INTENSET_COMP1_Pos 1 /**< \brief (AC_INTENSET) Comparator 1 Interrupt Enable */
mbed_official 579:53297373a894 181 #define AC_INTENSET_COMP1 (1 << AC_INTENSET_COMP1_Pos)
mbed_official 579:53297373a894 182 #define AC_INTENSET_COMP_Pos 0 /**< \brief (AC_INTENSET) Comparator x Interrupt Enable */
mbed_official 579:53297373a894 183 #define AC_INTENSET_COMP_Msk (0x3ul << AC_INTENSET_COMP_Pos)
mbed_official 579:53297373a894 184 #define AC_INTENSET_COMP(value) ((AC_INTENSET_COMP_Msk & ((value) << AC_INTENSET_COMP_Pos)))
mbed_official 579:53297373a894 185 #define AC_INTENSET_WIN0_Pos 4 /**< \brief (AC_INTENSET) Window 0 Interrupt Enable */
mbed_official 579:53297373a894 186 #define AC_INTENSET_WIN0 (1 << AC_INTENSET_WIN0_Pos)
mbed_official 579:53297373a894 187 #define AC_INTENSET_WIN_Pos 4 /**< \brief (AC_INTENSET) Window x Interrupt Enable */
mbed_official 579:53297373a894 188 #define AC_INTENSET_WIN_Msk (0x1ul << AC_INTENSET_WIN_Pos)
mbed_official 579:53297373a894 189 #define AC_INTENSET_WIN(value) ((AC_INTENSET_WIN_Msk & ((value) << AC_INTENSET_WIN_Pos)))
mbed_official 579:53297373a894 190 #define AC_INTENSET_MASK 0x13ul /**< \brief (AC_INTENSET) MASK Register */
mbed_official 579:53297373a894 191
mbed_official 579:53297373a894 192 /* -------- AC_INTFLAG : (AC Offset: 0x06) (R/W 8) Interrupt Flag Status and Clear -------- */
mbed_official 579:53297373a894 193 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
mbed_official 579:53297373a894 194 typedef union {
mbed_official 579:53297373a894 195 struct {
mbed_official 579:53297373a894 196 uint8_t COMP0:1; /*!< bit: 0 Comparator 0 */
mbed_official 579:53297373a894 197 uint8_t COMP1:1; /*!< bit: 1 Comparator 1 */
mbed_official 579:53297373a894 198 uint8_t :2; /*!< bit: 2.. 3 Reserved */
mbed_official 579:53297373a894 199 uint8_t WIN0:1; /*!< bit: 4 Window 0 */
mbed_official 579:53297373a894 200 uint8_t :3; /*!< bit: 5.. 7 Reserved */
mbed_official 579:53297373a894 201 } bit; /*!< Structure used for bit access */
mbed_official 579:53297373a894 202 struct {
mbed_official 579:53297373a894 203 uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x */
mbed_official 579:53297373a894 204 uint8_t :2; /*!< bit: 2.. 3 Reserved */
mbed_official 579:53297373a894 205 uint8_t WIN:1; /*!< bit: 4 Window x */
mbed_official 579:53297373a894 206 uint8_t :3; /*!< bit: 5.. 7 Reserved */
mbed_official 579:53297373a894 207 } vec; /*!< Structure used for vec access */
mbed_official 579:53297373a894 208 uint8_t reg; /*!< Type used for register access */
mbed_official 579:53297373a894 209 } AC_INTFLAG_Type;
mbed_official 579:53297373a894 210 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
mbed_official 579:53297373a894 211
mbed_official 579:53297373a894 212 #define AC_INTFLAG_OFFSET 0x06 /**< \brief (AC_INTFLAG offset) Interrupt Flag Status and Clear */
mbed_official 579:53297373a894 213 #define AC_INTFLAG_RESETVALUE 0x00ul /**< \brief (AC_INTFLAG reset_value) Interrupt Flag Status and Clear */
mbed_official 579:53297373a894 214
mbed_official 579:53297373a894 215 #define AC_INTFLAG_COMP0_Pos 0 /**< \brief (AC_INTFLAG) Comparator 0 */
mbed_official 579:53297373a894 216 #define AC_INTFLAG_COMP0 (1 << AC_INTFLAG_COMP0_Pos)
mbed_official 579:53297373a894 217 #define AC_INTFLAG_COMP1_Pos 1 /**< \brief (AC_INTFLAG) Comparator 1 */
mbed_official 579:53297373a894 218 #define AC_INTFLAG_COMP1 (1 << AC_INTFLAG_COMP1_Pos)
mbed_official 579:53297373a894 219 #define AC_INTFLAG_COMP_Pos 0 /**< \brief (AC_INTFLAG) Comparator x */
mbed_official 579:53297373a894 220 #define AC_INTFLAG_COMP_Msk (0x3ul << AC_INTFLAG_COMP_Pos)
mbed_official 579:53297373a894 221 #define AC_INTFLAG_COMP(value) ((AC_INTFLAG_COMP_Msk & ((value) << AC_INTFLAG_COMP_Pos)))
mbed_official 579:53297373a894 222 #define AC_INTFLAG_WIN0_Pos 4 /**< \brief (AC_INTFLAG) Window 0 */
mbed_official 579:53297373a894 223 #define AC_INTFLAG_WIN0 (1 << AC_INTFLAG_WIN0_Pos)
mbed_official 579:53297373a894 224 #define AC_INTFLAG_WIN_Pos 4 /**< \brief (AC_INTFLAG) Window x */
mbed_official 579:53297373a894 225 #define AC_INTFLAG_WIN_Msk (0x1ul << AC_INTFLAG_WIN_Pos)
mbed_official 579:53297373a894 226 #define AC_INTFLAG_WIN(value) ((AC_INTFLAG_WIN_Msk & ((value) << AC_INTFLAG_WIN_Pos)))
mbed_official 579:53297373a894 227 #define AC_INTFLAG_MASK 0x13ul /**< \brief (AC_INTFLAG) MASK Register */
mbed_official 579:53297373a894 228
mbed_official 579:53297373a894 229 /* -------- AC_STATUSA : (AC Offset: 0x08) (R/ 8) Status A -------- */
mbed_official 579:53297373a894 230 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
mbed_official 579:53297373a894 231 typedef union {
mbed_official 579:53297373a894 232 struct {
mbed_official 579:53297373a894 233 uint8_t STATE0:1; /*!< bit: 0 Comparator 0 Current State */
mbed_official 579:53297373a894 234 uint8_t STATE1:1; /*!< bit: 1 Comparator 1 Current State */
mbed_official 579:53297373a894 235 uint8_t :2; /*!< bit: 2.. 3 Reserved */
mbed_official 579:53297373a894 236 uint8_t WSTATE0:2; /*!< bit: 4.. 5 Window 0 Current State */
mbed_official 579:53297373a894 237 uint8_t :2; /*!< bit: 6.. 7 Reserved */
mbed_official 579:53297373a894 238 } bit; /*!< Structure used for bit access */
mbed_official 579:53297373a894 239 struct {
mbed_official 579:53297373a894 240 uint8_t STATE:2; /*!< bit: 0.. 1 Comparator x Current State */
mbed_official 579:53297373a894 241 uint8_t :6; /*!< bit: 2.. 7 Reserved */
mbed_official 579:53297373a894 242 } vec; /*!< Structure used for vec access */
mbed_official 579:53297373a894 243 uint8_t reg; /*!< Type used for register access */
mbed_official 579:53297373a894 244 } AC_STATUSA_Type;
mbed_official 579:53297373a894 245 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
mbed_official 579:53297373a894 246
mbed_official 579:53297373a894 247 #define AC_STATUSA_OFFSET 0x08 /**< \brief (AC_STATUSA offset) Status A */
mbed_official 579:53297373a894 248 #define AC_STATUSA_RESETVALUE 0x00ul /**< \brief (AC_STATUSA reset_value) Status A */
mbed_official 579:53297373a894 249
mbed_official 579:53297373a894 250 #define AC_STATUSA_STATE0_Pos 0 /**< \brief (AC_STATUSA) Comparator 0 Current State */
mbed_official 579:53297373a894 251 #define AC_STATUSA_STATE0 (1 << AC_STATUSA_STATE0_Pos)
mbed_official 579:53297373a894 252 #define AC_STATUSA_STATE1_Pos 1 /**< \brief (AC_STATUSA) Comparator 1 Current State */
mbed_official 579:53297373a894 253 #define AC_STATUSA_STATE1 (1 << AC_STATUSA_STATE1_Pos)
mbed_official 579:53297373a894 254 #define AC_STATUSA_STATE_Pos 0 /**< \brief (AC_STATUSA) Comparator x Current State */
mbed_official 579:53297373a894 255 #define AC_STATUSA_STATE_Msk (0x3ul << AC_STATUSA_STATE_Pos)
mbed_official 579:53297373a894 256 #define AC_STATUSA_STATE(value) ((AC_STATUSA_STATE_Msk & ((value) << AC_STATUSA_STATE_Pos)))
mbed_official 579:53297373a894 257 #define AC_STATUSA_WSTATE0_Pos 4 /**< \brief (AC_STATUSA) Window 0 Current State */
mbed_official 579:53297373a894 258 #define AC_STATUSA_WSTATE0_Msk (0x3ul << AC_STATUSA_WSTATE0_Pos)
mbed_official 579:53297373a894 259 #define AC_STATUSA_WSTATE0(value) ((AC_STATUSA_WSTATE0_Msk & ((value) << AC_STATUSA_WSTATE0_Pos)))
mbed_official 579:53297373a894 260 #define AC_STATUSA_WSTATE0_ABOVE_Val 0x0ul /**< \brief (AC_STATUSA) Signal is above window */
mbed_official 579:53297373a894 261 #define AC_STATUSA_WSTATE0_INSIDE_Val 0x1ul /**< \brief (AC_STATUSA) Signal is inside window */
mbed_official 579:53297373a894 262 #define AC_STATUSA_WSTATE0_BELOW_Val 0x2ul /**< \brief (AC_STATUSA) Signal is below window */
mbed_official 579:53297373a894 263 #define AC_STATUSA_WSTATE0_ABOVE (AC_STATUSA_WSTATE0_ABOVE_Val << AC_STATUSA_WSTATE0_Pos)
mbed_official 579:53297373a894 264 #define AC_STATUSA_WSTATE0_INSIDE (AC_STATUSA_WSTATE0_INSIDE_Val << AC_STATUSA_WSTATE0_Pos)
mbed_official 579:53297373a894 265 #define AC_STATUSA_WSTATE0_BELOW (AC_STATUSA_WSTATE0_BELOW_Val << AC_STATUSA_WSTATE0_Pos)
mbed_official 579:53297373a894 266 #define AC_STATUSA_MASK 0x33ul /**< \brief (AC_STATUSA) MASK Register */
mbed_official 579:53297373a894 267
mbed_official 579:53297373a894 268 /* -------- AC_STATUSB : (AC Offset: 0x09) (R/ 8) Status B -------- */
mbed_official 579:53297373a894 269 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
mbed_official 579:53297373a894 270 typedef union {
mbed_official 579:53297373a894 271 struct {
mbed_official 579:53297373a894 272 uint8_t READY0:1; /*!< bit: 0 Comparator 0 Ready */
mbed_official 579:53297373a894 273 uint8_t READY1:1; /*!< bit: 1 Comparator 1 Ready */
mbed_official 579:53297373a894 274 uint8_t :5; /*!< bit: 2.. 6 Reserved */
mbed_official 579:53297373a894 275 uint8_t SYNCBUSY:1; /*!< bit: 7 Synchronization Busy */
mbed_official 579:53297373a894 276 } bit; /*!< Structure used for bit access */
mbed_official 579:53297373a894 277 struct {
mbed_official 579:53297373a894 278 uint8_t READY:2; /*!< bit: 0.. 1 Comparator x Ready */
mbed_official 579:53297373a894 279 uint8_t :6; /*!< bit: 2.. 7 Reserved */
mbed_official 579:53297373a894 280 } vec; /*!< Structure used for vec access */
mbed_official 579:53297373a894 281 uint8_t reg; /*!< Type used for register access */
mbed_official 579:53297373a894 282 } AC_STATUSB_Type;
mbed_official 579:53297373a894 283 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
mbed_official 579:53297373a894 284
mbed_official 579:53297373a894 285 #define AC_STATUSB_OFFSET 0x09 /**< \brief (AC_STATUSB offset) Status B */
mbed_official 579:53297373a894 286 #define AC_STATUSB_RESETVALUE 0x00ul /**< \brief (AC_STATUSB reset_value) Status B */
mbed_official 579:53297373a894 287
mbed_official 579:53297373a894 288 #define AC_STATUSB_READY0_Pos 0 /**< \brief (AC_STATUSB) Comparator 0 Ready */
mbed_official 579:53297373a894 289 #define AC_STATUSB_READY0 (1 << AC_STATUSB_READY0_Pos)
mbed_official 579:53297373a894 290 #define AC_STATUSB_READY1_Pos 1 /**< \brief (AC_STATUSB) Comparator 1 Ready */
mbed_official 579:53297373a894 291 #define AC_STATUSB_READY1 (1 << AC_STATUSB_READY1_Pos)
mbed_official 579:53297373a894 292 #define AC_STATUSB_READY_Pos 0 /**< \brief (AC_STATUSB) Comparator x Ready */
mbed_official 579:53297373a894 293 #define AC_STATUSB_READY_Msk (0x3ul << AC_STATUSB_READY_Pos)
mbed_official 579:53297373a894 294 #define AC_STATUSB_READY(value) ((AC_STATUSB_READY_Msk & ((value) << AC_STATUSB_READY_Pos)))
mbed_official 579:53297373a894 295 #define AC_STATUSB_SYNCBUSY_Pos 7 /**< \brief (AC_STATUSB) Synchronization Busy */
mbed_official 579:53297373a894 296 #define AC_STATUSB_SYNCBUSY (0x1ul << AC_STATUSB_SYNCBUSY_Pos)
mbed_official 579:53297373a894 297 #define AC_STATUSB_MASK 0x83ul /**< \brief (AC_STATUSB) MASK Register */
mbed_official 579:53297373a894 298
mbed_official 579:53297373a894 299 /* -------- AC_STATUSC : (AC Offset: 0x0A) (R/ 8) Status C -------- */
mbed_official 579:53297373a894 300 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
mbed_official 579:53297373a894 301 typedef union {
mbed_official 579:53297373a894 302 struct {
mbed_official 579:53297373a894 303 uint8_t STATE0:1; /*!< bit: 0 Comparator 0 Current State */
mbed_official 579:53297373a894 304 uint8_t STATE1:1; /*!< bit: 1 Comparator 1 Current State */
mbed_official 579:53297373a894 305 uint8_t :2; /*!< bit: 2.. 3 Reserved */
mbed_official 579:53297373a894 306 uint8_t WSTATE0:2; /*!< bit: 4.. 5 Window 0 Current State */
mbed_official 579:53297373a894 307 uint8_t :2; /*!< bit: 6.. 7 Reserved */
mbed_official 579:53297373a894 308 } bit; /*!< Structure used for bit access */
mbed_official 579:53297373a894 309 struct {
mbed_official 579:53297373a894 310 uint8_t STATE:2; /*!< bit: 0.. 1 Comparator x Current State */
mbed_official 579:53297373a894 311 uint8_t :6; /*!< bit: 2.. 7 Reserved */
mbed_official 579:53297373a894 312 } vec; /*!< Structure used for vec access */
mbed_official 579:53297373a894 313 uint8_t reg; /*!< Type used for register access */
mbed_official 579:53297373a894 314 } AC_STATUSC_Type;
mbed_official 579:53297373a894 315 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
mbed_official 579:53297373a894 316
mbed_official 579:53297373a894 317 #define AC_STATUSC_OFFSET 0x0A /**< \brief (AC_STATUSC offset) Status C */
mbed_official 579:53297373a894 318 #define AC_STATUSC_RESETVALUE 0x00ul /**< \brief (AC_STATUSC reset_value) Status C */
mbed_official 579:53297373a894 319
mbed_official 579:53297373a894 320 #define AC_STATUSC_STATE0_Pos 0 /**< \brief (AC_STATUSC) Comparator 0 Current State */
mbed_official 579:53297373a894 321 #define AC_STATUSC_STATE0 (1 << AC_STATUSC_STATE0_Pos)
mbed_official 579:53297373a894 322 #define AC_STATUSC_STATE1_Pos 1 /**< \brief (AC_STATUSC) Comparator 1 Current State */
mbed_official 579:53297373a894 323 #define AC_STATUSC_STATE1 (1 << AC_STATUSC_STATE1_Pos)
mbed_official 579:53297373a894 324 #define AC_STATUSC_STATE_Pos 0 /**< \brief (AC_STATUSC) Comparator x Current State */
mbed_official 579:53297373a894 325 #define AC_STATUSC_STATE_Msk (0x3ul << AC_STATUSC_STATE_Pos)
mbed_official 579:53297373a894 326 #define AC_STATUSC_STATE(value) ((AC_STATUSC_STATE_Msk & ((value) << AC_STATUSC_STATE_Pos)))
mbed_official 579:53297373a894 327 #define AC_STATUSC_WSTATE0_Pos 4 /**< \brief (AC_STATUSC) Window 0 Current State */
mbed_official 579:53297373a894 328 #define AC_STATUSC_WSTATE0_Msk (0x3ul << AC_STATUSC_WSTATE0_Pos)
mbed_official 579:53297373a894 329 #define AC_STATUSC_WSTATE0(value) ((AC_STATUSC_WSTATE0_Msk & ((value) << AC_STATUSC_WSTATE0_Pos)))
mbed_official 579:53297373a894 330 #define AC_STATUSC_WSTATE0_ABOVE_Val 0x0ul /**< \brief (AC_STATUSC) Signal is above window */
mbed_official 579:53297373a894 331 #define AC_STATUSC_WSTATE0_INSIDE_Val 0x1ul /**< \brief (AC_STATUSC) Signal is inside window */
mbed_official 579:53297373a894 332 #define AC_STATUSC_WSTATE0_BELOW_Val 0x2ul /**< \brief (AC_STATUSC) Signal is below window */
mbed_official 579:53297373a894 333 #define AC_STATUSC_WSTATE0_ABOVE (AC_STATUSC_WSTATE0_ABOVE_Val << AC_STATUSC_WSTATE0_Pos)
mbed_official 579:53297373a894 334 #define AC_STATUSC_WSTATE0_INSIDE (AC_STATUSC_WSTATE0_INSIDE_Val << AC_STATUSC_WSTATE0_Pos)
mbed_official 579:53297373a894 335 #define AC_STATUSC_WSTATE0_BELOW (AC_STATUSC_WSTATE0_BELOW_Val << AC_STATUSC_WSTATE0_Pos)
mbed_official 579:53297373a894 336 #define AC_STATUSC_MASK 0x33ul /**< \brief (AC_STATUSC) MASK Register */
mbed_official 579:53297373a894 337
mbed_official 579:53297373a894 338 /* -------- AC_WINCTRL : (AC Offset: 0x0C) (R/W 8) Window Control -------- */
mbed_official 579:53297373a894 339 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
mbed_official 579:53297373a894 340 typedef union {
mbed_official 579:53297373a894 341 struct {
mbed_official 579:53297373a894 342 uint8_t WEN0:1; /*!< bit: 0 Window 0 Mode Enable */
mbed_official 579:53297373a894 343 uint8_t WINTSEL0:2; /*!< bit: 1.. 2 Window 0 Interrupt Selection */
mbed_official 579:53297373a894 344 uint8_t :5; /*!< bit: 3.. 7 Reserved */
mbed_official 579:53297373a894 345 } bit; /*!< Structure used for bit access */
mbed_official 579:53297373a894 346 uint8_t reg; /*!< Type used for register access */
mbed_official 579:53297373a894 347 } AC_WINCTRL_Type;
mbed_official 579:53297373a894 348 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
mbed_official 579:53297373a894 349
mbed_official 579:53297373a894 350 #define AC_WINCTRL_OFFSET 0x0C /**< \brief (AC_WINCTRL offset) Window Control */
mbed_official 579:53297373a894 351 #define AC_WINCTRL_RESETVALUE 0x00ul /**< \brief (AC_WINCTRL reset_value) Window Control */
mbed_official 579:53297373a894 352
mbed_official 579:53297373a894 353 #define AC_WINCTRL_WEN0_Pos 0 /**< \brief (AC_WINCTRL) Window 0 Mode Enable */
mbed_official 579:53297373a894 354 #define AC_WINCTRL_WEN0 (0x1ul << AC_WINCTRL_WEN0_Pos)
mbed_official 579:53297373a894 355 #define AC_WINCTRL_WINTSEL0_Pos 1 /**< \brief (AC_WINCTRL) Window 0 Interrupt Selection */
mbed_official 579:53297373a894 356 #define AC_WINCTRL_WINTSEL0_Msk (0x3ul << AC_WINCTRL_WINTSEL0_Pos)
mbed_official 579:53297373a894 357 #define AC_WINCTRL_WINTSEL0(value) ((AC_WINCTRL_WINTSEL0_Msk & ((value) << AC_WINCTRL_WINTSEL0_Pos)))
mbed_official 579:53297373a894 358 #define AC_WINCTRL_WINTSEL0_ABOVE_Val 0x0ul /**< \brief (AC_WINCTRL) Interrupt on signal above window */
mbed_official 579:53297373a894 359 #define AC_WINCTRL_WINTSEL0_INSIDE_Val 0x1ul /**< \brief (AC_WINCTRL) Interrupt on signal inside window */
mbed_official 579:53297373a894 360 #define AC_WINCTRL_WINTSEL0_BELOW_Val 0x2ul /**< \brief (AC_WINCTRL) Interrupt on signal below window */
mbed_official 579:53297373a894 361 #define AC_WINCTRL_WINTSEL0_OUTSIDE_Val 0x3ul /**< \brief (AC_WINCTRL) Interrupt on signal outside window */
mbed_official 579:53297373a894 362 #define AC_WINCTRL_WINTSEL0_ABOVE (AC_WINCTRL_WINTSEL0_ABOVE_Val << AC_WINCTRL_WINTSEL0_Pos)
mbed_official 579:53297373a894 363 #define AC_WINCTRL_WINTSEL0_INSIDE (AC_WINCTRL_WINTSEL0_INSIDE_Val << AC_WINCTRL_WINTSEL0_Pos)
mbed_official 579:53297373a894 364 #define AC_WINCTRL_WINTSEL0_BELOW (AC_WINCTRL_WINTSEL0_BELOW_Val << AC_WINCTRL_WINTSEL0_Pos)
mbed_official 579:53297373a894 365 #define AC_WINCTRL_WINTSEL0_OUTSIDE (AC_WINCTRL_WINTSEL0_OUTSIDE_Val << AC_WINCTRL_WINTSEL0_Pos)
mbed_official 579:53297373a894 366 #define AC_WINCTRL_MASK 0x07ul /**< \brief (AC_WINCTRL) MASK Register */
mbed_official 579:53297373a894 367
mbed_official 579:53297373a894 368 /* -------- AC_COMPCTRL : (AC Offset: 0x10) (R/W 32) Comparator Control n -------- */
mbed_official 579:53297373a894 369 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
mbed_official 579:53297373a894 370 typedef union {
mbed_official 579:53297373a894 371 struct {
mbed_official 579:53297373a894 372 uint32_t ENABLE:1; /*!< bit: 0 Enable */
mbed_official 579:53297373a894 373 uint32_t SINGLE:1; /*!< bit: 1 Single-Shot Mode */
mbed_official 579:53297373a894 374 uint32_t SPEED:2; /*!< bit: 2.. 3 Speed Selection */
mbed_official 579:53297373a894 375 uint32_t :1; /*!< bit: 4 Reserved */
mbed_official 579:53297373a894 376 uint32_t INTSEL:2; /*!< bit: 5.. 6 Interrupt Selection */
mbed_official 579:53297373a894 377 uint32_t :1; /*!< bit: 7 Reserved */
mbed_official 579:53297373a894 378 uint32_t MUXNEG:3; /*!< bit: 8..10 Negative Input Mux Selection */
mbed_official 579:53297373a894 379 uint32_t :1; /*!< bit: 11 Reserved */
mbed_official 579:53297373a894 380 uint32_t MUXPOS:2; /*!< bit: 12..13 Positive Input Mux Selection */
mbed_official 579:53297373a894 381 uint32_t :1; /*!< bit: 14 Reserved */
mbed_official 579:53297373a894 382 uint32_t SWAP:1; /*!< bit: 15 Swap Inputs and Invert */
mbed_official 579:53297373a894 383 uint32_t OUT:2; /*!< bit: 16..17 Output */
mbed_official 579:53297373a894 384 uint32_t :1; /*!< bit: 18 Reserved */
mbed_official 579:53297373a894 385 uint32_t HYST:1; /*!< bit: 19 Hysteresis Enable */
mbed_official 579:53297373a894 386 uint32_t :4; /*!< bit: 20..23 Reserved */
mbed_official 579:53297373a894 387 uint32_t FLEN:3; /*!< bit: 24..26 Filter Length */
mbed_official 579:53297373a894 388 uint32_t :5; /*!< bit: 27..31 Reserved */
mbed_official 579:53297373a894 389 } bit; /*!< Structure used for bit access */
mbed_official 579:53297373a894 390 uint32_t reg; /*!< Type used for register access */
mbed_official 579:53297373a894 391 } AC_COMPCTRL_Type;
mbed_official 579:53297373a894 392 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
mbed_official 579:53297373a894 393
mbed_official 579:53297373a894 394 #define AC_COMPCTRL_OFFSET 0x10 /**< \brief (AC_COMPCTRL offset) Comparator Control n */
mbed_official 579:53297373a894 395 #define AC_COMPCTRL_RESETVALUE 0x00000000ul /**< \brief (AC_COMPCTRL reset_value) Comparator Control n */
mbed_official 579:53297373a894 396
mbed_official 579:53297373a894 397 #define AC_COMPCTRL_ENABLE_Pos 0 /**< \brief (AC_COMPCTRL) Enable */
mbed_official 579:53297373a894 398 #define AC_COMPCTRL_ENABLE (0x1ul << AC_COMPCTRL_ENABLE_Pos)
mbed_official 579:53297373a894 399 #define AC_COMPCTRL_SINGLE_Pos 1 /**< \brief (AC_COMPCTRL) Single-Shot Mode */
mbed_official 579:53297373a894 400 #define AC_COMPCTRL_SINGLE (0x1ul << AC_COMPCTRL_SINGLE_Pos)
mbed_official 579:53297373a894 401 #define AC_COMPCTRL_SPEED_Pos 2 /**< \brief (AC_COMPCTRL) Speed Selection */
mbed_official 579:53297373a894 402 #define AC_COMPCTRL_SPEED_Msk (0x3ul << AC_COMPCTRL_SPEED_Pos)
mbed_official 579:53297373a894 403 #define AC_COMPCTRL_SPEED(value) ((AC_COMPCTRL_SPEED_Msk & ((value) << AC_COMPCTRL_SPEED_Pos)))
mbed_official 579:53297373a894 404 #define AC_COMPCTRL_SPEED_LOW_Val 0x0ul /**< \brief (AC_COMPCTRL) Low speed */
mbed_official 579:53297373a894 405 #define AC_COMPCTRL_SPEED_HIGH_Val 0x1ul /**< \brief (AC_COMPCTRL) High speed */
mbed_official 579:53297373a894 406 #define AC_COMPCTRL_SPEED_LOW (AC_COMPCTRL_SPEED_LOW_Val << AC_COMPCTRL_SPEED_Pos)
mbed_official 579:53297373a894 407 #define AC_COMPCTRL_SPEED_HIGH (AC_COMPCTRL_SPEED_HIGH_Val << AC_COMPCTRL_SPEED_Pos)
mbed_official 579:53297373a894 408 #define AC_COMPCTRL_INTSEL_Pos 5 /**< \brief (AC_COMPCTRL) Interrupt Selection */
mbed_official 579:53297373a894 409 #define AC_COMPCTRL_INTSEL_Msk (0x3ul << AC_COMPCTRL_INTSEL_Pos)
mbed_official 579:53297373a894 410 #define AC_COMPCTRL_INTSEL(value) ((AC_COMPCTRL_INTSEL_Msk & ((value) << AC_COMPCTRL_INTSEL_Pos)))
mbed_official 579:53297373a894 411 #define AC_COMPCTRL_INTSEL_TOGGLE_Val 0x0ul /**< \brief (AC_COMPCTRL) Interrupt on comparator output toggle */
mbed_official 579:53297373a894 412 #define AC_COMPCTRL_INTSEL_RISING_Val 0x1ul /**< \brief (AC_COMPCTRL) Interrupt on comparator output rising */
mbed_official 579:53297373a894 413 #define AC_COMPCTRL_INTSEL_FALLING_Val 0x2ul /**< \brief (AC_COMPCTRL) Interrupt on comparator output falling */
mbed_official 579:53297373a894 414 #define AC_COMPCTRL_INTSEL_EOC_Val 0x3ul /**< \brief (AC_COMPCTRL) Interrupt on end of comparison (single-shot mode only) */
mbed_official 579:53297373a894 415 #define AC_COMPCTRL_INTSEL_TOGGLE (AC_COMPCTRL_INTSEL_TOGGLE_Val << AC_COMPCTRL_INTSEL_Pos)
mbed_official 579:53297373a894 416 #define AC_COMPCTRL_INTSEL_RISING (AC_COMPCTRL_INTSEL_RISING_Val << AC_COMPCTRL_INTSEL_Pos)
mbed_official 579:53297373a894 417 #define AC_COMPCTRL_INTSEL_FALLING (AC_COMPCTRL_INTSEL_FALLING_Val << AC_COMPCTRL_INTSEL_Pos)
mbed_official 579:53297373a894 418 #define AC_COMPCTRL_INTSEL_EOC (AC_COMPCTRL_INTSEL_EOC_Val << AC_COMPCTRL_INTSEL_Pos)
mbed_official 579:53297373a894 419 #define AC_COMPCTRL_MUXNEG_Pos 8 /**< \brief (AC_COMPCTRL) Negative Input Mux Selection */
mbed_official 579:53297373a894 420 #define AC_COMPCTRL_MUXNEG_Msk (0x7ul << AC_COMPCTRL_MUXNEG_Pos)
mbed_official 579:53297373a894 421 #define AC_COMPCTRL_MUXNEG(value) ((AC_COMPCTRL_MUXNEG_Msk & ((value) << AC_COMPCTRL_MUXNEG_Pos)))
mbed_official 579:53297373a894 422 #define AC_COMPCTRL_MUXNEG_PIN0_Val 0x0ul /**< \brief (AC_COMPCTRL) I/O pin 0 */
mbed_official 579:53297373a894 423 #define AC_COMPCTRL_MUXNEG_PIN1_Val 0x1ul /**< \brief (AC_COMPCTRL) I/O pin 1 */
mbed_official 579:53297373a894 424 #define AC_COMPCTRL_MUXNEG_PIN2_Val 0x2ul /**< \brief (AC_COMPCTRL) I/O pin 2 */
mbed_official 579:53297373a894 425 #define AC_COMPCTRL_MUXNEG_PIN3_Val 0x3ul /**< \brief (AC_COMPCTRL) I/O pin 3 */
mbed_official 579:53297373a894 426 #define AC_COMPCTRL_MUXNEG_GND_Val 0x4ul /**< \brief (AC_COMPCTRL) Ground */
mbed_official 579:53297373a894 427 #define AC_COMPCTRL_MUXNEG_VSCALE_Val 0x5ul /**< \brief (AC_COMPCTRL) VDD scaler */
mbed_official 579:53297373a894 428 #define AC_COMPCTRL_MUXNEG_BANDGAP_Val 0x6ul /**< \brief (AC_COMPCTRL) Internal bandgap voltage */
mbed_official 579:53297373a894 429 #define AC_COMPCTRL_MUXNEG_DAC_Val 0x7ul /**< \brief (AC_COMPCTRL) DAC output */
mbed_official 579:53297373a894 430 #define AC_COMPCTRL_MUXNEG_PIN0 (AC_COMPCTRL_MUXNEG_PIN0_Val << AC_COMPCTRL_MUXNEG_Pos)
mbed_official 579:53297373a894 431 #define AC_COMPCTRL_MUXNEG_PIN1 (AC_COMPCTRL_MUXNEG_PIN1_Val << AC_COMPCTRL_MUXNEG_Pos)
mbed_official 579:53297373a894 432 #define AC_COMPCTRL_MUXNEG_PIN2 (AC_COMPCTRL_MUXNEG_PIN2_Val << AC_COMPCTRL_MUXNEG_Pos)
mbed_official 579:53297373a894 433 #define AC_COMPCTRL_MUXNEG_PIN3 (AC_COMPCTRL_MUXNEG_PIN3_Val << AC_COMPCTRL_MUXNEG_Pos)
mbed_official 579:53297373a894 434 #define AC_COMPCTRL_MUXNEG_GND (AC_COMPCTRL_MUXNEG_GND_Val << AC_COMPCTRL_MUXNEG_Pos)
mbed_official 579:53297373a894 435 #define AC_COMPCTRL_MUXNEG_VSCALE (AC_COMPCTRL_MUXNEG_VSCALE_Val << AC_COMPCTRL_MUXNEG_Pos)
mbed_official 579:53297373a894 436 #define AC_COMPCTRL_MUXNEG_BANDGAP (AC_COMPCTRL_MUXNEG_BANDGAP_Val << AC_COMPCTRL_MUXNEG_Pos)
mbed_official 579:53297373a894 437 #define AC_COMPCTRL_MUXNEG_DAC (AC_COMPCTRL_MUXNEG_DAC_Val << AC_COMPCTRL_MUXNEG_Pos)
mbed_official 579:53297373a894 438 #define AC_COMPCTRL_MUXPOS_Pos 12 /**< \brief (AC_COMPCTRL) Positive Input Mux Selection */
mbed_official 579:53297373a894 439 #define AC_COMPCTRL_MUXPOS_Msk (0x3ul << AC_COMPCTRL_MUXPOS_Pos)
mbed_official 579:53297373a894 440 #define AC_COMPCTRL_MUXPOS(value) ((AC_COMPCTRL_MUXPOS_Msk & ((value) << AC_COMPCTRL_MUXPOS_Pos)))
mbed_official 579:53297373a894 441 #define AC_COMPCTRL_MUXPOS_PIN0_Val 0x0ul /**< \brief (AC_COMPCTRL) I/O pin 0 */
mbed_official 579:53297373a894 442 #define AC_COMPCTRL_MUXPOS_PIN1_Val 0x1ul /**< \brief (AC_COMPCTRL) I/O pin 1 */
mbed_official 579:53297373a894 443 #define AC_COMPCTRL_MUXPOS_PIN2_Val 0x2ul /**< \brief (AC_COMPCTRL) I/O pin 2 */
mbed_official 579:53297373a894 444 #define AC_COMPCTRL_MUXPOS_PIN3_Val 0x3ul /**< \brief (AC_COMPCTRL) I/O pin 3 */
mbed_official 579:53297373a894 445 #define AC_COMPCTRL_MUXPOS_PIN0 (AC_COMPCTRL_MUXPOS_PIN0_Val << AC_COMPCTRL_MUXPOS_Pos)
mbed_official 579:53297373a894 446 #define AC_COMPCTRL_MUXPOS_PIN1 (AC_COMPCTRL_MUXPOS_PIN1_Val << AC_COMPCTRL_MUXPOS_Pos)
mbed_official 579:53297373a894 447 #define AC_COMPCTRL_MUXPOS_PIN2 (AC_COMPCTRL_MUXPOS_PIN2_Val << AC_COMPCTRL_MUXPOS_Pos)
mbed_official 579:53297373a894 448 #define AC_COMPCTRL_MUXPOS_PIN3 (AC_COMPCTRL_MUXPOS_PIN3_Val << AC_COMPCTRL_MUXPOS_Pos)
mbed_official 579:53297373a894 449 #define AC_COMPCTRL_SWAP_Pos 15 /**< \brief (AC_COMPCTRL) Swap Inputs and Invert */
mbed_official 579:53297373a894 450 #define AC_COMPCTRL_SWAP (0x1ul << AC_COMPCTRL_SWAP_Pos)
mbed_official 579:53297373a894 451 #define AC_COMPCTRL_OUT_Pos 16 /**< \brief (AC_COMPCTRL) Output */
mbed_official 579:53297373a894 452 #define AC_COMPCTRL_OUT_Msk (0x3ul << AC_COMPCTRL_OUT_Pos)
mbed_official 579:53297373a894 453 #define AC_COMPCTRL_OUT(value) ((AC_COMPCTRL_OUT_Msk & ((value) << AC_COMPCTRL_OUT_Pos)))
mbed_official 579:53297373a894 454 #define AC_COMPCTRL_OUT_OFF_Val 0x0ul /**< \brief (AC_COMPCTRL) The output of COMPn is not routed to the COMPn I/O port */
mbed_official 579:53297373a894 455 #define AC_COMPCTRL_OUT_ASYNC_Val 0x1ul /**< \brief (AC_COMPCTRL) The asynchronous output of COMPn is routed to the COMPn I/O port */
mbed_official 579:53297373a894 456 #define AC_COMPCTRL_OUT_SYNC_Val 0x2ul /**< \brief (AC_COMPCTRL) The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port */
mbed_official 579:53297373a894 457 #define AC_COMPCTRL_OUT_OFF (AC_COMPCTRL_OUT_OFF_Val << AC_COMPCTRL_OUT_Pos)
mbed_official 579:53297373a894 458 #define AC_COMPCTRL_OUT_ASYNC (AC_COMPCTRL_OUT_ASYNC_Val << AC_COMPCTRL_OUT_Pos)
mbed_official 579:53297373a894 459 #define AC_COMPCTRL_OUT_SYNC (AC_COMPCTRL_OUT_SYNC_Val << AC_COMPCTRL_OUT_Pos)
mbed_official 579:53297373a894 460 #define AC_COMPCTRL_HYST_Pos 19 /**< \brief (AC_COMPCTRL) Hysteresis Enable */
mbed_official 579:53297373a894 461 #define AC_COMPCTRL_HYST (0x1ul << AC_COMPCTRL_HYST_Pos)
mbed_official 579:53297373a894 462 #define AC_COMPCTRL_FLEN_Pos 24 /**< \brief (AC_COMPCTRL) Filter Length */
mbed_official 579:53297373a894 463 #define AC_COMPCTRL_FLEN_Msk (0x7ul << AC_COMPCTRL_FLEN_Pos)
mbed_official 579:53297373a894 464 #define AC_COMPCTRL_FLEN(value) ((AC_COMPCTRL_FLEN_Msk & ((value) << AC_COMPCTRL_FLEN_Pos)))
mbed_official 579:53297373a894 465 #define AC_COMPCTRL_FLEN_OFF_Val 0x0ul /**< \brief (AC_COMPCTRL) No filtering */
mbed_official 579:53297373a894 466 #define AC_COMPCTRL_FLEN_MAJ3_Val 0x1ul /**< \brief (AC_COMPCTRL) 3-bit majority function (2 of 3) */
mbed_official 579:53297373a894 467 #define AC_COMPCTRL_FLEN_MAJ5_Val 0x2ul /**< \brief (AC_COMPCTRL) 5-bit majority function (3 of 5) */
mbed_official 579:53297373a894 468 #define AC_COMPCTRL_FLEN_OFF (AC_COMPCTRL_FLEN_OFF_Val << AC_COMPCTRL_FLEN_Pos)
mbed_official 579:53297373a894 469 #define AC_COMPCTRL_FLEN_MAJ3 (AC_COMPCTRL_FLEN_MAJ3_Val << AC_COMPCTRL_FLEN_Pos)
mbed_official 579:53297373a894 470 #define AC_COMPCTRL_FLEN_MAJ5 (AC_COMPCTRL_FLEN_MAJ5_Val << AC_COMPCTRL_FLEN_Pos)
mbed_official 579:53297373a894 471 #define AC_COMPCTRL_MASK 0x070BB76Ful /**< \brief (AC_COMPCTRL) MASK Register */
mbed_official 579:53297373a894 472
mbed_official 579:53297373a894 473 /* -------- AC_SCALER : (AC Offset: 0x20) (R/W 8) Scaler n -------- */
mbed_official 579:53297373a894 474 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
mbed_official 579:53297373a894 475 typedef union {
mbed_official 579:53297373a894 476 struct {
mbed_official 579:53297373a894 477 uint8_t VALUE:6; /*!< bit: 0.. 5 Scaler Value */
mbed_official 579:53297373a894 478 uint8_t :2; /*!< bit: 6.. 7 Reserved */
mbed_official 579:53297373a894 479 } bit; /*!< Structure used for bit access */
mbed_official 579:53297373a894 480 uint8_t reg; /*!< Type used for register access */
mbed_official 579:53297373a894 481 } AC_SCALER_Type;
mbed_official 579:53297373a894 482 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
mbed_official 579:53297373a894 483
mbed_official 579:53297373a894 484 #define AC_SCALER_OFFSET 0x20 /**< \brief (AC_SCALER offset) Scaler n */
mbed_official 579:53297373a894 485 #define AC_SCALER_RESETVALUE 0x00ul /**< \brief (AC_SCALER reset_value) Scaler n */
mbed_official 579:53297373a894 486
mbed_official 579:53297373a894 487 #define AC_SCALER_VALUE_Pos 0 /**< \brief (AC_SCALER) Scaler Value */
mbed_official 579:53297373a894 488 #define AC_SCALER_VALUE_Msk (0x3Ful << AC_SCALER_VALUE_Pos)
mbed_official 579:53297373a894 489 #define AC_SCALER_VALUE(value) ((AC_SCALER_VALUE_Msk & ((value) << AC_SCALER_VALUE_Pos)))
mbed_official 579:53297373a894 490 #define AC_SCALER_MASK 0x3Ful /**< \brief (AC_SCALER) MASK Register */
mbed_official 579:53297373a894 491
mbed_official 579:53297373a894 492 /** \brief AC hardware registers */
mbed_official 579:53297373a894 493 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
mbed_official 579:53297373a894 494 typedef struct {
mbed_official 579:53297373a894 495 __IO AC_CTRLA_Type CTRLA; /**< \brief Offset: 0x00 (R/W 8) Control A */
mbed_official 579:53297373a894 496 __O AC_CTRLB_Type CTRLB; /**< \brief Offset: 0x01 ( /W 8) Control B */
mbed_official 579:53297373a894 497 __IO AC_EVCTRL_Type EVCTRL; /**< \brief Offset: 0x02 (R/W 16) Event Control */
mbed_official 579:53297373a894 498 __IO AC_INTENCLR_Type INTENCLR; /**< \brief Offset: 0x04 (R/W 8) Interrupt Enable Clear */
mbed_official 579:53297373a894 499 __IO AC_INTENSET_Type INTENSET; /**< \brief Offset: 0x05 (R/W 8) Interrupt Enable Set */
mbed_official 579:53297373a894 500 __IO AC_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x06 (R/W 8) Interrupt Flag Status and Clear */
mbed_official 579:53297373a894 501 RoReg8 Reserved1[0x1];
mbed_official 579:53297373a894 502 __I AC_STATUSA_Type STATUSA; /**< \brief Offset: 0x08 (R/ 8) Status A */
mbed_official 579:53297373a894 503 __I AC_STATUSB_Type STATUSB; /**< \brief Offset: 0x09 (R/ 8) Status B */
mbed_official 579:53297373a894 504 __I AC_STATUSC_Type STATUSC; /**< \brief Offset: 0x0A (R/ 8) Status C */
mbed_official 579:53297373a894 505 RoReg8 Reserved2[0x1];
mbed_official 579:53297373a894 506 __IO AC_WINCTRL_Type WINCTRL; /**< \brief Offset: 0x0C (R/W 8) Window Control */
mbed_official 579:53297373a894 507 RoReg8 Reserved3[0x3];
mbed_official 579:53297373a894 508 __IO AC_COMPCTRL_Type COMPCTRL[2]; /**< \brief Offset: 0x10 (R/W 32) Comparator Control n */
mbed_official 579:53297373a894 509 RoReg8 Reserved4[0x8];
mbed_official 579:53297373a894 510 __IO AC_SCALER_Type SCALER[2]; /**< \brief Offset: 0x20 (R/W 8) Scaler n */
mbed_official 579:53297373a894 511 } Ac;
mbed_official 579:53297373a894 512 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
mbed_official 579:53297373a894 513
mbed_official 579:53297373a894 514 /*@}*/
mbed_official 579:53297373a894 515
mbed_official 579:53297373a894 516 #endif /* _SAMD21_AC_COMPONENT_ */