Marco Zecchini / Mbed OS Example_RTOS

Rtos API example

mbed-os/targets/TARGET_STM/nvic_addr.h@0:9fca2b23d0ba, 2019-02-23 (annotated)

Committer:
marcozecchini
Date:
Sat Feb 23 12:13:36 2019 +0000
Revision:
0:9fca2b23d0ba
final commit

Who changed what in which revision?

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marcozecchini 0:9fca2b23d0ba 1 /* mbed Microcontroller Library
marcozecchini 0:9fca2b23d0ba 2 * Copyright (c) 2017-2017 ARM Limited
marcozecchini 0:9fca2b23d0ba 3 *
marcozecchini 0:9fca2b23d0ba 4 * Licensed under the Apache License, Version 2.0 (the "License");
marcozecchini 0:9fca2b23d0ba 5 * you may not use this file except in compliance with the License.
marcozecchini 0:9fca2b23d0ba 6 * You may obtain a copy of the License at
marcozecchini 0:9fca2b23d0ba 7 *
marcozecchini 0:9fca2b23d0ba 8 * http://www.apache.org/licenses/LICENSE-2.0
marcozecchini 0:9fca2b23d0ba 9 *
marcozecchini 0:9fca2b23d0ba 10 * Unless required by applicable law or agreed to in writing, software
marcozecchini 0:9fca2b23d0ba 11 * distributed under the License is distributed on an "AS IS" BASIS,
marcozecchini 0:9fca2b23d0ba 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
marcozecchini 0:9fca2b23d0ba 13 * See the License for the specific language governing permissions and
marcozecchini 0:9fca2b23d0ba 14 * limitations under the License.
marcozecchini 0:9fca2b23d0ba 15 */
marcozecchini 0:9fca2b23d0ba 16 #ifndef NVIC_ADDR_H
marcozecchini 0:9fca2b23d0ba 17 #define NVIC_ADDR_H
marcozecchini 0:9fca2b23d0ba 18
marcozecchini 0:9fca2b23d0ba 19 #ifdef __cplusplus
marcozecchini 0:9fca2b23d0ba 20 extern "C" {
marcozecchini 0:9fca2b23d0ba 21 #endif
marcozecchini 0:9fca2b23d0ba 22
marcozecchini 0:9fca2b23d0ba 23 #if defined(__ICCARM__)
marcozecchini 0:9fca2b23d0ba 24 #pragma section=".intvec"
marcozecchini 0:9fca2b23d0ba 25 #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)__section_begin(".intvec"))
marcozecchini 0:9fca2b23d0ba 26 #elif defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
marcozecchini 0:9fca2b23d0ba 27 extern uint32_t Load$$LR$$LR_IROM1$$Base[];
marcozecchini 0:9fca2b23d0ba 28 #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)Load$$LR$$LR_IROM1$$Base)
marcozecchini 0:9fca2b23d0ba 29 #elif defined(__GNUC__)
marcozecchini 0:9fca2b23d0ba 30 extern uint32_t g_pfnVectors[];
marcozecchini 0:9fca2b23d0ba 31 #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)g_pfnVectors)
marcozecchini 0:9fca2b23d0ba 32 #else
marcozecchini 0:9fca2b23d0ba 33 #error "Flash vector address not set for this toolchain"
marcozecchini 0:9fca2b23d0ba 34 #endif
marcozecchini 0:9fca2b23d0ba 35
marcozecchini 0:9fca2b23d0ba 36 #ifdef __cplusplus
marcozecchini 0:9fca2b23d0ba 37 }
marcozecchini 0:9fca2b23d0ba 38 #endif
marcozecchini 0:9fca2b23d0ba 39
marcozecchini 0:9fca2b23d0ba 40 #endif