Marco Zecchini / Mbed OS Example_RTOS

Rtos API example

mbed-os/platform/mbed_application.c@0:9fca2b23d0ba, 2019-02-23 (annotated)

Committer:
marcozecchini
Date:
Sat Feb 23 12:13:36 2019 +0000
Revision:
0:9fca2b23d0ba
final commit

Who changed what in which revision?

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marcozecchini 0:9fca2b23d0ba 1 /* mbed Microcontroller Library
marcozecchini 0:9fca2b23d0ba 2 * Copyright (c) 2017-2017 ARM Limited
marcozecchini 0:9fca2b23d0ba 3 *
marcozecchini 0:9fca2b23d0ba 4 * Licensed under the Apache License, Version 2.0 (the "License");
marcozecchini 0:9fca2b23d0ba 5 * you may not use this file except in compliance with the License.
marcozecchini 0:9fca2b23d0ba 6 * You may obtain a copy of the License at
marcozecchini 0:9fca2b23d0ba 7 *
marcozecchini 0:9fca2b23d0ba 8 * http://www.apache.org/licenses/LICENSE-2.0
marcozecchini 0:9fca2b23d0ba 9 *
marcozecchini 0:9fca2b23d0ba 10 * Unless required by applicable law or agreed to in writing, software
marcozecchini 0:9fca2b23d0ba 11 * distributed under the License is distributed on an "AS IS" BASIS,
marcozecchini 0:9fca2b23d0ba 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
marcozecchini 0:9fca2b23d0ba 13 * See the License for the specific language governing permissions and
marcozecchini 0:9fca2b23d0ba 14 * limitations under the License.
marcozecchini 0:9fca2b23d0ba 15 */
marcozecchini 0:9fca2b23d0ba 16
marcozecchini 0:9fca2b23d0ba 17 #include <stdlib.h>
marcozecchini 0:9fca2b23d0ba 18 #include <stdarg.h>
marcozecchini 0:9fca2b23d0ba 19 #include "device.h"
marcozecchini 0:9fca2b23d0ba 20 #include "platform/mbed_application.h"
marcozecchini 0:9fca2b23d0ba 21
marcozecchini 0:9fca2b23d0ba 22 #if MBED_APPLICATION_SUPPORT
marcozecchini 0:9fca2b23d0ba 23
marcozecchini 0:9fca2b23d0ba 24 static void powerdown_nvic(void);
marcozecchini 0:9fca2b23d0ba 25 static void powerdown_scb(uint32_t vtor);
marcozecchini 0:9fca2b23d0ba 26 static void start_new_application(void *sp, void *pc);
marcozecchini 0:9fca2b23d0ba 27
marcozecchini 0:9fca2b23d0ba 28 void mbed_start_application(uintptr_t address)
marcozecchini 0:9fca2b23d0ba 29 {
marcozecchini 0:9fca2b23d0ba 30 void *sp;
marcozecchini 0:9fca2b23d0ba 31 void *pc;
marcozecchini 0:9fca2b23d0ba 32
marcozecchini 0:9fca2b23d0ba 33 // Interrupts are re-enabled in start_new_application
marcozecchini 0:9fca2b23d0ba 34 __disable_irq();
marcozecchini 0:9fca2b23d0ba 35
marcozecchini 0:9fca2b23d0ba 36 SysTick->CTRL = 0x00000000;
marcozecchini 0:9fca2b23d0ba 37 powerdown_nvic();
marcozecchini 0:9fca2b23d0ba 38 powerdown_scb(address);
marcozecchini 0:9fca2b23d0ba 39
marcozecchini 0:9fca2b23d0ba 40 sp = *((void**)address + 0);
marcozecchini 0:9fca2b23d0ba 41 pc = *((void**)address + 1);
marcozecchini 0:9fca2b23d0ba 42 start_new_application(sp, pc);
marcozecchini 0:9fca2b23d0ba 43 }
marcozecchini 0:9fca2b23d0ba 44
marcozecchini 0:9fca2b23d0ba 45 static void powerdown_nvic()
marcozecchini 0:9fca2b23d0ba 46 {
marcozecchini 0:9fca2b23d0ba 47 int isr_groups_32;
marcozecchini 0:9fca2b23d0ba 48 int i;
marcozecchini 0:9fca2b23d0ba 49 int j;
marcozecchini 0:9fca2b23d0ba 50
marcozecchini 0:9fca2b23d0ba 51 isr_groups_32 = ((SCnSCB->ICTR & SCnSCB_ICTR_INTLINESNUM_Msk) >> SCnSCB_ICTR_INTLINESNUM_Pos) + 1;
marcozecchini 0:9fca2b23d0ba 52 for (i = 0; i < isr_groups_32; i++) {
marcozecchini 0:9fca2b23d0ba 53 NVIC->ICER[i] = 0xFFFFFFFF;
marcozecchini 0:9fca2b23d0ba 54 NVIC->ICPR[i] = 0xFFFFFFFF;
marcozecchini 0:9fca2b23d0ba 55 for (j = 0; j < 8; j++) {
marcozecchini 0:9fca2b23d0ba 56 NVIC->IP[i * 8 + j] = 0x00000000;
marcozecchini 0:9fca2b23d0ba 57 }
marcozecchini 0:9fca2b23d0ba 58 }
marcozecchini 0:9fca2b23d0ba 59 }
marcozecchini 0:9fca2b23d0ba 60
marcozecchini 0:9fca2b23d0ba 61 static void powerdown_scb(uint32_t vtor)
marcozecchini 0:9fca2b23d0ba 62 {
marcozecchini 0:9fca2b23d0ba 63 int i;
marcozecchini 0:9fca2b23d0ba 64
marcozecchini 0:9fca2b23d0ba 65 // SCB->CPUID - Read only CPU ID register
marcozecchini 0:9fca2b23d0ba 66 SCB->ICSR = SCB_ICSR_PENDSVCLR_Msk | SCB_ICSR_PENDSTCLR_Msk;
marcozecchini 0:9fca2b23d0ba 67 SCB->VTOR = vtor;
marcozecchini 0:9fca2b23d0ba 68 SCB->AIRCR = 0x05FA | 0x0000;
marcozecchini 0:9fca2b23d0ba 69 SCB->SCR = 0x00000000;
marcozecchini 0:9fca2b23d0ba 70 // SCB->CCR - Implementation defined value
marcozecchini 0:9fca2b23d0ba 71 for (i = 0; i < 12; i++) {
marcozecchini 0:9fca2b23d0ba 72 #if defined(__CORTEX_M7)
marcozecchini 0:9fca2b23d0ba 73 SCB->SHPR[i] = 0x00;
marcozecchini 0:9fca2b23d0ba 74 #else
marcozecchini 0:9fca2b23d0ba 75 SCB->SHP[i] = 0x00;
marcozecchini 0:9fca2b23d0ba 76 #endif
marcozecchini 0:9fca2b23d0ba 77 }
marcozecchini 0:9fca2b23d0ba 78 SCB->SHCSR = 0x00000000;
marcozecchini 0:9fca2b23d0ba 79 SCB->CFSR = 0xFFFFFFFF;
marcozecchini 0:9fca2b23d0ba 80 SCB->HFSR = SCB_HFSR_DEBUGEVT_Msk | SCB_HFSR_FORCED_Msk | SCB_HFSR_VECTTBL_Msk;
marcozecchini 0:9fca2b23d0ba 81 SCB->DFSR = SCB_DFSR_EXTERNAL_Msk | SCB_DFSR_VCATCH_Msk |
marcozecchini 0:9fca2b23d0ba 82 SCB_DFSR_DWTTRAP_Msk | SCB_DFSR_BKPT_Msk | SCB_DFSR_HALTED_Msk;
marcozecchini 0:9fca2b23d0ba 83 // SCB->MMFAR - Implementation defined value
marcozecchini 0:9fca2b23d0ba 84 // SCB->BFAR - Implementation defined value
marcozecchini 0:9fca2b23d0ba 85 // SCB->AFSR - Implementation defined value
marcozecchini 0:9fca2b23d0ba 86 // SCB->PFR - Read only processor feature register
marcozecchini 0:9fca2b23d0ba 87 // SCB->DFR - Read only debug feature registers
marcozecchini 0:9fca2b23d0ba 88 // SCB->ADR - Read only auxiliary feature registers
marcozecchini 0:9fca2b23d0ba 89 // SCB->MMFR - Read only memory model feature registers
marcozecchini 0:9fca2b23d0ba 90 // SCB->ISAR - Read only instruction set attribute registers
marcozecchini 0:9fca2b23d0ba 91 // SCB->CPACR - Implementation defined value
marcozecchini 0:9fca2b23d0ba 92 }
marcozecchini 0:9fca2b23d0ba 93
marcozecchini 0:9fca2b23d0ba 94 #if defined (__CC_ARM)
marcozecchini 0:9fca2b23d0ba 95
marcozecchini 0:9fca2b23d0ba 96 __asm static void start_new_application(void *sp, void *pc)
marcozecchini 0:9fca2b23d0ba 97 {
marcozecchini 0:9fca2b23d0ba 98 MOV R2, #0
marcozecchini 0:9fca2b23d0ba 99 MSR CONTROL, R2 // Switch to main stack
marcozecchini 0:9fca2b23d0ba 100 MOV SP, R0
marcozecchini 0:9fca2b23d0ba 101 MSR PRIMASK, R2 // Enable interrupts
marcozecchini 0:9fca2b23d0ba 102 BX R1
marcozecchini 0:9fca2b23d0ba 103 }
marcozecchini 0:9fca2b23d0ba 104
marcozecchini 0:9fca2b23d0ba 105 #elif defined (__GNUC__) || defined (__ICCARM__)
marcozecchini 0:9fca2b23d0ba 106
marcozecchini 0:9fca2b23d0ba 107 void start_new_application(void *sp, void *pc)
marcozecchini 0:9fca2b23d0ba 108 {
marcozecchini 0:9fca2b23d0ba 109 __asm volatile (
marcozecchini 0:9fca2b23d0ba 110 "mov r2, #0 \n"
marcozecchini 0:9fca2b23d0ba 111 "msr control, r2 \n" // Switch to main stack
marcozecchini 0:9fca2b23d0ba 112 "mov sp, %0 \n"
marcozecchini 0:9fca2b23d0ba 113 "msr primask, r2 \n" // Enable interrupts
marcozecchini 0:9fca2b23d0ba 114 "bx %1 \n"
marcozecchini 0:9fca2b23d0ba 115 :
marcozecchini 0:9fca2b23d0ba 116 : "l" (sp), "l" (pc)
marcozecchini 0:9fca2b23d0ba 117 : "r2", "cc", "memory"
marcozecchini 0:9fca2b23d0ba 118 );
marcozecchini 0:9fca2b23d0ba 119 }
marcozecchini 0:9fca2b23d0ba 120
marcozecchini 0:9fca2b23d0ba 121 #else
marcozecchini 0:9fca2b23d0ba 122
marcozecchini 0:9fca2b23d0ba 123 #error "Unsupported toolchain"
marcozecchini 0:9fca2b23d0ba 124
marcozecchini 0:9fca2b23d0ba 125 #endif
marcozecchini 0:9fca2b23d0ba 126
marcozecchini 0:9fca2b23d0ba 127 #endif /* MBED_APPLICATION_SUPPORT */