Marco Zecchini / Mbed OS Example_RTOS

Rtos API example

mbed-os/targets/targets.json@0:9fca2b23d0ba, 2019-02-23 (annotated)

Committer:
marcozecchini
Date:
Sat Feb 23 12:13:36 2019 +0000
Revision:
0:9fca2b23d0ba
final commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
marcozecchini 0:9fca2b23d0ba 1 {
marcozecchini 0:9fca2b23d0ba 2 "Target": {
marcozecchini 0:9fca2b23d0ba 3 "core": null,
marcozecchini 0:9fca2b23d0ba 4 "default_toolchain": "ARM",
marcozecchini 0:9fca2b23d0ba 5 "supported_toolchains": null,
marcozecchini 0:9fca2b23d0ba 6 "extra_labels": [],
marcozecchini 0:9fca2b23d0ba 7 "is_disk_virtual": false,
marcozecchini 0:9fca2b23d0ba 8 "macros": [],
marcozecchini 0:9fca2b23d0ba 9 "device_has": [],
marcozecchini 0:9fca2b23d0ba 10 "features": [],
marcozecchini 0:9fca2b23d0ba 11 "detect_code": [],
marcozecchini 0:9fca2b23d0ba 12 "public": false,
marcozecchini 0:9fca2b23d0ba 13 "default_lib": "std",
marcozecchini 0:9fca2b23d0ba 14 "bootloader_supported": false
marcozecchini 0:9fca2b23d0ba 15 },
marcozecchini 0:9fca2b23d0ba 16 "Super_Target": {
marcozecchini 0:9fca2b23d0ba 17 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 18 "core": "Cortex-M4",
marcozecchini 0:9fca2b23d0ba 19 "features_add": ["UVISOR", "BLE", "CLIENT", "IPV4", "IPV6"],
marcozecchini 0:9fca2b23d0ba 20 "supported_toolchains": ["ARM"]
marcozecchini 0:9fca2b23d0ba 21 },
marcozecchini 0:9fca2b23d0ba 22 "CM4_UARM": {
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marcozecchini 0:9fca2b23d0ba 24 "core": "Cortex-M4",
marcozecchini 0:9fca2b23d0ba 25 "default_toolchain": "uARM",
marcozecchini 0:9fca2b23d0ba 26 "public": false,
marcozecchini 0:9fca2b23d0ba 27 "supported_toolchains": ["uARM"],
marcozecchini 0:9fca2b23d0ba 28 "default_lib": "small"
marcozecchini 0:9fca2b23d0ba 29 },
marcozecchini 0:9fca2b23d0ba 30 "CM4_ARM": {
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marcozecchini 0:9fca2b23d0ba 32 "core": "Cortex-M4",
marcozecchini 0:9fca2b23d0ba 33 "public": false,
marcozecchini 0:9fca2b23d0ba 34 "supported_toolchains": ["ARM"]
marcozecchini 0:9fca2b23d0ba 35 },
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marcozecchini 0:9fca2b23d0ba 43 },
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marcozecchini 0:9fca2b23d0ba 47 "public": false,
marcozecchini 0:9fca2b23d0ba 48 "supported_toolchains": ["ARM"]
marcozecchini 0:9fca2b23d0ba 49 },
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marcozecchini 0:9fca2b23d0ba 52 "post_binary_hook": {"function": "LPCTargetCode.lpc_patch"},
marcozecchini 0:9fca2b23d0ba 53 "public": false
marcozecchini 0:9fca2b23d0ba 54 },
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marcozecchini 0:9fca2b23d0ba 63 },
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marcozecchini 0:9fca2b23d0ba 75 },
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marcozecchini 0:9fca2b23d0ba 186 },
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marcozecchini 0:9fca2b23d0ba 212 },
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marcozecchini 0:9fca2b23d0ba 221 },
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marcozecchini 0:9fca2b23d0ba 230 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE"],
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marcozecchini 0:9fca2b23d0ba 232 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 233 "device_name": "LPC1549JBD64"
marcozecchini 0:9fca2b23d0ba 234 },
marcozecchini 0:9fca2b23d0ba 235 "LPC1768": {
marcozecchini 0:9fca2b23d0ba 236 "inherits": ["LPCTarget"],
marcozecchini 0:9fca2b23d0ba 237 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 238 "extra_labels": ["NXP", "LPC176X", "MBED_LPC1768"],
marcozecchini 0:9fca2b23d0ba 239 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
marcozecchini 0:9fca2b23d0ba 240 "detect_code": ["1010"],
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marcozecchini 0:9fca2b23d0ba 242 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 243 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 244 "device_name": "LPC1768",
marcozecchini 0:9fca2b23d0ba 245 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 246 },
marcozecchini 0:9fca2b23d0ba 247 "LPC1769": {
marcozecchini 0:9fca2b23d0ba 248 "inherits": ["LPC1768"],
marcozecchini 0:9fca2b23d0ba 249 "device_name": "LPC1769"
marcozecchini 0:9fca2b23d0ba 250 },
marcozecchini 0:9fca2b23d0ba 251 "ARCH_PRO": {
marcozecchini 0:9fca2b23d0ba 252 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 253 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 254 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
marcozecchini 0:9fca2b23d0ba 255 "extra_labels": ["NXP", "LPC176X"],
marcozecchini 0:9fca2b23d0ba 256 "macros": ["TARGET_LPC1768"],
marcozecchini 0:9fca2b23d0ba 257 "inherits": ["LPCTarget"],
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marcozecchini 0:9fca2b23d0ba 259 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 260 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 261 "device_name": "LPC1768",
marcozecchini 0:9fca2b23d0ba 262 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 263 },
marcozecchini 0:9fca2b23d0ba 264 "UBLOX_C027": {
marcozecchini 0:9fca2b23d0ba 265 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 266 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 267 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
marcozecchini 0:9fca2b23d0ba 268 "extra_labels": ["NXP", "LPC176X"],
marcozecchini 0:9fca2b23d0ba 269 "config": {
marcozecchini 0:9fca2b23d0ba 270 "modem_is_on_board": {
marcozecchini 0:9fca2b23d0ba 271 "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
marcozecchini 0:9fca2b23d0ba 272 "value": 1,
marcozecchini 0:9fca2b23d0ba 273 "macro_name": "MODEM_ON_BOARD"
marcozecchini 0:9fca2b23d0ba 274 },
marcozecchini 0:9fca2b23d0ba 275 "modem_data_connection_type": {
marcozecchini 0:9fca2b23d0ba 276 "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
marcozecchini 0:9fca2b23d0ba 277 "value": 1,
marcozecchini 0:9fca2b23d0ba 278 "macro_name": "MODEM_ON_BOARD_UART"
marcozecchini 0:9fca2b23d0ba 279 }
marcozecchini 0:9fca2b23d0ba 280 },
marcozecchini 0:9fca2b23d0ba 281 "macros": ["TARGET_LPC1768"],
marcozecchini 0:9fca2b23d0ba 282 "inherits": ["LPCTarget"],
marcozecchini 0:9fca2b23d0ba 283 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
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marcozecchini 0:9fca2b23d0ba 285 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 286 "device_name": "LPC1768",
marcozecchini 0:9fca2b23d0ba 287 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 288 },
marcozecchini 0:9fca2b23d0ba 289 "XBED_LPC1768": {
marcozecchini 0:9fca2b23d0ba 290 "inherits": ["LPCTarget"],
marcozecchini 0:9fca2b23d0ba 291 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 292 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
marcozecchini 0:9fca2b23d0ba 293 "extra_labels": ["NXP", "LPC176X", "XBED_LPC1768"],
marcozecchini 0:9fca2b23d0ba 294 "macros": ["TARGET_LPC1768"],
marcozecchini 0:9fca2b23d0ba 295 "detect_code": ["1010"],
marcozecchini 0:9fca2b23d0ba 296 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
marcozecchini 0:9fca2b23d0ba 297 "device_name": "LPC1768"
marcozecchini 0:9fca2b23d0ba 298 },
marcozecchini 0:9fca2b23d0ba 299 "LPC810": {
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marcozecchini 0:9fca2b23d0ba 301 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 302 "default_toolchain": "uARM",
marcozecchini 0:9fca2b23d0ba 303 "extra_labels": ["NXP", "LPC81X"],
marcozecchini 0:9fca2b23d0ba 304 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 305 "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
marcozecchini 0:9fca2b23d0ba 306 "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
marcozecchini 0:9fca2b23d0ba 307 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 308 "device_name": "LPC810M021FN8"
marcozecchini 0:9fca2b23d0ba 309 },
marcozecchini 0:9fca2b23d0ba 310 "LPC812": {
marcozecchini 0:9fca2b23d0ba 311 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 312 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 313 "default_toolchain": "uARM",
marcozecchini 0:9fca2b23d0ba 314 "extra_labels": ["NXP", "LPC81X"],
marcozecchini 0:9fca2b23d0ba 315 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 316 "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
marcozecchini 0:9fca2b23d0ba 317 "inherits": ["LPCTarget"],
marcozecchini 0:9fca2b23d0ba 318 "detect_code": ["1050"],
marcozecchini 0:9fca2b23d0ba 319 "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
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marcozecchini 0:9fca2b23d0ba 322 "device_name": "LPC812M101JDH20"
marcozecchini 0:9fca2b23d0ba 323 },
marcozecchini 0:9fca2b23d0ba 324 "LPC824": {
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marcozecchini 0:9fca2b23d0ba 326 "core": "Cortex-M0+",
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marcozecchini 0:9fca2b23d0ba 328 "extra_labels": ["NXP", "LPC82X"],
marcozecchini 0:9fca2b23d0ba 329 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 330 "supported_toolchains": ["uARM", "GCC_ARM", "GCC_CR", "IAR"],
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marcozecchini 0:9fca2b23d0ba 335 "device_name": "LPC824M201JDH20"
marcozecchini 0:9fca2b23d0ba 336 },
marcozecchini 0:9fca2b23d0ba 337 "SSCI824": {
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marcozecchini 0:9fca2b23d0ba 339 "core": "Cortex-M0+",
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marcozecchini 0:9fca2b23d0ba 347 },
marcozecchini 0:9fca2b23d0ba 348 "MCU_LPC4088": {
marcozecchini 0:9fca2b23d0ba 349 "inherits": ["LPCTarget"],
marcozecchini 0:9fca2b23d0ba 350 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 351 "extra_labels": ["NXP", "LPC408X"],
marcozecchini 0:9fca2b23d0ba 352 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 353 "supported_toolchains": ["ARM", "GCC_CR", "GCC_ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 354 "post_binary_hook": {
marcozecchini 0:9fca2b23d0ba 355 "function": "LPC4088Code.binary_hook"
marcozecchini 0:9fca2b23d0ba 356 },
marcozecchini 0:9fca2b23d0ba 357 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 358 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 359 "device_name": "LPC4088FBD144"
marcozecchini 0:9fca2b23d0ba 360 },
marcozecchini 0:9fca2b23d0ba 361 "LPC4088": {
marcozecchini 0:9fca2b23d0ba 362 "inherits": ["MCU_LPC4088"],
marcozecchini 0:9fca2b23d0ba 363 "release_versions": ["2", "5"]
marcozecchini 0:9fca2b23d0ba 364 },
marcozecchini 0:9fca2b23d0ba 365 "LPC4088_DM": {
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marcozecchini 0:9fca2b23d0ba 367 "release_versions": ["2", "5"]
marcozecchini 0:9fca2b23d0ba 368 },
marcozecchini 0:9fca2b23d0ba 369 "LPC4330_M4": {
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marcozecchini 0:9fca2b23d0ba 371 "core": "Cortex-M4F",
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marcozecchini 0:9fca2b23d0ba 373 "supported_toolchains": ["ARM", "GCC_CR", "IAR", "GCC_ARM"],
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marcozecchini 0:9fca2b23d0ba 375 "device_name": "LPC4330"
marcozecchini 0:9fca2b23d0ba 376 },
marcozecchini 0:9fca2b23d0ba 377 "LPC4330_M0": {
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marcozecchini 0:9fca2b23d0ba 379 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 380 "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
marcozecchini 0:9fca2b23d0ba 381 "supported_toolchains": ["ARM", "GCC_CR", "IAR"],
marcozecchini 0:9fca2b23d0ba 382 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
marcozecchini 0:9fca2b23d0ba 383 },
marcozecchini 0:9fca2b23d0ba 384 "LPC4337": {
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marcozecchini 0:9fca2b23d0ba 386 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 387 "extra_labels": ["NXP", "LPC43XX", "LPC4337"],
marcozecchini 0:9fca2b23d0ba 388 "supported_toolchains": ["ARM"],
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marcozecchini 0:9fca2b23d0ba 390 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 391 "device_name": "LPC4337"
marcozecchini 0:9fca2b23d0ba 392 },
marcozecchini 0:9fca2b23d0ba 393 "LPC1800": {
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marcozecchini 0:9fca2b23d0ba 395 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 396 "extra_labels": ["NXP", "LPC43XX"],
marcozecchini 0:9fca2b23d0ba 397 "public": false,
marcozecchini 0:9fca2b23d0ba 398 "supported_toolchains": ["ARM", "GCC_CR", "IAR"]
marcozecchini 0:9fca2b23d0ba 399 },
marcozecchini 0:9fca2b23d0ba 400 "LPC11U37H_401": {
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marcozecchini 0:9fca2b23d0ba 402 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 403 "default_toolchain": "uARM",
marcozecchini 0:9fca2b23d0ba 404 "extra_labels": ["NXP", "LPC11UXX"],
marcozecchini 0:9fca2b23d0ba 405 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
marcozecchini 0:9fca2b23d0ba 406 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR"],
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marcozecchini 0:9fca2b23d0ba 410 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 411 "device_name": "LPC11U37HFBD64/401"
marcozecchini 0:9fca2b23d0ba 412 },
marcozecchini 0:9fca2b23d0ba 413 "ELEKTOR_COCORICO": {
marcozecchini 0:9fca2b23d0ba 414 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 415 "default_toolchain": "uARM",
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marcozecchini 0:9fca2b23d0ba 417 "supported_toolchains": ["uARM", "GCC_ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 418 "inherits": ["LPCTarget"],
marcozecchini 0:9fca2b23d0ba 419 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 420 "detect_code": ["C000"],
marcozecchini 0:9fca2b23d0ba 421 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 422 "device_name": "LPC812M101JDH16"
marcozecchini 0:9fca2b23d0ba 423 },
marcozecchini 0:9fca2b23d0ba 424 "KL05Z": {
marcozecchini 0:9fca2b23d0ba 425 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 426 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 427 "default_toolchain": "uARM",
marcozecchini 0:9fca2b23d0ba 428 "extra_labels": ["Freescale", "KLXX"],
marcozecchini 0:9fca2b23d0ba 429 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 430 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 431 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 432 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 433 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 434 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 435 "device_name": "MKL05Z32xxx4"
marcozecchini 0:9fca2b23d0ba 436 },
marcozecchini 0:9fca2b23d0ba 437 "KL25Z": {
marcozecchini 0:9fca2b23d0ba 438 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 439 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 440 "extra_labels": ["Freescale", "KLXX"],
marcozecchini 0:9fca2b23d0ba 441 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 442 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 443 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 444 "detect_code": ["0200"],
marcozecchini 0:9fca2b23d0ba 445 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 446 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 447 "device_name": "MKL25Z128xxx4"
marcozecchini 0:9fca2b23d0ba 448 },
marcozecchini 0:9fca2b23d0ba 449 "KL26Z": {
marcozecchini 0:9fca2b23d0ba 450 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 451 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 452 "extra_labels": ["Freescale", "KLXX"],
marcozecchini 0:9fca2b23d0ba 453 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 454 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 455 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 456 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 457 "device_name": "MKL26Z128xxx4"
marcozecchini 0:9fca2b23d0ba 458 },
marcozecchini 0:9fca2b23d0ba 459 "KL46Z": {
marcozecchini 0:9fca2b23d0ba 460 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 461 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 462 "extra_labels": ["Freescale", "KLXX", "FLASH_CMSIS_ALGO"],
marcozecchini 0:9fca2b23d0ba 463 "is_disk_virtual": true,
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marcozecchini 0:9fca2b23d0ba 682 "device_name": "MK66FN2M0xxx18",
marcozecchini 0:9fca2b23d0ba 683 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 684 },
marcozecchini 0:9fca2b23d0ba 685 "K82F": {
marcozecchini 0:9fca2b23d0ba 686 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 687 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 688 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 689 "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
marcozecchini 0:9fca2b23d0ba 690 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 691 "macros": ["CPU_MK82FN256VDC15", "FSL_RTOS_MBED"],
marcozecchini 0:9fca2b23d0ba 692 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 693 "detect_code": ["0217"],
marcozecchini 0:9fca2b23d0ba 694 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
marcozecchini 0:9fca2b23d0ba 695 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 696 "device_name": "MK82FN256xxx15"
marcozecchini 0:9fca2b23d0ba 697 },
marcozecchini 0:9fca2b23d0ba 698 "UBRIDGE": {
marcozecchini 0:9fca2b23d0ba 699 "inherits": ["K82F"],
marcozecchini 0:9fca2b23d0ba 700 "extra_labels_remove": ["FRDM"],
marcozecchini 0:9fca2b23d0ba 701 "supported_form_factors": []
marcozecchini 0:9fca2b23d0ba 702 },
marcozecchini 0:9fca2b23d0ba 703 "FAMILY_STM32": {
marcozecchini 0:9fca2b23d0ba 704 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 705 "public": false,
marcozecchini 0:9fca2b23d0ba 706 "extra_labels": ["STM"],
marcozecchini 0:9fca2b23d0ba 707 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
marcozecchini 0:9fca2b23d0ba 708 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
marcozecchini 0:9fca2b23d0ba 709 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"]
marcozecchini 0:9fca2b23d0ba 710 },
marcozecchini 0:9fca2b23d0ba 711 "LPC54114": {
marcozecchini 0:9fca2b23d0ba 712 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 713 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 714 "supported_toolchains": ["ARM", "IAR", "GCC_ARM"],
marcozecchini 0:9fca2b23d0ba 715 "extra_labels": ["NXP", "MCUXpresso_MCUS", "LPC54114_M4", "LPCXpresso"],
marcozecchini 0:9fca2b23d0ba 716 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 717 "macros": ["CPU_LPC54114J256BD64_cm4", "FSL_RTOS_MBED"],
marcozecchini 0:9fca2b23d0ba 718 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 719 "detect_code": ["1054"],
marcozecchini 0:9fca2b23d0ba 720 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 721 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 722 "device_name" : "LPC54114J256BD64"
marcozecchini 0:9fca2b23d0ba 723 },
marcozecchini 0:9fca2b23d0ba 724 "LPC546XX": {
marcozecchini 0:9fca2b23d0ba 725 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 726 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 727 "supported_toolchains": ["ARM", "IAR", "GCC_ARM"],
marcozecchini 0:9fca2b23d0ba 728 "extra_labels": ["NXP", "MCUXpresso_MCUS", "LPCXpresso"],
marcozecchini 0:9fca2b23d0ba 729 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 730 "macros": ["CPU_LPC54618J512ET180", "FSL_RTOS_MBED"],
marcozecchini 0:9fca2b23d0ba 731 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 732 "detect_code": ["1056"],
marcozecchini 0:9fca2b23d0ba 733 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 734 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 735 "device_name" : "LPC54618J512ET180"
marcozecchini 0:9fca2b23d0ba 736 },
marcozecchini 0:9fca2b23d0ba 737 "FF_LPC546XX": {
marcozecchini 0:9fca2b23d0ba 738 "inherits": ["LPC546XX"],
marcozecchini 0:9fca2b23d0ba 739 "extra_labels_remove" : ["LPCXpresso"],
marcozecchini 0:9fca2b23d0ba 740 "supported_form_factors": [""],
marcozecchini 0:9fca2b23d0ba 741 "detect_code": ["8081"]
marcozecchini 0:9fca2b23d0ba 742 },
marcozecchini 0:9fca2b23d0ba 743 "NUCLEO_F030R8": {
marcozecchini 0:9fca2b23d0ba 744 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 745 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 746 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 747 "extra_labels_add": ["STM32F0", "STM32F030R8"],
marcozecchini 0:9fca2b23d0ba 748 "config": {
marcozecchini 0:9fca2b23d0ba 749 "clock_source": {
marcozecchini 0:9fca2b23d0ba 750 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 751 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 752 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 753 }
marcozecchini 0:9fca2b23d0ba 754 },
marcozecchini 0:9fca2b23d0ba 755 "detect_code": ["0725"],
marcozecchini 0:9fca2b23d0ba 756 "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
marcozecchini 0:9fca2b23d0ba 757 "device_has_add": ["SERIAL_FC"],
marcozecchini 0:9fca2b23d0ba 758 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 759 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 760 "device_name": "STM32F030R8"
marcozecchini 0:9fca2b23d0ba 761 },
marcozecchini 0:9fca2b23d0ba 762 "NUCLEO_F031K6": {
marcozecchini 0:9fca2b23d0ba 763 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 764 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 765 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 766 "default_toolchain": "uARM",
marcozecchini 0:9fca2b23d0ba 767 "extra_labels_add": ["STM32F0", "STM32F031K6"],
marcozecchini 0:9fca2b23d0ba 768 "config": {
marcozecchini 0:9fca2b23d0ba 769 "clock_source": {
marcozecchini 0:9fca2b23d0ba 770 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 771 "value": "USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 772 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 773 }
marcozecchini 0:9fca2b23d0ba 774 },
marcozecchini 0:9fca2b23d0ba 775 "detect_code": ["0791"],
marcozecchini 0:9fca2b23d0ba 776 "macros_add": ["RTC_LSI=1", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
marcozecchini 0:9fca2b23d0ba 777 "device_has_add": ["SERIAL_FC"],
marcozecchini 0:9fca2b23d0ba 778 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 779 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 780 "device_name": "STM32F031K6"
marcozecchini 0:9fca2b23d0ba 781 },
marcozecchini 0:9fca2b23d0ba 782 "NUCLEO_F042K6": {
marcozecchini 0:9fca2b23d0ba 783 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 784 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 785 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 786 "default_toolchain": "uARM",
marcozecchini 0:9fca2b23d0ba 787 "extra_labels_add": ["STM32F0", "STM32F042K6"],
marcozecchini 0:9fca2b23d0ba 788 "config": {
marcozecchini 0:9fca2b23d0ba 789 "clock_source": {
marcozecchini 0:9fca2b23d0ba 790 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 791 "value": "USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 792 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 793 }
marcozecchini 0:9fca2b23d0ba 794 },
marcozecchini 0:9fca2b23d0ba 795 "detect_code": ["0785"],
marcozecchini 0:9fca2b23d0ba 796 "macros_add": ["RTC_LSI=1", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
marcozecchini 0:9fca2b23d0ba 797 "device_has_add": ["CAN", "SERIAL_FC"],
marcozecchini 0:9fca2b23d0ba 798 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 799 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 800 "device_name": "STM32F042K6"
marcozecchini 0:9fca2b23d0ba 801 },
marcozecchini 0:9fca2b23d0ba 802 "NUCLEO_F070RB": {
marcozecchini 0:9fca2b23d0ba 803 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 804 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 805 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 806 "extra_labels_add": ["STM32F0", "STM32F070RB"],
marcozecchini 0:9fca2b23d0ba 807 "config": {
marcozecchini 0:9fca2b23d0ba 808 "clock_source": {
marcozecchini 0:9fca2b23d0ba 809 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 810 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 811 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 812 }
marcozecchini 0:9fca2b23d0ba 813 },
marcozecchini 0:9fca2b23d0ba 814 "detect_code": ["0755"],
marcozecchini 0:9fca2b23d0ba 815 "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
marcozecchini 0:9fca2b23d0ba 816 "device_has_add": ["LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH"],
marcozecchini 0:9fca2b23d0ba 817 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 818 "device_name": "STM32F070RB"
marcozecchini 0:9fca2b23d0ba 819 },
marcozecchini 0:9fca2b23d0ba 820 "NUCLEO_F072RB": {
marcozecchini 0:9fca2b23d0ba 821 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 822 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 823 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 824 "extra_labels_add": ["STM32F0", "STM32F072RB"],
marcozecchini 0:9fca2b23d0ba 825 "config": {
marcozecchini 0:9fca2b23d0ba 826 "clock_source": {
marcozecchini 0:9fca2b23d0ba 827 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 828 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 829 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 830 }
marcozecchini 0:9fca2b23d0ba 831 },
marcozecchini 0:9fca2b23d0ba 832 "detect_code": ["0730"],
marcozecchini 0:9fca2b23d0ba 833 "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
marcozecchini 0:9fca2b23d0ba 834 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH"],
marcozecchini 0:9fca2b23d0ba 835 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 836 "device_name": "STM32F072RB"
marcozecchini 0:9fca2b23d0ba 837 },
marcozecchini 0:9fca2b23d0ba 838 "NUCLEO_F091RC": {
marcozecchini 0:9fca2b23d0ba 839 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 840 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 841 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 842 "extra_labels_add": ["STM32F0", "STM32F091RC"],
marcozecchini 0:9fca2b23d0ba 843 "config": {
marcozecchini 0:9fca2b23d0ba 844 "clock_source": {
marcozecchini 0:9fca2b23d0ba 845 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 846 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 847 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 848 }
marcozecchini 0:9fca2b23d0ba 849 },
marcozecchini 0:9fca2b23d0ba 850 "detect_code": ["0750"],
marcozecchini 0:9fca2b23d0ba 851 "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
marcozecchini 0:9fca2b23d0ba 852 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH"],
marcozecchini 0:9fca2b23d0ba 853 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 854 "device_name": "STM32F091RC"
marcozecchini 0:9fca2b23d0ba 855 },
marcozecchini 0:9fca2b23d0ba 856 "NUCLEO_F103RB": {
marcozecchini 0:9fca2b23d0ba 857 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 858 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 859 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 860 "extra_labels_add": ["STM32F1", "STM32F103RB"],
marcozecchini 0:9fca2b23d0ba 861 "config": {
marcozecchini 0:9fca2b23d0ba 862 "clock_source": {
marcozecchini 0:9fca2b23d0ba 863 "help": "Mask value : USE_PLL_HSE_EXTC (SYSCLK=72 MHz) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI (SYSCLK=64 MHz)",
marcozecchini 0:9fca2b23d0ba 864 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 865 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 866 },
marcozecchini 0:9fca2b23d0ba 867 "clock_source_usb": {
marcozecchini 0:9fca2b23d0ba 868 "help": "In case of HSI clock source, to get 48 Mhz USB, SYSCLK has to be reduced from 64 to 48 MHz (set 0 for the max SYSCLK value)",
marcozecchini 0:9fca2b23d0ba 869 "value": "0",
marcozecchini 0:9fca2b23d0ba 870 "macro_name": "CLOCK_SOURCE_USB"
marcozecchini 0:9fca2b23d0ba 871 }
marcozecchini 0:9fca2b23d0ba 872 },
marcozecchini 0:9fca2b23d0ba 873 "detect_code": ["0700"],
marcozecchini 0:9fca2b23d0ba 874 "device_has_add": ["CAN", "SERIAL_FC", "SERIAL_ASYNCH"],
marcozecchini 0:9fca2b23d0ba 875 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 876 "device_name": "STM32F103RB"
marcozecchini 0:9fca2b23d0ba 877 },
marcozecchini 0:9fca2b23d0ba 878 "NUCLEO_F207ZG": {
marcozecchini 0:9fca2b23d0ba 879 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 880 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 881 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 882 "extra_labels_add": ["STM32F2", "STM32F207ZG"],
marcozecchini 0:9fca2b23d0ba 883 "config": {
marcozecchini 0:9fca2b23d0ba 884 "d11_configuration": {
marcozecchini 0:9fca2b23d0ba 885 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
marcozecchini 0:9fca2b23d0ba 886 "value": "PA_7",
marcozecchini 0:9fca2b23d0ba 887 "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
marcozecchini 0:9fca2b23d0ba 888 },
marcozecchini 0:9fca2b23d0ba 889 "clock_source": {
marcozecchini 0:9fca2b23d0ba 890 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 891 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 892 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 893 }
marcozecchini 0:9fca2b23d0ba 894 },
marcozecchini 0:9fca2b23d0ba 895 "detect_code": ["0835"],
marcozecchini 0:9fca2b23d0ba 896 "macros_add": ["USBHOST_OTHER"],
marcozecchini 0:9fca2b23d0ba 897 "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC"],
marcozecchini 0:9fca2b23d0ba 898 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 899 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 900 "device_name": "STM32F207ZG"
marcozecchini 0:9fca2b23d0ba 901 },
marcozecchini 0:9fca2b23d0ba 902 "NUCLEO_F302R8": {
marcozecchini 0:9fca2b23d0ba 903 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 904 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 905 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 906 "extra_labels_add": ["STM32F3", "STM32F302x8", "STM32F302R8"],
marcozecchini 0:9fca2b23d0ba 907 "config": {
marcozecchini 0:9fca2b23d0ba 908 "clock_source": {
marcozecchini 0:9fca2b23d0ba 909 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 910 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 911 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 912 }
marcozecchini 0:9fca2b23d0ba 913 },
marcozecchini 0:9fca2b23d0ba 914 "detect_code": ["0705"],
marcozecchini 0:9fca2b23d0ba 915 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
marcozecchini 0:9fca2b23d0ba 916 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 917 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 918 "device_name": "STM32F302R8"
marcozecchini 0:9fca2b23d0ba 919 },
marcozecchini 0:9fca2b23d0ba 920 "NUCLEO_F303K8": {
marcozecchini 0:9fca2b23d0ba 921 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 922 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 923 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 924 "extra_labels_add": ["STM32F3", "STM32F303x8", "STM32F303K8"],
marcozecchini 0:9fca2b23d0ba 925 "macros_add": ["RTC_LSI=1"],
marcozecchini 0:9fca2b23d0ba 926 "config": {
marcozecchini 0:9fca2b23d0ba 927 "clock_source": {
marcozecchini 0:9fca2b23d0ba 928 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 929 "value": "USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 930 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 931 }
marcozecchini 0:9fca2b23d0ba 932 },
marcozecchini 0:9fca2b23d0ba 933 "detect_code": ["0775"],
marcozecchini 0:9fca2b23d0ba 934 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 935 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC"],
marcozecchini 0:9fca2b23d0ba 936 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 937 "device_name": "STM32F303K8"
marcozecchini 0:9fca2b23d0ba 938 },
marcozecchini 0:9fca2b23d0ba 939 "NUCLEO_F303RE": {
marcozecchini 0:9fca2b23d0ba 940 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 941 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 942 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 943 "extra_labels_add": ["STM32F3", "STM32F303xE", "STM32F303RE"],
marcozecchini 0:9fca2b23d0ba 944 "config": {
marcozecchini 0:9fca2b23d0ba 945 "clock_source": {
marcozecchini 0:9fca2b23d0ba 946 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 947 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 948 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 949 }
marcozecchini 0:9fca2b23d0ba 950 },
marcozecchini 0:9fca2b23d0ba 951 "detect_code": ["0745"],
marcozecchini 0:9fca2b23d0ba 952 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
marcozecchini 0:9fca2b23d0ba 953 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 954 "device_name": "STM32F303RE"
marcozecchini 0:9fca2b23d0ba 955 },
marcozecchini 0:9fca2b23d0ba 956 "NUCLEO_F303ZE": {
marcozecchini 0:9fca2b23d0ba 957 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 958 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 959 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 960 "extra_labels_add": ["STM32F3", "STM32F303xE", "STM32F303ZE"],
marcozecchini 0:9fca2b23d0ba 961 "config": {
marcozecchini 0:9fca2b23d0ba 962 "clock_source": {
marcozecchini 0:9fca2b23d0ba 963 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 964 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 965 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 966 }
marcozecchini 0:9fca2b23d0ba 967 },
marcozecchini 0:9fca2b23d0ba 968 "detect_code": ["0747"],
marcozecchini 0:9fca2b23d0ba 969 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER"],
marcozecchini 0:9fca2b23d0ba 970 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 971 "device_name": "STM32F303ZE"
marcozecchini 0:9fca2b23d0ba 972 },
marcozecchini 0:9fca2b23d0ba 973 "NUCLEO_F334R8": {
marcozecchini 0:9fca2b23d0ba 974 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 975 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 976 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 977 "extra_labels_add": ["STM32F3", "STM32F334x8", "STM32F334R8"],
marcozecchini 0:9fca2b23d0ba 978 "config": {
marcozecchini 0:9fca2b23d0ba 979 "clock_source": {
marcozecchini 0:9fca2b23d0ba 980 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 981 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 982 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 983 }
marcozecchini 0:9fca2b23d0ba 984 },
marcozecchini 0:9fca2b23d0ba 985 "detect_code": ["0735"],
marcozecchini 0:9fca2b23d0ba 986 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
marcozecchini 0:9fca2b23d0ba 987 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 988 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 989 "device_name": "STM32F334R8"
marcozecchini 0:9fca2b23d0ba 990 },
marcozecchini 0:9fca2b23d0ba 991 "NUCLEO_F401RE": {
marcozecchini 0:9fca2b23d0ba 992 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 993 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 994 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 995 "extra_labels_add": ["STM32F4", "STM32F401xE", "STM32F401RE"],
marcozecchini 0:9fca2b23d0ba 996 "config": {
marcozecchini 0:9fca2b23d0ba 997 "clock_source": {
marcozecchini 0:9fca2b23d0ba 998 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 999 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1000 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1001 }
marcozecchini 0:9fca2b23d0ba 1002 },
marcozecchini 0:9fca2b23d0ba 1003 "detect_code": ["0720"],
marcozecchini 0:9fca2b23d0ba 1004 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
marcozecchini 0:9fca2b23d0ba 1005 "device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1006 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1007 "device_name": "STM32F401RE"
marcozecchini 0:9fca2b23d0ba 1008 },
marcozecchini 0:9fca2b23d0ba 1009 "NUCLEO_F410RB": {
marcozecchini 0:9fca2b23d0ba 1010 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1011 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 1012 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1013 "extra_labels_add": ["STM32F4", "STM32F410RB","STM32F410xB", "STM32F410Rx"],
marcozecchini 0:9fca2b23d0ba 1014 "config": {
marcozecchini 0:9fca2b23d0ba 1015 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1016 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1017 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1018 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1019 }
marcozecchini 0:9fca2b23d0ba 1020 },
marcozecchini 0:9fca2b23d0ba 1021 "detect_code": ["0744"],
marcozecchini 0:9fca2b23d0ba 1022 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1023 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1024 "device_name": "STM32F410RB"
marcozecchini 0:9fca2b23d0ba 1025 },
marcozecchini 0:9fca2b23d0ba 1026 "NUCLEO_F411RE": {
marcozecchini 0:9fca2b23d0ba 1027 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1028 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 1029 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1030 "extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE"],
marcozecchini 0:9fca2b23d0ba 1031 "detect_code": ["0740"],
marcozecchini 0:9fca2b23d0ba 1032 "config": {
marcozecchini 0:9fca2b23d0ba 1033 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1034 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1035 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1036 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1037 },
marcozecchini 0:9fca2b23d0ba 1038 "clock_source_usb": {
marcozecchini 0:9fca2b23d0ba 1039 "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 100 to 96 MHz (set 0 for the max SYSCLK value)",
marcozecchini 0:9fca2b23d0ba 1040 "value": "0",
marcozecchini 0:9fca2b23d0ba 1041 "macro_name": "CLOCK_SOURCE_USB"
marcozecchini 0:9fca2b23d0ba 1042 }
marcozecchini 0:9fca2b23d0ba 1043 },
marcozecchini 0:9fca2b23d0ba 1044 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
marcozecchini 0:9fca2b23d0ba 1045 "device_has_add": ["LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1046 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1047 "device_name": "STM32F411RE"
marcozecchini 0:9fca2b23d0ba 1048 },
marcozecchini 0:9fca2b23d0ba 1049 "NUCLEO_F412ZG": {
marcozecchini 0:9fca2b23d0ba 1050 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1051 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 1052 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1053 "extra_labels_add": ["STM32F4", "STM32F412xG", "STM32F412ZG"],
marcozecchini 0:9fca2b23d0ba 1054 "config": {
marcozecchini 0:9fca2b23d0ba 1055 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1056 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1057 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1058 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1059 }
marcozecchini 0:9fca2b23d0ba 1060 },
marcozecchini 0:9fca2b23d0ba 1061 "detect_code": ["0826"],
marcozecchini 0:9fca2b23d0ba 1062 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
marcozecchini 0:9fca2b23d0ba 1063 "device_has_add": ["CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1064 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1065 "device_name": "STM32F412ZG",
marcozecchini 0:9fca2b23d0ba 1066 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 1067 },
marcozecchini 0:9fca2b23d0ba 1068 "DISCO_F413ZH": {
marcozecchini 0:9fca2b23d0ba 1069 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1070 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1071 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1072 "extra_labels_add": ["STM32F4", "STM32F413xx", "STM32F413ZH", "STM32F413xH"],
marcozecchini 0:9fca2b23d0ba 1073 "config": {
marcozecchini 0:9fca2b23d0ba 1074 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1075 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1076 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1077 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1078 }
marcozecchini 0:9fca2b23d0ba 1079 },
marcozecchini 0:9fca2b23d0ba 1080 "detect_code": ["0743"],
marcozecchini 0:9fca2b23d0ba 1081 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
marcozecchini 0:9fca2b23d0ba 1082 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1083 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1084 "device_name": "STM32F413ZH"
marcozecchini 0:9fca2b23d0ba 1085 },
marcozecchini 0:9fca2b23d0ba 1086 "ELMO_F411RE": {
marcozecchini 0:9fca2b23d0ba 1087 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1088 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1089 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1090 "default_toolchain": "uARM",
marcozecchini 0:9fca2b23d0ba 1091 "extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE"],
marcozecchini 0:9fca2b23d0ba 1092 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
marcozecchini 0:9fca2b23d0ba 1093 "detect_code": ["----"],
marcozecchini 0:9fca2b23d0ba 1094 "device_has_add": [],
marcozecchini 0:9fca2b23d0ba 1095 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 1096 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 1097 "device_name": "STM32F411RE"
marcozecchini 0:9fca2b23d0ba 1098 },
marcozecchini 0:9fca2b23d0ba 1099 "NUCLEO_F429ZI": {
marcozecchini 0:9fca2b23d0ba 1100 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1101 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1102 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1103 "config": {
marcozecchini 0:9fca2b23d0ba 1104 "d11_configuration": {
marcozecchini 0:9fca2b23d0ba 1105 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
marcozecchini 0:9fca2b23d0ba 1106 "value": "PA_7",
marcozecchini 0:9fca2b23d0ba 1107 "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
marcozecchini 0:9fca2b23d0ba 1108 },
marcozecchini 0:9fca2b23d0ba 1109 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1110 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1111 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1112 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1113 },
marcozecchini 0:9fca2b23d0ba 1114 "clock_source_usb": {
marcozecchini 0:9fca2b23d0ba 1115 "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)",
marcozecchini 0:9fca2b23d0ba 1116 "value": "1",
marcozecchini 0:9fca2b23d0ba 1117 "macro_name": "CLOCK_SOURCE_USB"
marcozecchini 0:9fca2b23d0ba 1118 }
marcozecchini 0:9fca2b23d0ba 1119 },
marcozecchini 0:9fca2b23d0ba 1120 "extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "STM32F429xI"],
marcozecchini 0:9fca2b23d0ba 1121 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
marcozecchini 0:9fca2b23d0ba 1122 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1123 "detect_code": ["0796"],
marcozecchini 0:9fca2b23d0ba 1124 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 1125 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1126 "device_name": "STM32F429ZI",
marcozecchini 0:9fca2b23d0ba 1127 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 1128 },
marcozecchini 0:9fca2b23d0ba 1129 "NUCLEO_F439ZI": {
marcozecchini 0:9fca2b23d0ba 1130 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1131 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1132 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1133 "config": {
marcozecchini 0:9fca2b23d0ba 1134 "d11_configuration": {
marcozecchini 0:9fca2b23d0ba 1135 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
marcozecchini 0:9fca2b23d0ba 1136 "value": "PA_7",
marcozecchini 0:9fca2b23d0ba 1137 "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
marcozecchini 0:9fca2b23d0ba 1138 },
marcozecchini 0:9fca2b23d0ba 1139 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1140 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1141 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1142 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1143 },
marcozecchini 0:9fca2b23d0ba 1144 "clock_source_usb": {
marcozecchini 0:9fca2b23d0ba 1145 "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)",
marcozecchini 0:9fca2b23d0ba 1146 "value": "1",
marcozecchini 0:9fca2b23d0ba 1147 "macro_name": "CLOCK_SOURCE_USB"
marcozecchini 0:9fca2b23d0ba 1148 }
marcozecchini 0:9fca2b23d0ba 1149 },
marcozecchini 0:9fca2b23d0ba 1150 "extra_labels_add": ["STM32F4", "STM32F439", "STM32F439ZI", "STM32F439xx", "STM32F439xI"],
marcozecchini 0:9fca2b23d0ba 1151 "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "USB_STM_HAL", "USBHOST_OTHER"],
marcozecchini 0:9fca2b23d0ba 1152 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1153 "detect_code": ["0797"],
marcozecchini 0:9fca2b23d0ba 1154 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 1155 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1156 "device_name" : "STM32F439ZI",
marcozecchini 0:9fca2b23d0ba 1157 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 1158 },
marcozecchini 0:9fca2b23d0ba 1159 "NUCLEO_F446RE": {
marcozecchini 0:9fca2b23d0ba 1160 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1161 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 1162 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1163 "extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446RE"],
marcozecchini 0:9fca2b23d0ba 1164 "config": {
marcozecchini 0:9fca2b23d0ba 1165 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1166 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1167 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1168 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1169 }
marcozecchini 0:9fca2b23d0ba 1170 },
marcozecchini 0:9fca2b23d0ba 1171 "detect_code": ["0777"],
marcozecchini 0:9fca2b23d0ba 1172 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
marcozecchini 0:9fca2b23d0ba 1173 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1174 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1175 "device_name": "STM32F446RE",
marcozecchini 0:9fca2b23d0ba 1176 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 1177 },
marcozecchini 0:9fca2b23d0ba 1178 "NUCLEO_F446ZE": {
marcozecchini 0:9fca2b23d0ba 1179 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1180 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 1181 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1182 "extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446ZE"],
marcozecchini 0:9fca2b23d0ba 1183 "config": {
marcozecchini 0:9fca2b23d0ba 1184 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1185 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1186 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1187 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1188 }
marcozecchini 0:9fca2b23d0ba 1189 },
marcozecchini 0:9fca2b23d0ba 1190 "detect_code": ["0778"],
marcozecchini 0:9fca2b23d0ba 1191 "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
marcozecchini 0:9fca2b23d0ba 1192 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1193 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1194 "device_name": "STM32F446ZE"
marcozecchini 0:9fca2b23d0ba 1195 },
marcozecchini 0:9fca2b23d0ba 1196 "B96B_F446VE": {
marcozecchini 0:9fca2b23d0ba 1197 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1198 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 1199 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1200 "extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446VE"],
marcozecchini 0:9fca2b23d0ba 1201 "detect_code": ["0840"],
marcozecchini 0:9fca2b23d0ba 1202 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1203 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1204 "device_name":"STM32F446VE"
marcozecchini 0:9fca2b23d0ba 1205 },
marcozecchini 0:9fca2b23d0ba 1206 "NUCLEO_F746ZG": {
marcozecchini 0:9fca2b23d0ba 1207 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1208 "core": "Cortex-M7F",
marcozecchini 0:9fca2b23d0ba 1209 "extra_labels_add": ["STM32F7", "STM32F746", "STM32F746xG", "STM32F746ZG"],
marcozecchini 0:9fca2b23d0ba 1210 "config": {
marcozecchini 0:9fca2b23d0ba 1211 "d11_configuration": {
marcozecchini 0:9fca2b23d0ba 1212 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
marcozecchini 0:9fca2b23d0ba 1213 "value": "PA_7",
marcozecchini 0:9fca2b23d0ba 1214 "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
marcozecchini 0:9fca2b23d0ba 1215 },
marcozecchini 0:9fca2b23d0ba 1216 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1217 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1218 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1219 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1220 }
marcozecchini 0:9fca2b23d0ba 1221 },
marcozecchini 0:9fca2b23d0ba 1222 "macros_add": ["USBHOST_OTHER"],
marcozecchini 0:9fca2b23d0ba 1223 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1224 "detect_code": ["0816"],
marcozecchini 0:9fca2b23d0ba 1225 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1226 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 1227 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1228 "device_name": "STM32F746ZG"
marcozecchini 0:9fca2b23d0ba 1229 },
marcozecchini 0:9fca2b23d0ba 1230 "NUCLEO_F756ZG": {
marcozecchini 0:9fca2b23d0ba 1231 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1232 "core": "Cortex-M7F",
marcozecchini 0:9fca2b23d0ba 1233 "extra_labels_add": ["STM32F7", "STM32F756", "STM32F756xG", "STM32F756ZG"],
marcozecchini 0:9fca2b23d0ba 1234 "config": {
marcozecchini 0:9fca2b23d0ba 1235 "d11_configuration": {
marcozecchini 0:9fca2b23d0ba 1236 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
marcozecchini 0:9fca2b23d0ba 1237 "value": "PA_7",
marcozecchini 0:9fca2b23d0ba 1238 "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
marcozecchini 0:9fca2b23d0ba 1239 },
marcozecchini 0:9fca2b23d0ba 1240 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1241 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1242 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1243 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1244 }
marcozecchini 0:9fca2b23d0ba 1245 },
marcozecchini 0:9fca2b23d0ba 1246 "macros_add": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USBHOST_OTHER", "MBEDTLS_CONFIG_HW_SUPPORT"],
marcozecchini 0:9fca2b23d0ba 1247 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1248 "detect_code": ["0819"],
marcozecchini 0:9fca2b23d0ba 1249 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1250 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 1251 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1252 "device_name": "STM32F756ZG"
marcozecchini 0:9fca2b23d0ba 1253 },
marcozecchini 0:9fca2b23d0ba 1254 "NUCLEO_F767ZI": {
marcozecchini 0:9fca2b23d0ba 1255 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1256 "core": "Cortex-M7FD",
marcozecchini 0:9fca2b23d0ba 1257 "extra_labels_add": ["STM32F7", "STM32F767", "STM32F767xI", "STM32F767ZI"],
marcozecchini 0:9fca2b23d0ba 1258 "config": {
marcozecchini 0:9fca2b23d0ba 1259 "d11_configuration": {
marcozecchini 0:9fca2b23d0ba 1260 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
marcozecchini 0:9fca2b23d0ba 1261 "value": "PA_7",
marcozecchini 0:9fca2b23d0ba 1262 "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
marcozecchini 0:9fca2b23d0ba 1263 },
marcozecchini 0:9fca2b23d0ba 1264 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1265 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1266 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1267 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1268 }
marcozecchini 0:9fca2b23d0ba 1269 },
marcozecchini 0:9fca2b23d0ba 1270 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1271 "macros_add": ["USBHOST_OTHER"],
marcozecchini 0:9fca2b23d0ba 1272 "detect_code": ["0818"],
marcozecchini 0:9fca2b23d0ba 1273 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1274 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 1275 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1276 "device_name": "STM32F767ZI"
marcozecchini 0:9fca2b23d0ba 1277 },
marcozecchini 0:9fca2b23d0ba 1278 "NUCLEO_L011K4": {
marcozecchini 0:9fca2b23d0ba 1279 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1280 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 1281 "extra_labels_add": ["STM32L0", "STM32L011K4"],
marcozecchini 0:9fca2b23d0ba 1282 "supported_toolchains": ["uARM"],
marcozecchini 0:9fca2b23d0ba 1283 "default_toolchain": "uARM",
marcozecchini 0:9fca2b23d0ba 1284 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1285 "config": {
marcozecchini 0:9fca2b23d0ba 1286 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1287 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1288 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1289 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1290 }
marcozecchini 0:9fca2b23d0ba 1291 },
marcozecchini 0:9fca2b23d0ba 1292 "detect_code": ["0780"],
marcozecchini 0:9fca2b23d0ba 1293 "device_has_add": ["LOWPOWERTIMER", "SERIAL_FC", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1294 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 1295 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 1296 "device_name": "STM32L011K4"
marcozecchini 0:9fca2b23d0ba 1297 },
marcozecchini 0:9fca2b23d0ba 1298 "NUCLEO_L031K6": {
marcozecchini 0:9fca2b23d0ba 1299 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1300 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 1301 "extra_labels_add": ["STM32L0", "STM32L031K6"],
marcozecchini 0:9fca2b23d0ba 1302 "default_toolchain": "uARM",
marcozecchini 0:9fca2b23d0ba 1303 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1304 "config": {
marcozecchini 0:9fca2b23d0ba 1305 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1306 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1307 "value": "USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1308 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1309 }
marcozecchini 0:9fca2b23d0ba 1310 },
marcozecchini 0:9fca2b23d0ba 1311 "detect_code": ["0790"],
marcozecchini 0:9fca2b23d0ba 1312 "device_has_add": ["LOWPOWERTIMER", "SERIAL_FC", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1313 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 1314 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 1315 "device_name": "STM32L031K6"
marcozecchini 0:9fca2b23d0ba 1316 },
marcozecchini 0:9fca2b23d0ba 1317 "NUCLEO_L053R8": {
marcozecchini 0:9fca2b23d0ba 1318 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1319 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 1320 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 1321 "extra_labels_add": ["STM32L0", "STM32L053x8", "STM32L053R8"],
marcozecchini 0:9fca2b23d0ba 1322 "config": {
marcozecchini 0:9fca2b23d0ba 1323 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1324 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1325 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1326 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1327 }
marcozecchini 0:9fca2b23d0ba 1328 },
marcozecchini 0:9fca2b23d0ba 1329 "detect_code": ["0715"],
marcozecchini 0:9fca2b23d0ba 1330 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1331 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 1332 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 1333 "device_name": "STM32L053R8"
marcozecchini 0:9fca2b23d0ba 1334 },
marcozecchini 0:9fca2b23d0ba 1335 "NUCLEO_L073RZ": {
marcozecchini 0:9fca2b23d0ba 1336 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1337 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 1338 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 1339 "extra_labels_add": ["STM32L0", "STM32L073RZ", "STM32L073xx"],
marcozecchini 0:9fca2b23d0ba 1340 "config": {
marcozecchini 0:9fca2b23d0ba 1341 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1342 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1343 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1344 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1345 }
marcozecchini 0:9fca2b23d0ba 1346 },
marcozecchini 0:9fca2b23d0ba 1347 "detect_code": ["0760"],
marcozecchini 0:9fca2b23d0ba 1348 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1349 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1350 "device_name": "STM32L073RZ"
marcozecchini 0:9fca2b23d0ba 1351 },
marcozecchini 0:9fca2b23d0ba 1352 "NUCLEO_L152RE": {
marcozecchini 0:9fca2b23d0ba 1353 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1354 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 1355 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 1356 "extra_labels_add": ["STM32L1", "STM32L152RE"],
marcozecchini 0:9fca2b23d0ba 1357 "config": {
marcozecchini 0:9fca2b23d0ba 1358 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1359 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1360 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1361 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1362 }
marcozecchini 0:9fca2b23d0ba 1363 },
marcozecchini 0:9fca2b23d0ba 1364 "detect_code": ["0710"],
marcozecchini 0:9fca2b23d0ba 1365 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1366 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1367 "device_name": "STM32L152RE"
marcozecchini 0:9fca2b23d0ba 1368 },
marcozecchini 0:9fca2b23d0ba 1369 "NUCLEO_L432KC": {
marcozecchini 0:9fca2b23d0ba 1370 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1371 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1372 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1373 "extra_labels_add": ["STM32L4", "STM32L432xC", "STM32L432KC"],
marcozecchini 0:9fca2b23d0ba 1374 "config": {
marcozecchini 0:9fca2b23d0ba 1375 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1376 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
marcozecchini 0:9fca2b23d0ba 1377 "value": "USE_PLL_MSI",
marcozecchini 0:9fca2b23d0ba 1378 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1379 }
marcozecchini 0:9fca2b23d0ba 1380 },
marcozecchini 0:9fca2b23d0ba 1381 "detect_code": ["0770"],
marcozecchini 0:9fca2b23d0ba 1382 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "CAN", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1383 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1384 "device_name": "STM32L432KC"
marcozecchini 0:9fca2b23d0ba 1385 },
marcozecchini 0:9fca2b23d0ba 1386 "NUCLEO_L476RG": {
marcozecchini 0:9fca2b23d0ba 1387 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1388 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 1389 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1390 "extra_labels_add": ["STM32L4", "STM32L476RG", "STM32L476xG"],
marcozecchini 0:9fca2b23d0ba 1391 "config": {
marcozecchini 0:9fca2b23d0ba 1392 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1393 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
marcozecchini 0:9fca2b23d0ba 1394 "value": "USE_PLL_MSI",
marcozecchini 0:9fca2b23d0ba 1395 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1396 }
marcozecchini 0:9fca2b23d0ba 1397 },
marcozecchini 0:9fca2b23d0ba 1398 "detect_code": ["0765"],
marcozecchini 0:9fca2b23d0ba 1399 "macros_add": ["USBHOST_OTHER"],
marcozecchini 0:9fca2b23d0ba 1400 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1401 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1402 "device_name": "STM32L476RG",
marcozecchini 0:9fca2b23d0ba 1403 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 1404 },
marcozecchini 0:9fca2b23d0ba 1405 "SILICA_SENSOR_NODE": {
marcozecchini 0:9fca2b23d0ba 1406 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1407 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1408 "default_toolchain": "GCC_ARM",
marcozecchini 0:9fca2b23d0ba 1409 "extra_labels_add": ["STM32L4", "STM32L476xG", "STM32L476JG"],
marcozecchini 0:9fca2b23d0ba 1410 "config": {
marcozecchini 0:9fca2b23d0ba 1411 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1412 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
marcozecchini 0:9fca2b23d0ba 1413 "value": "USE_PLL_MSI",
marcozecchini 0:9fca2b23d0ba 1414 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1415 }
marcozecchini 0:9fca2b23d0ba 1416 },
marcozecchini 0:9fca2b23d0ba 1417 "detect_code": ["0766"],
marcozecchini 0:9fca2b23d0ba 1418 "macros_add": ["USBHOST_OTHER"],
marcozecchini 0:9fca2b23d0ba 1419 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1420 "release_versions": ["5"],
marcozecchini 0:9fca2b23d0ba 1421 "device_name": "STM32L476JG"
marcozecchini 0:9fca2b23d0ba 1422 },
marcozecchini 0:9fca2b23d0ba 1423 "NUCLEO_L486RG": {
marcozecchini 0:9fca2b23d0ba 1424 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1425 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 1426 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1427 "extra_labels_add": ["STM32L4", "STM32L486RG", "STM32L486xG"],
marcozecchini 0:9fca2b23d0ba 1428 "config": {
marcozecchini 0:9fca2b23d0ba 1429 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1430 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
marcozecchini 0:9fca2b23d0ba 1431 "value": "USE_PLL_MSI",
marcozecchini 0:9fca2b23d0ba 1432 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1433 }
marcozecchini 0:9fca2b23d0ba 1434 },
marcozecchini 0:9fca2b23d0ba 1435 "detect_code": ["0827"],
marcozecchini 0:9fca2b23d0ba 1436 "macros_add": ["USBHOST_OTHER", "MBEDTLS_CONFIG_HW_SUPPORT"],
marcozecchini 0:9fca2b23d0ba 1437 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1438 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1439 "device_name": "STM32L486RG"
marcozecchini 0:9fca2b23d0ba 1440 },
marcozecchini 0:9fca2b23d0ba 1441 "ARCH_MAX": {
marcozecchini 0:9fca2b23d0ba 1442 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1443 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1444 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1445 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
marcozecchini 0:9fca2b23d0ba 1446 "program_cycle_s": 2,
marcozecchini 0:9fca2b23d0ba 1447 "extra_labels_add": ["STM32F4", "STM32F407", "STM32F407xG", "STM32F407VG"],
marcozecchini 0:9fca2b23d0ba 1448 "device_has_add": ["ANALOGOUT"],
marcozecchini 0:9fca2b23d0ba 1449 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 1450 "device_name": "STM32F407VG"
marcozecchini 0:9fca2b23d0ba 1451 },
marcozecchini 0:9fca2b23d0ba 1452 "DISCO_F051R8": {
marcozecchini 0:9fca2b23d0ba 1453 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1454 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 1455 "extra_labels_add": ["STM32F0", "STM32F051", "STM32F051R8"],
marcozecchini 0:9fca2b23d0ba 1456 "supported_toolchains": ["GCC_ARM"],
marcozecchini 0:9fca2b23d0ba 1457 "config": {
marcozecchini 0:9fca2b23d0ba 1458 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1459 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1460 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1461 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1462 }
marcozecchini 0:9fca2b23d0ba 1463 },
marcozecchini 0:9fca2b23d0ba 1464 "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
marcozecchini 0:9fca2b23d0ba 1465 "device_has_add": ["SERIAL_FC"],
marcozecchini 0:9fca2b23d0ba 1466 "device_name": "STM32F051R8"
marcozecchini 0:9fca2b23d0ba 1467 },
marcozecchini 0:9fca2b23d0ba 1468 "DISCO_F100RB": {
marcozecchini 0:9fca2b23d0ba 1469 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1470 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 1471 "extra_labels_add": ["STM32F1", "STM32F100RB"],
marcozecchini 0:9fca2b23d0ba 1472 "supported_toolchains": ["GCC_ARM"],
marcozecchini 0:9fca2b23d0ba 1473 "device_has_add": [],
marcozecchini 0:9fca2b23d0ba 1474 "device_name": "STM32F100RB"
marcozecchini 0:9fca2b23d0ba 1475 },
marcozecchini 0:9fca2b23d0ba 1476 "DISCO_F303VC": {
marcozecchini 0:9fca2b23d0ba 1477 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1478 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1479 "extra_labels_add": ["STM32F3", "STM32F303", "STM32F303xC", "STM32F303VC"],
marcozecchini 0:9fca2b23d0ba 1480 "macros_add": ["RTC_LSI=1"],
marcozecchini 0:9fca2b23d0ba 1481 "supported_toolchains": ["GCC_ARM"],
marcozecchini 0:9fca2b23d0ba 1482 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC"],
marcozecchini 0:9fca2b23d0ba 1483 "device_name": "STM32F303VC"
marcozecchini 0:9fca2b23d0ba 1484 },
marcozecchini 0:9fca2b23d0ba 1485 "DISCO_F334C8": {
marcozecchini 0:9fca2b23d0ba 1486 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1487 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1488 "extra_labels_add": ["STM32F3", "STM32F334x8","STM32F334C8"],
marcozecchini 0:9fca2b23d0ba 1489 "macros_add": ["RTC_LSI=1"],
marcozecchini 0:9fca2b23d0ba 1490 "config": {
marcozecchini 0:9fca2b23d0ba 1491 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1492 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1493 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1494 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1495 }
marcozecchini 0:9fca2b23d0ba 1496 },
marcozecchini 0:9fca2b23d0ba 1497 "detect_code": ["0810"],
marcozecchini 0:9fca2b23d0ba 1498 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
marcozecchini 0:9fca2b23d0ba 1499 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 1500 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 1501 "device_name": "STM32F334C8"
marcozecchini 0:9fca2b23d0ba 1502 },
marcozecchini 0:9fca2b23d0ba 1503 "DISCO_F407VG": {
marcozecchini 0:9fca2b23d0ba 1504 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1505 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1506 "extra_labels_add": ["STM32F4", "STM32F407", "STM32F407xG", "STM32F407VG"],
marcozecchini 0:9fca2b23d0ba 1507 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
marcozecchini 0:9fca2b23d0ba 1508 "macros_add": ["RTC_LSI=1", "USB_STM_HAL"],
marcozecchini 0:9fca2b23d0ba 1509 "device_has_add": ["ANALOGOUT"],
marcozecchini 0:9fca2b23d0ba 1510 "device_name": "STM32F407VG"
marcozecchini 0:9fca2b23d0ba 1511 },
marcozecchini 0:9fca2b23d0ba 1512 "DISCO_F429ZI": {
marcozecchini 0:9fca2b23d0ba 1513 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1514 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1515 "extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xI", "STM32F429xx"],
marcozecchini 0:9fca2b23d0ba 1516 "config": {
marcozecchini 0:9fca2b23d0ba 1517 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1518 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1519 "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1520 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1521 },
marcozecchini 0:9fca2b23d0ba 1522 "clock_source_usb": {
marcozecchini 0:9fca2b23d0ba 1523 "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)",
marcozecchini 0:9fca2b23d0ba 1524 "value": "1",
marcozecchini 0:9fca2b23d0ba 1525 "macro_name": "CLOCK_SOURCE_USB"
marcozecchini 0:9fca2b23d0ba 1526 }
marcozecchini 0:9fca2b23d0ba 1527 },
marcozecchini 0:9fca2b23d0ba 1528 "macros_add": ["RTC_LSI=1", "USB_STM_HAL", "USBHOST_OTHER"],
marcozecchini 0:9fca2b23d0ba 1529 "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1530 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1531 "device_name": "STM32F429ZI"
marcozecchini 0:9fca2b23d0ba 1532 },
marcozecchini 0:9fca2b23d0ba 1533 "DISCO_F469NI": {
marcozecchini 0:9fca2b23d0ba 1534 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1535 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1536 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1537 "extra_labels_add": ["STM32F4", "STM32F469", "STM32F469NI", "STM32F469xI", "STM32F469xx"],
marcozecchini 0:9fca2b23d0ba 1538 "config": {
marcozecchini 0:9fca2b23d0ba 1539 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1540 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1541 "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1542 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1543 }
marcozecchini 0:9fca2b23d0ba 1544 },
marcozecchini 0:9fca2b23d0ba 1545 "detect_code": ["0788"],
marcozecchini 0:9fca2b23d0ba 1546 "macros_add": ["USB_STM_HAL"],
marcozecchini 0:9fca2b23d0ba 1547 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1548 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1549 "device_name": "STM32F469NI"
marcozecchini 0:9fca2b23d0ba 1550 },
marcozecchini 0:9fca2b23d0ba 1551 "DISCO_L053C8": {
marcozecchini 0:9fca2b23d0ba 1552 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1553 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 1554 "extra_labels_add": ["STM32L0", "STM32L053x8", "STM32L053C8"],
marcozecchini 0:9fca2b23d0ba 1555 "macros": ["RTC_LSI=1"],
marcozecchini 0:9fca2b23d0ba 1556 "config": {
marcozecchini 0:9fca2b23d0ba 1557 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1558 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1559 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1560 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1561 }
marcozecchini 0:9fca2b23d0ba 1562 },
marcozecchini 0:9fca2b23d0ba 1563 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1564 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 1565 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 1566 "device_name": "STM32L053C8"
marcozecchini 0:9fca2b23d0ba 1567 },
marcozecchini 0:9fca2b23d0ba 1568 "DISCO_L072CZ_LRWAN1": {
marcozecchini 0:9fca2b23d0ba 1569 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1570 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 1571 "extra_labels_add": ["STM32L0", "STM32L072CZ", "STM32L072xx"],
marcozecchini 0:9fca2b23d0ba 1572 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 1573 "config": {
marcozecchini 0:9fca2b23d0ba 1574 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1575 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1576 "value": "USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1577 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1578 }
marcozecchini 0:9fca2b23d0ba 1579 },
marcozecchini 0:9fca2b23d0ba 1580 "detect_code": ["0833"],
marcozecchini 0:9fca2b23d0ba 1581 "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1582 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1583 "device_name": "STM32L072CZ"
marcozecchini 0:9fca2b23d0ba 1584 },
marcozecchini 0:9fca2b23d0ba 1585 "DISCO_F746NG": {
marcozecchini 0:9fca2b23d0ba 1586 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1587 "core": "Cortex-M7F",
marcozecchini 0:9fca2b23d0ba 1588 "extra_labels_add": ["STM32F7", "STM32F746", "STM32F746xG", "STM32F746NG"],
marcozecchini 0:9fca2b23d0ba 1589 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1590 "config": {
marcozecchini 0:9fca2b23d0ba 1591 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1592 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1593 "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1594 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1595 }
marcozecchini 0:9fca2b23d0ba 1596 },
marcozecchini 0:9fca2b23d0ba 1597 "detect_code": ["0815"],
marcozecchini 0:9fca2b23d0ba 1598 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1599 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 1600 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1601 "device_name": "STM32F746NG"
marcozecchini 0:9fca2b23d0ba 1602 },
marcozecchini 0:9fca2b23d0ba 1603 "DISCO_F769NI": {
marcozecchini 0:9fca2b23d0ba 1604 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1605 "core": "Cortex-M7FD",
marcozecchini 0:9fca2b23d0ba 1606 "extra_labels_add": ["STM32F7", "STM32F769", "STM32F769xI", "STM32F769NI"],
marcozecchini 0:9fca2b23d0ba 1607 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1608 "config": {
marcozecchini 0:9fca2b23d0ba 1609 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1610 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1611 "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
marcozecchini 0:9fca2b23d0ba 1612 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1613 }
marcozecchini 0:9fca2b23d0ba 1614 },
marcozecchini 0:9fca2b23d0ba 1615 "detect_code": ["0817"],
marcozecchini 0:9fca2b23d0ba 1616 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1617 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 1618 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1619 "device_name": "STM32F769NI"
marcozecchini 0:9fca2b23d0ba 1620 },
marcozecchini 0:9fca2b23d0ba 1621 "DISCO_L475VG_IOT01A": {
marcozecchini 0:9fca2b23d0ba 1622 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1623 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1624 "extra_labels_add": ["STM32L4", "STM32L475xG", "STM32L475VG"],
marcozecchini 0:9fca2b23d0ba 1625 "config": {
marcozecchini 0:9fca2b23d0ba 1626 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1627 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
marcozecchini 0:9fca2b23d0ba 1628 "value": "USE_PLL_MSI",
marcozecchini 0:9fca2b23d0ba 1629 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1630 }
marcozecchini 0:9fca2b23d0ba 1631 },
marcozecchini 0:9fca2b23d0ba 1632 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1633 "detect_code": ["0764"],
marcozecchini 0:9fca2b23d0ba 1634 "macros_add": ["USBHOST_OTHER"],
marcozecchini 0:9fca2b23d0ba 1635 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1636 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1637 "device_name": "STM32L475VG",
marcozecchini 0:9fca2b23d0ba 1638 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 1639 },
marcozecchini 0:9fca2b23d0ba 1640 "DISCO_L476VG": {
marcozecchini 0:9fca2b23d0ba 1641 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1642 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1643 "extra_labels_add": ["STM32L4", "STM32L476xG", "STM32L476VG"],
marcozecchini 0:9fca2b23d0ba 1644 "config": {
marcozecchini 0:9fca2b23d0ba 1645 "clock_source": {
marcozecchini 0:9fca2b23d0ba 1646 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
marcozecchini 0:9fca2b23d0ba 1647 "value": "USE_PLL_MSI",
marcozecchini 0:9fca2b23d0ba 1648 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 1649 }
marcozecchini 0:9fca2b23d0ba 1650 },
marcozecchini 0:9fca2b23d0ba 1651 "detect_code": ["0820"],
marcozecchini 0:9fca2b23d0ba 1652 "macros_add": ["USBHOST_OTHER"],
marcozecchini 0:9fca2b23d0ba 1653 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1654 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1655 "device_name": "STM32L476VG",
marcozecchini 0:9fca2b23d0ba 1656 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 1657 },
marcozecchini 0:9fca2b23d0ba 1658 "MTS_MDOT_F405RG": {
marcozecchini 0:9fca2b23d0ba 1659 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1660 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1661 "extra_labels_add": ["STM32F4", "STM32F405RG"],
marcozecchini 0:9fca2b23d0ba 1662 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 1663 "macros_add": ["HSE_VALUE=26000000"],
marcozecchini 0:9fca2b23d0ba 1664 "device_has_add": ["ANALOGOUT"],
marcozecchini 0:9fca2b23d0ba 1665 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 1666 "device_name": "STM32F405RG"
marcozecchini 0:9fca2b23d0ba 1667 },
marcozecchini 0:9fca2b23d0ba 1668 "MTS_MDOT_F411RE": {
marcozecchini 0:9fca2b23d0ba 1669 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1670 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1671 "extra_labels_add": ["STM32F4", "STM32F411RE"],
marcozecchini 0:9fca2b23d0ba 1672 "macros_add": ["HSE_VALUE=26000000", "USE_PLL_HSE_EXTC=0", "VECT_TAB_OFFSET=0x00010000"],
marcozecchini 0:9fca2b23d0ba 1673 "post_binary_hook": {
marcozecchini 0:9fca2b23d0ba 1674 "function": "MTSCode.combine_bins_mts_dot",
marcozecchini 0:9fca2b23d0ba 1675 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
marcozecchini 0:9fca2b23d0ba 1676 },
marcozecchini 0:9fca2b23d0ba 1677 "device_has_add": [],
marcozecchini 0:9fca2b23d0ba 1678 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1679 "device_name": "STM32F411RE"
marcozecchini 0:9fca2b23d0ba 1680 },
marcozecchini 0:9fca2b23d0ba 1681 "MTS_DRAGONFLY_F411RE": {
marcozecchini 0:9fca2b23d0ba 1682 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1683 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1684 "extra_labels_add": ["STM32F4", "STM32F411RE"],
marcozecchini 0:9fca2b23d0ba 1685 "config": {
marcozecchini 0:9fca2b23d0ba 1686 "modem_is_on_board": {
marcozecchini 0:9fca2b23d0ba 1687 "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
marcozecchini 0:9fca2b23d0ba 1688 "value": 1,
marcozecchini 0:9fca2b23d0ba 1689 "macro_name": "MODEM_ON_BOARD"
marcozecchini 0:9fca2b23d0ba 1690 },
marcozecchini 0:9fca2b23d0ba 1691 "modem_data_connection_type": {
marcozecchini 0:9fca2b23d0ba 1692 "help": "Value: Defines how an on-board modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
marcozecchini 0:9fca2b23d0ba 1693 "value": 1,
marcozecchini 0:9fca2b23d0ba 1694 "macro_name": "MODEM_ON_BOARD_UART"
marcozecchini 0:9fca2b23d0ba 1695 }
marcozecchini 0:9fca2b23d0ba 1696 },
marcozecchini 0:9fca2b23d0ba 1697 "macros_add": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000", "RTC_LSI=1"],
marcozecchini 0:9fca2b23d0ba 1698 "post_binary_hook": {
marcozecchini 0:9fca2b23d0ba 1699 "function": "MTSCode.combine_bins_mts_dragonfly",
marcozecchini 0:9fca2b23d0ba 1700 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
marcozecchini 0:9fca2b23d0ba 1701 },
marcozecchini 0:9fca2b23d0ba 1702 "device_has_add": [],
marcozecchini 0:9fca2b23d0ba 1703 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 1704 "device_name": "STM32F411RE"
marcozecchini 0:9fca2b23d0ba 1705 },
marcozecchini 0:9fca2b23d0ba 1706 "XDOT_L151CC": {
marcozecchini 0:9fca2b23d0ba 1707 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1708 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 1709 "default_toolchain": "ARM",
marcozecchini 0:9fca2b23d0ba 1710 "extra_labels_add": ["STM32L1", "STM32L151CC"],
marcozecchini 0:9fca2b23d0ba 1711 "config": {
marcozecchini 0:9fca2b23d0ba 1712 "hse_value": {
marcozecchini 0:9fca2b23d0ba 1713 "value": "24000000",
marcozecchini 0:9fca2b23d0ba 1714 "macro_name": "HSE_VALUE"
marcozecchini 0:9fca2b23d0ba 1715 }
marcozecchini 0:9fca2b23d0ba 1716 },
marcozecchini 0:9fca2b23d0ba 1717 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 1718 "device_has_add": ["ANALOGOUT", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1719 "release_versions": ["5"],
marcozecchini 0:9fca2b23d0ba 1720 "device_name": "STM32L151CC",
marcozecchini 0:9fca2b23d0ba 1721 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 1722 },
marcozecchini 0:9fca2b23d0ba 1723 "FF1705_L151CC": {
marcozecchini 0:9fca2b23d0ba 1724 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1725 "inherits": ["XDOT_L151CC"],
marcozecchini 0:9fca2b23d0ba 1726 "detect_code": ["8080"]
marcozecchini 0:9fca2b23d0ba 1727 },
marcozecchini 0:9fca2b23d0ba 1728 "MOTE_L152RC": {
marcozecchini 0:9fca2b23d0ba 1729 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1730 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 1731 "default_toolchain": "uARM",
marcozecchini 0:9fca2b23d0ba 1732 "extra_labels_add": ["STM32L1", "STM32L152RC"],
marcozecchini 0:9fca2b23d0ba 1733 "macros": ["RTC_LSI=1"],
marcozecchini 0:9fca2b23d0ba 1734 "detect_code": ["4100"],
marcozecchini 0:9fca2b23d0ba 1735 "device_has_add": ["ANALOGOUT"],
marcozecchini 0:9fca2b23d0ba 1736 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 1737 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 1738 "device_name": "STM32L152RC"
marcozecchini 0:9fca2b23d0ba 1739 },
marcozecchini 0:9fca2b23d0ba 1740 "DISCO_F401VC": {
marcozecchini 0:9fca2b23d0ba 1741 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1742 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1743 "default_toolchain": "GCC_ARM",
marcozecchini 0:9fca2b23d0ba 1744 "extra_labels_add": ["STM32F4", "STM32F401", "STM32F401xC", "STM32F401VC"],
marcozecchini 0:9fca2b23d0ba 1745 "supported_toolchains": ["GCC_ARM"],
marcozecchini 0:9fca2b23d0ba 1746 "device_has_add": [],
marcozecchini 0:9fca2b23d0ba 1747 "device_name": "STM32F401VC"
marcozecchini 0:9fca2b23d0ba 1748 },
marcozecchini 0:9fca2b23d0ba 1749 "MODULE_UBLOX_ODIN_W2": {
marcozecchini 0:9fca2b23d0ba 1750 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1751 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1752 "extra_labels_add": ["STM32F4", "STM32F439", "STM32F439ZI","STM32F439xx", "STM32F439xI"],
marcozecchini 0:9fca2b23d0ba 1753 "macros": ["MBEDTLS_CONFIG_HW_SUPPORT", "HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED","MBEDTLS_ARC4_C","MBEDTLS_DES_C","MBEDTLS_MD4_C","MBEDTLS_MD5_C","MBEDTLS_SHA1_C"],
marcozecchini 0:9fca2b23d0ba 1754 "device_has_add": ["CAN", "EMAC", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1755 "device_has_remove": ["RTC", "SLEEP"],
marcozecchini 0:9fca2b23d0ba 1756 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 1757 "device_name": "STM32F439ZI",
marcozecchini 0:9fca2b23d0ba 1758 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 1759 },
marcozecchini 0:9fca2b23d0ba 1760 "UBLOX_EVK_ODIN_W2": {
marcozecchini 0:9fca2b23d0ba 1761 "inherits": ["MODULE_UBLOX_ODIN_W2"],
marcozecchini 0:9fca2b23d0ba 1762 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1763 "release_versions": ["5"],
marcozecchini 0:9fca2b23d0ba 1764 "config": {
marcozecchini 0:9fca2b23d0ba 1765 "usb_tx": {
marcozecchini 0:9fca2b23d0ba 1766 "help": "Value: D8(default) or D1",
marcozecchini 0:9fca2b23d0ba 1767 "value": "D8"
marcozecchini 0:9fca2b23d0ba 1768 },
marcozecchini 0:9fca2b23d0ba 1769 "usb_rx": {
marcozecchini 0:9fca2b23d0ba 1770 "help": "Value: D2(default) or D0",
marcozecchini 0:9fca2b23d0ba 1771 "value": "D2"
marcozecchini 0:9fca2b23d0ba 1772 },
marcozecchini 0:9fca2b23d0ba 1773 "stdio_uart": {
marcozecchini 0:9fca2b23d0ba 1774 "help": "Value: UART_1(default) or UART_3",
marcozecchini 0:9fca2b23d0ba 1775 "value": "UART_1",
marcozecchini 0:9fca2b23d0ba 1776 "macro_name": "STDIO_UART"
marcozecchini 0:9fca2b23d0ba 1777 }
marcozecchini 0:9fca2b23d0ba 1778 }
marcozecchini 0:9fca2b23d0ba 1779 },
marcozecchini 0:9fca2b23d0ba 1780 "MBED_CONNECT_ODIN": {
marcozecchini 0:9fca2b23d0ba 1781 "inherits": ["MODULE_UBLOX_ODIN_W2"],
marcozecchini 0:9fca2b23d0ba 1782 "release_versions": ["5"],
marcozecchini 0:9fca2b23d0ba 1783 "config": {
marcozecchini 0:9fca2b23d0ba 1784 "usb_tx": {
marcozecchini 0:9fca2b23d0ba 1785 "help": "Value: PA_9(default) or PD_8",
marcozecchini 0:9fca2b23d0ba 1786 "value": "PA_9"
marcozecchini 0:9fca2b23d0ba 1787 },
marcozecchini 0:9fca2b23d0ba 1788 "usb_rx": {
marcozecchini 0:9fca2b23d0ba 1789 "help": "Value: PA_10(default) or PD_9",
marcozecchini 0:9fca2b23d0ba 1790 "value": "PA_10"
marcozecchini 0:9fca2b23d0ba 1791 },
marcozecchini 0:9fca2b23d0ba 1792 "stdio_uart": {
marcozecchini 0:9fca2b23d0ba 1793 "help": "Value: UART_1(default) or UART_3",
marcozecchini 0:9fca2b23d0ba 1794 "value": "UART_1",
marcozecchini 0:9fca2b23d0ba 1795 "macro_name": "STDIO_UART"
marcozecchini 0:9fca2b23d0ba 1796 }
marcozecchini 0:9fca2b23d0ba 1797 }
marcozecchini 0:9fca2b23d0ba 1798 },
marcozecchini 0:9fca2b23d0ba 1799 "UBLOX_C030": {
marcozecchini 0:9fca2b23d0ba 1800 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1801 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1802 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 1803 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 1804 "extra_labels_add": ["STM32F4", "STM32F437", "STM32F437VG", "STM32F437xx", "STM32F437xG"],
marcozecchini 0:9fca2b23d0ba 1805 "config": {
marcozecchini 0:9fca2b23d0ba 1806 "modem_is_on_board": {
marcozecchini 0:9fca2b23d0ba 1807 "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
marcozecchini 0:9fca2b23d0ba 1808 "value": 1,
marcozecchini 0:9fca2b23d0ba 1809 "macro_name": "MODEM_ON_BOARD"
marcozecchini 0:9fca2b23d0ba 1810 },
marcozecchini 0:9fca2b23d0ba 1811 "modem_data_connection_type": {
marcozecchini 0:9fca2b23d0ba 1812 "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
marcozecchini 0:9fca2b23d0ba 1813 "value": 1,
marcozecchini 0:9fca2b23d0ba 1814 "macro_name": "MODEM_ON_BOARD_UART"
marcozecchini 0:9fca2b23d0ba 1815 }
marcozecchini 0:9fca2b23d0ba 1816 },
marcozecchini 0:9fca2b23d0ba 1817 "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "RTC_LSI=1", "HSE_VALUE=12000000", "GNSSBAUD=9600"],
marcozecchini 0:9fca2b23d0ba 1818 "device_has_add": ["ANALOGOUT", "SERIAL_FC", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 1819 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 1820 "public": false,
marcozecchini 0:9fca2b23d0ba 1821 "device_name": "STM32F437VG",
marcozecchini 0:9fca2b23d0ba 1822 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 1823 },
marcozecchini 0:9fca2b23d0ba 1824 "UBLOX_C030_U201": {
marcozecchini 0:9fca2b23d0ba 1825 "inherits": ["UBLOX_C030"],
marcozecchini 0:9fca2b23d0ba 1826 "release_versions": ["5"]
marcozecchini 0:9fca2b23d0ba 1827 },
marcozecchini 0:9fca2b23d0ba 1828 "UBLOX_C030_N211": {
marcozecchini 0:9fca2b23d0ba 1829 "inherits": ["UBLOX_C030"],
marcozecchini 0:9fca2b23d0ba 1830 "release_versions": ["5"]
marcozecchini 0:9fca2b23d0ba 1831 },
marcozecchini 0:9fca2b23d0ba 1832 "NZ32_SC151": {
marcozecchini 0:9fca2b23d0ba 1833 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 1834 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 1835 "default_toolchain": "uARM",
marcozecchini 0:9fca2b23d0ba 1836 "program_cycle_s": 1.5,
marcozecchini 0:9fca2b23d0ba 1837 "extra_labels_add": ["STM32L1", "STM32L151RC"],
marcozecchini 0:9fca2b23d0ba 1838 "macros": ["RTC_LSI=1"],
marcozecchini 0:9fca2b23d0ba 1839 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
marcozecchini 0:9fca2b23d0ba 1840 "device_has_add": ["ANALOGOUT"],
marcozecchini 0:9fca2b23d0ba 1841 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 1842 "device_name": "STM32L151RC"
marcozecchini 0:9fca2b23d0ba 1843 },
marcozecchini 0:9fca2b23d0ba 1844 "MCU_NRF51": {
marcozecchini 0:9fca2b23d0ba 1845 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 1846 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 1847 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
marcozecchini 0:9fca2b23d0ba 1848 "macros": ["NRF51", "TARGET_NRF51822", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
marcozecchini 0:9fca2b23d0ba 1849 "MERGE_BOOTLOADER": false,
marcozecchini 0:9fca2b23d0ba 1850 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822"],
marcozecchini 0:9fca2b23d0ba 1851 "OUTPUT_EXT": "hex",
marcozecchini 0:9fca2b23d0ba 1852 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 1853 "supported_toolchains": ["ARM", "GCC_ARM"],
marcozecchini 0:9fca2b23d0ba 1854 "public": false,
marcozecchini 0:9fca2b23d0ba 1855 "MERGE_SOFT_DEVICE": true,
marcozecchini 0:9fca2b23d0ba 1856 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
marcozecchini 0:9fca2b23d0ba 1857 {
marcozecchini 0:9fca2b23d0ba 1858 "boot": "s130_nrf51_1.0.0_bootloader.hex",
marcozecchini 0:9fca2b23d0ba 1859 "name": "s130_nrf51_1.0.0_softdevice.hex",
marcozecchini 0:9fca2b23d0ba 1860 "offset": 114688
marcozecchini 0:9fca2b23d0ba 1861 },
marcozecchini 0:9fca2b23d0ba 1862 {
marcozecchini 0:9fca2b23d0ba 1863 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
marcozecchini 0:9fca2b23d0ba 1864 "name": "s110_nrf51822_8.0.0_softdevice.hex",
marcozecchini 0:9fca2b23d0ba 1865 "offset": 98304
marcozecchini 0:9fca2b23d0ba 1866 },
marcozecchini 0:9fca2b23d0ba 1867 {
marcozecchini 0:9fca2b23d0ba 1868 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
marcozecchini 0:9fca2b23d0ba 1869 "name": "s110_nrf51822_7.1.0_softdevice.hex",
marcozecchini 0:9fca2b23d0ba 1870 "offset": 90112
marcozecchini 0:9fca2b23d0ba 1871 },
marcozecchini 0:9fca2b23d0ba 1872 {
marcozecchini 0:9fca2b23d0ba 1873 "boot": "s110_nrf51822_7.0.0_bootloader.hex",
marcozecchini 0:9fca2b23d0ba 1874 "name": "s110_nrf51822_7.0.0_softdevice.hex",
marcozecchini 0:9fca2b23d0ba 1875 "offset": 90112
marcozecchini 0:9fca2b23d0ba 1876 },
marcozecchini 0:9fca2b23d0ba 1877 {
marcozecchini 0:9fca2b23d0ba 1878 "boot": "s110_nrf51822_6.0.0_bootloader.hex",
marcozecchini 0:9fca2b23d0ba 1879 "name": "s110_nrf51822_6.0.0_softdevice.hex",
marcozecchini 0:9fca2b23d0ba 1880 "offset": 81920
marcozecchini 0:9fca2b23d0ba 1881 }
marcozecchini 0:9fca2b23d0ba 1882 ],
marcozecchini 0:9fca2b23d0ba 1883 "detect_code": ["1070"],
marcozecchini 0:9fca2b23d0ba 1884 "post_binary_hook": {
marcozecchini 0:9fca2b23d0ba 1885 "function": "MCU_NRF51Code.binary_hook",
marcozecchini 0:9fca2b23d0ba 1886 "toolchains": ["ARM_STD", "GCC_ARM"]
marcozecchini 0:9fca2b23d0ba 1887 },
marcozecchini 0:9fca2b23d0ba 1888 "program_cycle_s": 6,
marcozecchini 0:9fca2b23d0ba 1889 "features": ["BLE"],
marcozecchini 0:9fca2b23d0ba 1890 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
marcozecchini 0:9fca2b23d0ba 1891 },
marcozecchini 0:9fca2b23d0ba 1892 "MCU_NRF51_16K_BASE": {
marcozecchini 0:9fca2b23d0ba 1893 "inherits": ["MCU_NRF51"],
marcozecchini 0:9fca2b23d0ba 1894 "extra_labels_add": ["MCU_NORDIC_16K", "MCU_NRF51_16K"],
marcozecchini 0:9fca2b23d0ba 1895 "macros_add": ["TARGET_MCU_NORDIC_16K", "TARGET_MCU_NRF51_16K"],
marcozecchini 0:9fca2b23d0ba 1896 "public": false,
marcozecchini 0:9fca2b23d0ba 1897 "default_lib": "small"
marcozecchini 0:9fca2b23d0ba 1898 },
marcozecchini 0:9fca2b23d0ba 1899 "MCU_NRF51_16K_BOOT_BASE": {
marcozecchini 0:9fca2b23d0ba 1900 "inherits": ["MCU_NRF51_16K_BASE"],
marcozecchini 0:9fca2b23d0ba 1901 "MERGE_BOOTLOADER": true,
marcozecchini 0:9fca2b23d0ba 1902 "extra_labels_add": ["MCU_NRF51_16K_BOOT"],
marcozecchini 0:9fca2b23d0ba 1903 "macros_add": ["TARGET_MCU_NRF51_16K_BOOT", "TARGET_OTA_ENABLED"],
marcozecchini 0:9fca2b23d0ba 1904 "public": false
marcozecchini 0:9fca2b23d0ba 1905 },
marcozecchini 0:9fca2b23d0ba 1906 "MCU_NRF51_16K_OTA_BASE": {
marcozecchini 0:9fca2b23d0ba 1907 "inherits": ["MCU_NRF51_16K_BASE"],
marcozecchini 0:9fca2b23d0ba 1908 "public": false,
marcozecchini 0:9fca2b23d0ba 1909 "extra_labels_add": ["MCU_NRF51_16K_OTA"],
marcozecchini 0:9fca2b23d0ba 1910 "macros_add": ["TARGET_MCU_NRF51_16K_OTA", "TARGET_OTA_ENABLED"],
marcozecchini 0:9fca2b23d0ba 1911 "MERGE_SOFT_DEVICE": false
marcozecchini 0:9fca2b23d0ba 1912 },
marcozecchini 0:9fca2b23d0ba 1913 "MCU_NRF51_16K": {
marcozecchini 0:9fca2b23d0ba 1914 "inherits": ["MCU_NRF51_16K_BASE"],
marcozecchini 0:9fca2b23d0ba 1915 "extra_labels_add": ["MCU_NRF51_16K_S130"],
marcozecchini 0:9fca2b23d0ba 1916 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
marcozecchini 0:9fca2b23d0ba 1917 "public": false
marcozecchini 0:9fca2b23d0ba 1918 },
marcozecchini 0:9fca2b23d0ba 1919 "MCU_NRF51_S110": {
marcozecchini 0:9fca2b23d0ba 1920 "extra_labels_add": ["MCU_NRF51_16K_S110"],
marcozecchini 0:9fca2b23d0ba 1921 "macros_add": ["TARGET_MCU_NRF51_16K_S110"],
marcozecchini 0:9fca2b23d0ba 1922 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
marcozecchini 0:9fca2b23d0ba 1923 {
marcozecchini 0:9fca2b23d0ba 1924 "name": "s110_nrf51822_8.0.0_softdevice.hex",
marcozecchini 0:9fca2b23d0ba 1925 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
marcozecchini 0:9fca2b23d0ba 1926 "offset": 98304
marcozecchini 0:9fca2b23d0ba 1927 },
marcozecchini 0:9fca2b23d0ba 1928 {
marcozecchini 0:9fca2b23d0ba 1929 "name": "s110_nrf51822_7.1.0_softdevice.hex",
marcozecchini 0:9fca2b23d0ba 1930 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
marcozecchini 0:9fca2b23d0ba 1931 "offset": 90112
marcozecchini 0:9fca2b23d0ba 1932 }
marcozecchini 0:9fca2b23d0ba 1933 ],
marcozecchini 0:9fca2b23d0ba 1934 "public": false
marcozecchini 0:9fca2b23d0ba 1935 },
marcozecchini 0:9fca2b23d0ba 1936 "MCU_NRF51_16K_S110": {
marcozecchini 0:9fca2b23d0ba 1937 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BASE"],
marcozecchini 0:9fca2b23d0ba 1938 "public": false
marcozecchini 0:9fca2b23d0ba 1939 },
marcozecchini 0:9fca2b23d0ba 1940 "MCU_NRF51_16K_BOOT": {
marcozecchini 0:9fca2b23d0ba 1941 "inherits": ["MCU_NRF51_16K_BOOT_BASE"],
marcozecchini 0:9fca2b23d0ba 1942 "extra_labels_add": ["MCU_NRF51_16K_S130"],
marcozecchini 0:9fca2b23d0ba 1943 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
marcozecchini 0:9fca2b23d0ba 1944 "public": false
marcozecchini 0:9fca2b23d0ba 1945 },
marcozecchini 0:9fca2b23d0ba 1946 "MCU_NRF51_16K_BOOT_S110": {
marcozecchini 0:9fca2b23d0ba 1947 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BOOT_BASE"],
marcozecchini 0:9fca2b23d0ba 1948 "public": false
marcozecchini 0:9fca2b23d0ba 1949 },
marcozecchini 0:9fca2b23d0ba 1950 "MCU_NRF51_16K_OTA": {
marcozecchini 0:9fca2b23d0ba 1951 "inherits": ["MCU_NRF51_16K_OTA_BASE"],
marcozecchini 0:9fca2b23d0ba 1952 "extra_labels_add": ["MCU_NRF51_16K_S130"],
marcozecchini 0:9fca2b23d0ba 1953 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
marcozecchini 0:9fca2b23d0ba 1954 "public": false
marcozecchini 0:9fca2b23d0ba 1955 },
marcozecchini 0:9fca2b23d0ba 1956 "MCU_NRF51_16K_OTA_S110": {
marcozecchini 0:9fca2b23d0ba 1957 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_OTA_BASE"],
marcozecchini 0:9fca2b23d0ba 1958 "public": false
marcozecchini 0:9fca2b23d0ba 1959 },
marcozecchini 0:9fca2b23d0ba 1960 "MCU_NRF51_32K": {
marcozecchini 0:9fca2b23d0ba 1961 "inherits": ["MCU_NRF51"],
marcozecchini 0:9fca2b23d0ba 1962 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
marcozecchini 0:9fca2b23d0ba 1963 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
marcozecchini 0:9fca2b23d0ba 1964 "public": false
marcozecchini 0:9fca2b23d0ba 1965 },
marcozecchini 0:9fca2b23d0ba 1966 "MCU_NRF51_32K_BOOT": {
marcozecchini 0:9fca2b23d0ba 1967 "inherits": ["MCU_NRF51_32K"],
marcozecchini 0:9fca2b23d0ba 1968 "MERGE_BOOTLOADER": true,
marcozecchini 0:9fca2b23d0ba 1969 "extra_labels_add": ["MCU_NRF51_32K_BOOT"],
marcozecchini 0:9fca2b23d0ba 1970 "macros_add": ["TARGET_MCU_NRF51_32K_BOOT", "TARGET_OTA_ENABLED"],
marcozecchini 0:9fca2b23d0ba 1971 "public": false
marcozecchini 0:9fca2b23d0ba 1972 },
marcozecchini 0:9fca2b23d0ba 1973 "MCU_NRF51_32K_OTA": {
marcozecchini 0:9fca2b23d0ba 1974 "inherits": ["MCU_NRF51_32K"],
marcozecchini 0:9fca2b23d0ba 1975 "public": false,
marcozecchini 0:9fca2b23d0ba 1976 "extra_labels_add": ["MCU_NRF51_32K_OTA"],
marcozecchini 0:9fca2b23d0ba 1977 "macros_add": ["TARGET_MCU_NRF51_32K_OTA", "TARGET_OTA_ENABLED"],
marcozecchini 0:9fca2b23d0ba 1978 "MERGE_SOFT_DEVICE": false
marcozecchini 0:9fca2b23d0ba 1979 },
marcozecchini 0:9fca2b23d0ba 1980 "NRF51822": {
marcozecchini 0:9fca2b23d0ba 1981 "inherits": ["MCU_NRF51_16K"],
marcozecchini 0:9fca2b23d0ba 1982 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
marcozecchini 0:9fca2b23d0ba 1983 "macros_add": ["TARGET_NRF51822_MKIT"],
marcozecchini 0:9fca2b23d0ba 1984 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 1985 "device_name": "nRF51822_xxAA"
marcozecchini 0:9fca2b23d0ba 1986 },
marcozecchini 0:9fca2b23d0ba 1987 "NRF51822_BOOT": {
marcozecchini 0:9fca2b23d0ba 1988 "inherits": ["MCU_NRF51_16K_BOOT"],
marcozecchini 0:9fca2b23d0ba 1989 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
marcozecchini 0:9fca2b23d0ba 1990 "macros_add": ["TARGET_NRF51822_MKIT"]
marcozecchini 0:9fca2b23d0ba 1991 },
marcozecchini 0:9fca2b23d0ba 1992 "NRF51822_OTA": {
marcozecchini 0:9fca2b23d0ba 1993 "inherits": ["MCU_NRF51_16K_OTA"],
marcozecchini 0:9fca2b23d0ba 1994 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
marcozecchini 0:9fca2b23d0ba 1995 "macros_add": ["TARGET_NRF51822_MKIT"]
marcozecchini 0:9fca2b23d0ba 1996 },
marcozecchini 0:9fca2b23d0ba 1997 "ARCH_BLE": {
marcozecchini 0:9fca2b23d0ba 1998 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 1999 "inherits": ["MCU_NRF51_16K"],
marcozecchini 0:9fca2b23d0ba 2000 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 2001 "device_name": "nRF51822_xxAA"
marcozecchini 0:9fca2b23d0ba 2002 },
marcozecchini 0:9fca2b23d0ba 2003 "ARCH_BLE_BOOT": {
marcozecchini 0:9fca2b23d0ba 2004 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 2005 "inherits": ["MCU_NRF51_16K_BOOT"],
marcozecchini 0:9fca2b23d0ba 2006 "extra_labels_add": ["ARCH_BLE"],
marcozecchini 0:9fca2b23d0ba 2007 "macros_add": ["TARGET_ARCH_BLE"]
marcozecchini 0:9fca2b23d0ba 2008 },
marcozecchini 0:9fca2b23d0ba 2009 "ARCH_BLE_OTA": {
marcozecchini 0:9fca2b23d0ba 2010 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 2011 "inherits": ["MCU_NRF51_16K_OTA"],
marcozecchini 0:9fca2b23d0ba 2012 "extra_labels_add": ["ARCH_BLE"],
marcozecchini 0:9fca2b23d0ba 2013 "macros_add": ["TARGET_ARCH_BLE"]
marcozecchini 0:9fca2b23d0ba 2014 },
marcozecchini 0:9fca2b23d0ba 2015 "ARCH_LINK": {
marcozecchini 0:9fca2b23d0ba 2016 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 2017 "inherits": ["MCU_NRF51_16K"],
marcozecchini 0:9fca2b23d0ba 2018 "extra_labels_add": ["ARCH_BLE"],
marcozecchini 0:9fca2b23d0ba 2019 "macros_add": ["TARGET_ARCH_BLE"]
marcozecchini 0:9fca2b23d0ba 2020 },
marcozecchini 0:9fca2b23d0ba 2021 "ARCH_LINK_BOOT": {
marcozecchini 0:9fca2b23d0ba 2022 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 2023 "inherits": ["MCU_NRF51_16K_BOOT"],
marcozecchini 0:9fca2b23d0ba 2024 "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
marcozecchini 0:9fca2b23d0ba 2025 "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
marcozecchini 0:9fca2b23d0ba 2026 },
marcozecchini 0:9fca2b23d0ba 2027 "ARCH_LINK_OTA": {
marcozecchini 0:9fca2b23d0ba 2028 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 2029 "inherits": ["MCU_NRF51_16K_OTA"],
marcozecchini 0:9fca2b23d0ba 2030 "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
marcozecchini 0:9fca2b23d0ba 2031 "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
marcozecchini 0:9fca2b23d0ba 2032 },
marcozecchini 0:9fca2b23d0ba 2033 "SEEED_TINY_BLE": {
marcozecchini 0:9fca2b23d0ba 2034 "inherits": ["MCU_NRF51_16K"],
marcozecchini 0:9fca2b23d0ba 2035 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 2036 "device_name": "nRF51822_xxAA"
marcozecchini 0:9fca2b23d0ba 2037 },
marcozecchini 0:9fca2b23d0ba 2038 "SEEED_TINY_BLE_BOOT": {
marcozecchini 0:9fca2b23d0ba 2039 "inherits": ["MCU_NRF51_16K_BOOT"],
marcozecchini 0:9fca2b23d0ba 2040 "extra_labels_add": ["SEEED_TINY_BLE"],
marcozecchini 0:9fca2b23d0ba 2041 "macros_add": ["TARGET_SEEED_TINY_BLE"]
marcozecchini 0:9fca2b23d0ba 2042 },
marcozecchini 0:9fca2b23d0ba 2043 "SEEED_TINY_BLE_OTA": {
marcozecchini 0:9fca2b23d0ba 2044 "inherits": ["MCU_NRF51_16K_OTA"],
marcozecchini 0:9fca2b23d0ba 2045 "extra_labels_add": ["SEEED_TINY_BLE"],
marcozecchini 0:9fca2b23d0ba 2046 "macros_add": ["TARGET_SEEED_TINY_BLE"]
marcozecchini 0:9fca2b23d0ba 2047 },
marcozecchini 0:9fca2b23d0ba 2048 "HRM1017": {
marcozecchini 0:9fca2b23d0ba 2049 "inherits": ["MCU_NRF51_16K"],
marcozecchini 0:9fca2b23d0ba 2050 "macros_add": ["TARGET_NRF_LFCLK_RC"],
marcozecchini 0:9fca2b23d0ba 2051 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 2052 "device_name": "nRF51822_xxAA"
marcozecchini 0:9fca2b23d0ba 2053 },
marcozecchini 0:9fca2b23d0ba 2054 "HRM1017_BOOT": {
marcozecchini 0:9fca2b23d0ba 2055 "inherits": ["MCU_NRF51_16K_BOOT"],
marcozecchini 0:9fca2b23d0ba 2056 "extra_labels_add": ["HRM1017"],
marcozecchini 0:9fca2b23d0ba 2057 "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
marcozecchini 0:9fca2b23d0ba 2058 },
marcozecchini 0:9fca2b23d0ba 2059 "HRM1017_OTA": {
marcozecchini 0:9fca2b23d0ba 2060 "inherits": ["MCU_NRF51_16K_OTA"],
marcozecchini 0:9fca2b23d0ba 2061 "extra_labels_add": ["HRM1017"],
marcozecchini 0:9fca2b23d0ba 2062 "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
marcozecchini 0:9fca2b23d0ba 2063 },
marcozecchini 0:9fca2b23d0ba 2064 "RBLAB_NRF51822": {
marcozecchini 0:9fca2b23d0ba 2065 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 2066 "inherits": ["MCU_NRF51_16K"],
marcozecchini 0:9fca2b23d0ba 2067 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 2068 "device_name": "nRF51822_xxAA"
marcozecchini 0:9fca2b23d0ba 2069 },
marcozecchini 0:9fca2b23d0ba 2070 "RBLAB_NRF51822_BOOT": {
marcozecchini 0:9fca2b23d0ba 2071 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 2072 "inherits": ["MCU_NRF51_16K_BOOT"],
marcozecchini 0:9fca2b23d0ba 2073 "extra_labels_add": ["RBLAB_NRF51822"],
marcozecchini 0:9fca2b23d0ba 2074 "macros_add": ["TARGET_RBLAB_NRF51822"]
marcozecchini 0:9fca2b23d0ba 2075 },
marcozecchini 0:9fca2b23d0ba 2076 "RBLAB_NRF51822_OTA": {
marcozecchini 0:9fca2b23d0ba 2077 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 2078 "inherits": ["MCU_NRF51_16K_OTA"],
marcozecchini 0:9fca2b23d0ba 2079 "extra_labels_add": ["RBLAB_NRF51822"],
marcozecchini 0:9fca2b23d0ba 2080 "macros_add": ["TARGET_RBLAB_NRF51822"]
marcozecchini 0:9fca2b23d0ba 2081 },
marcozecchini 0:9fca2b23d0ba 2082 "RBLAB_BLENANO": {
marcozecchini 0:9fca2b23d0ba 2083 "inherits": ["MCU_NRF51_16K"],
marcozecchini 0:9fca2b23d0ba 2084 "release_versions": ["2"]
marcozecchini 0:9fca2b23d0ba 2085 },
marcozecchini 0:9fca2b23d0ba 2086 "RBLAB_BLENANO_BOOT": {
marcozecchini 0:9fca2b23d0ba 2087 "inherits": ["MCU_NRF51_16K_BOOT"],
marcozecchini 0:9fca2b23d0ba 2088 "extra_labels_add": ["RBLAB_BLENANO"],
marcozecchini 0:9fca2b23d0ba 2089 "macros_add": ["TARGET_RBLAB_BLENANO"]
marcozecchini 0:9fca2b23d0ba 2090 },
marcozecchini 0:9fca2b23d0ba 2091 "RBLAB_BLENANO_OTA": {
marcozecchini 0:9fca2b23d0ba 2092 "inherits": ["MCU_NRF51_16K_OTA"],
marcozecchini 0:9fca2b23d0ba 2093 "extra_labels_add": ["RBLAB_BLENANO"],
marcozecchini 0:9fca2b23d0ba 2094 "macros_add": ["TARGET_RBLAB_BLENANO"]
marcozecchini 0:9fca2b23d0ba 2095 },
marcozecchini 0:9fca2b23d0ba 2096 "RBLAB_BLENANO2": {
marcozecchini 0:9fca2b23d0ba 2097 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 2098 "inherits": ["MCU_NRF52"],
marcozecchini 0:9fca2b23d0ba 2099 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
marcozecchini 0:9fca2b23d0ba 2100 "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
marcozecchini 0:9fca2b23d0ba 2101 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 2102 "overrides": {"uart_hwfc": 0},
marcozecchini 0:9fca2b23d0ba 2103 "device_name": "nRF52832_xxAA"
marcozecchini 0:9fca2b23d0ba 2104 },
marcozecchini 0:9fca2b23d0ba 2105 "NRF51822_Y5_MBUG": {
marcozecchini 0:9fca2b23d0ba 2106 "inherits": ["MCU_NRF51_16K"]
marcozecchini 0:9fca2b23d0ba 2107 },
marcozecchini 0:9fca2b23d0ba 2108 "WALLBOT_BLE": {
marcozecchini 0:9fca2b23d0ba 2109 "inherits": ["MCU_NRF51_16K"],
marcozecchini 0:9fca2b23d0ba 2110 "release_versions": ["2"]
marcozecchini 0:9fca2b23d0ba 2111 },
marcozecchini 0:9fca2b23d0ba 2112 "WALLBOT_BLE_BOOT": {
marcozecchini 0:9fca2b23d0ba 2113 "inherits": ["MCU_NRF51_16K_BOOT"],
marcozecchini 0:9fca2b23d0ba 2114 "extra_labels_add": ["WALLBOT_BLE"],
marcozecchini 0:9fca2b23d0ba 2115 "macros_add": ["TARGET_WALLBOT_BLE"]
marcozecchini 0:9fca2b23d0ba 2116 },
marcozecchini 0:9fca2b23d0ba 2117 "WALLBOT_BLE_OTA": {
marcozecchini 0:9fca2b23d0ba 2118 "inherits": ["MCU_NRF51_16K_OTA"],
marcozecchini 0:9fca2b23d0ba 2119 "extra_labels_add": ["WALLBOT_BLE"],
marcozecchini 0:9fca2b23d0ba 2120 "macros_add": ["TARGET_WALLBOT_BLE"]
marcozecchini 0:9fca2b23d0ba 2121 },
marcozecchini 0:9fca2b23d0ba 2122 "DELTA_DFCM_NNN40": {
marcozecchini 0:9fca2b23d0ba 2123 "inherits": ["MCU_NRF51_32K"],
marcozecchini 0:9fca2b23d0ba 2124 "program_cycle_s": 10,
marcozecchini 0:9fca2b23d0ba 2125 "macros_add": ["TARGET_NRF_LFCLK_RC"],
marcozecchini 0:9fca2b23d0ba 2126 "device_has": ["ANALOGIN", "DEBUG_AWARENESS", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
marcozecchini 0:9fca2b23d0ba 2127 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 2128 "device_name": "nRF51822_xxAA"
marcozecchini 0:9fca2b23d0ba 2129 },
marcozecchini 0:9fca2b23d0ba 2130 "DELTA_DFCM_NNN40_BOOT": {
marcozecchini 0:9fca2b23d0ba 2131 "inherits": ["MCU_NRF51_32K_BOOT"],
marcozecchini 0:9fca2b23d0ba 2132 "program_cycle_s": 10,
marcozecchini 0:9fca2b23d0ba 2133 "extra_labels_add": ["DELTA_DFCM_NNN40"],
marcozecchini 0:9fca2b23d0ba 2134 "macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
marcozecchini 0:9fca2b23d0ba 2135 },
marcozecchini 0:9fca2b23d0ba 2136 "DELTA_DFCM_NNN40_OTA": {
marcozecchini 0:9fca2b23d0ba 2137 "inherits": ["MCU_NRF51_32K_OTA"],
marcozecchini 0:9fca2b23d0ba 2138 "program_cycle_s": 10,
marcozecchini 0:9fca2b23d0ba 2139 "extra_labels_add": ["DELTA_DFCM_NNN40"],
marcozecchini 0:9fca2b23d0ba 2140 "macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
marcozecchini 0:9fca2b23d0ba 2141 },
marcozecchini 0:9fca2b23d0ba 2142 "DELTA_DFCM_NNN50": {
marcozecchini 0:9fca2b23d0ba 2143 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 2144 "inherits": ["MCU_NRF51_32K_UNIFIED"],
marcozecchini 0:9fca2b23d0ba 2145 "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
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marcozecchini 0:9fca2b23d0ba 2339 "copy_method": "mps2",
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marcozecchini 0:9fca2b23d0ba 2363 },
marcozecchini 0:9fca2b23d0ba 2364 "VK_RZ_A1H": {
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marcozecchini 0:9fca2b23d0ba 2366 "core": "Cortex-A9",
marcozecchini 0:9fca2b23d0ba 2367 "extra_labels": ["RENESAS", "VKRZA1H"],
marcozecchini 0:9fca2b23d0ba 2368 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 2369 "default_toolchain": "ARM",
marcozecchini 0:9fca2b23d0ba 2370 "program_cycle_s": 2,
marcozecchini 0:9fca2b23d0ba 2371 "device_has": ["ANALOGIN", "CAN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 2372 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 2373 "default_lib": "std",
marcozecchini 0:9fca2b23d0ba 2374 "release_versions": ["2"]
marcozecchini 0:9fca2b23d0ba 2375 },
marcozecchini 0:9fca2b23d0ba 2376 "MAXWSNENV": {
marcozecchini 0:9fca2b23d0ba 2377 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 2378 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 2379 "macros": ["__SYSTEM_HFX=24000000"],
marcozecchini 0:9fca2b23d0ba 2380 "extra_labels": ["Maxim", "MAX32610"],
marcozecchini 0:9fca2b23d0ba 2381 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
marcozecchini 0:9fca2b23d0ba 2382 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 2383 "features": ["BLE"],
marcozecchini 0:9fca2b23d0ba 2384 "release_versions": ["2", "5"]
marcozecchini 0:9fca2b23d0ba 2385 },
marcozecchini 0:9fca2b23d0ba 2386 "MAX32600MBED": {
marcozecchini 0:9fca2b23d0ba 2387 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 2388 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 2389 "macros": ["__SYSTEM_HFX=24000000"],
marcozecchini 0:9fca2b23d0ba 2390 "extra_labels": ["Maxim", "MAX32600"],
marcozecchini 0:9fca2b23d0ba 2391 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
marcozecchini 0:9fca2b23d0ba 2392 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 2393 "release_versions": ["2", "5"]
marcozecchini 0:9fca2b23d0ba 2394 },
marcozecchini 0:9fca2b23d0ba 2395 "MAX32620HSP": {
marcozecchini 0:9fca2b23d0ba 2396 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 2397 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 2398 "extra_labels": ["Maxim", "MAX32620"],
marcozecchini 0:9fca2b23d0ba 2399 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
marcozecchini 0:9fca2b23d0ba 2400 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 2401 "features": ["BLE"],
marcozecchini 0:9fca2b23d0ba 2402 "release_versions": ["2", "5"]
marcozecchini 0:9fca2b23d0ba 2403 },
marcozecchini 0:9fca2b23d0ba 2404 "MAX32625MBED": {
marcozecchini 0:9fca2b23d0ba 2405 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 2406 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 2407 "macros": ["__SYSTEM_HFX=96000000","TARGET=MAX32625","TARGET_REV=0x4132"],
marcozecchini 0:9fca2b23d0ba 2408 "extra_labels": ["Maxim", "MAX32625"],
marcozecchini 0:9fca2b23d0ba 2409 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
marcozecchini 0:9fca2b23d0ba 2410 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 2411 "release_versions": ["2", "5"]
marcozecchini 0:9fca2b23d0ba 2412 },
marcozecchini 0:9fca2b23d0ba 2413 "MAX32625NEXPAQ": {
marcozecchini 0:9fca2b23d0ba 2414 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 2415 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 2416 "macros": ["__SYSTEM_HFX=96000000","TARGET=MAX32625","TARGET_REV=0x4132"],
marcozecchini 0:9fca2b23d0ba 2417 "extra_labels": ["Maxim", "MAX32625"],
marcozecchini 0:9fca2b23d0ba 2418 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
marcozecchini 0:9fca2b23d0ba 2419 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 2420 "release_versions": ["2", "5"]
marcozecchini 0:9fca2b23d0ba 2421 },
marcozecchini 0:9fca2b23d0ba 2422 "MAX32630FTHR": {
marcozecchini 0:9fca2b23d0ba 2423 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 2424 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 2425 "macros": ["__SYSTEM_HFX=96000000", "TARGET=MAX32630", "TARGET_REV=0x4132", "BLE_HCI_UART", "OPEN_DRAIN_LEDS"],
marcozecchini 0:9fca2b23d0ba 2426 "extra_labels": ["Maxim", "MAX32630"],
marcozecchini 0:9fca2b23d0ba 2427 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
marcozecchini 0:9fca2b23d0ba 2428 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 2429 "features": ["BLE"],
marcozecchini 0:9fca2b23d0ba 2430 "release_versions": ["2", "5"]
marcozecchini 0:9fca2b23d0ba 2431 },
marcozecchini 0:9fca2b23d0ba 2432 "EFM32": {
marcozecchini 0:9fca2b23d0ba 2433 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 2434 "extra_labels": ["Silicon_Labs", "EFM32"],
marcozecchini 0:9fca2b23d0ba 2435 "macros": ["MBEDTLS_CONFIG_HW_SUPPORT"],
marcozecchini 0:9fca2b23d0ba 2436 "public": false
marcozecchini 0:9fca2b23d0ba 2437 },
marcozecchini 0:9fca2b23d0ba 2438 "EFM32GG990F1024": {
marcozecchini 0:9fca2b23d0ba 2439 "inherits": ["EFM32"],
marcozecchini 0:9fca2b23d0ba 2440 "extra_labels_add": ["EFM32GG", "1024K", "SL_AES"],
marcozecchini 0:9fca2b23d0ba 2441 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 2442 "macros_add": ["EFM32GG990F1024", "TRANSACTION_QUEUE_SIZE_SPI=4"],
marcozecchini 0:9fca2b23d0ba 2443 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 2444 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 2445 "device_name": "EFM32GG990F1024",
marcozecchini 0:9fca2b23d0ba 2446 "public": false,
marcozecchini 0:9fca2b23d0ba 2447 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 2448 },
marcozecchini 0:9fca2b23d0ba 2449 "EFM32GG_STK3700": {
marcozecchini 0:9fca2b23d0ba 2450 "inherits": ["EFM32GG990F1024"],
marcozecchini 0:9fca2b23d0ba 2451 "progen": {"target": "efm32gg-stk"},
marcozecchini 0:9fca2b23d0ba 2452 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
marcozecchini 0:9fca2b23d0ba 2453 "forced_reset_timeout": 2,
marcozecchini 0:9fca2b23d0ba 2454 "config": {
marcozecchini 0:9fca2b23d0ba 2455 "hf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2456 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
marcozecchini 0:9fca2b23d0ba 2457 "value": "HFXO",
marcozecchini 0:9fca2b23d0ba 2458 "macro_name": "CORE_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2459 },
marcozecchini 0:9fca2b23d0ba 2460 "hfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2461 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2462 "value": "48000000",
marcozecchini 0:9fca2b23d0ba 2463 "macro_name": "HFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2464 },
marcozecchini 0:9fca2b23d0ba 2465 "lf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2466 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
marcozecchini 0:9fca2b23d0ba 2467 "value": "LFXO",
marcozecchini 0:9fca2b23d0ba 2468 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2469 },
marcozecchini 0:9fca2b23d0ba 2470 "lfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2471 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2472 "value": "32768",
marcozecchini 0:9fca2b23d0ba 2473 "macro_name": "LFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2474 },
marcozecchini 0:9fca2b23d0ba 2475 "hfrco_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2476 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
marcozecchini 0:9fca2b23d0ba 2477 "value": "21000000",
marcozecchini 0:9fca2b23d0ba 2478 "macro_name": "HFRCO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2479 },
marcozecchini 0:9fca2b23d0ba 2480 "hfrco_band_select": {
marcozecchini 0:9fca2b23d0ba 2481 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
marcozecchini 0:9fca2b23d0ba 2482 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
marcozecchini 0:9fca2b23d0ba 2483 "macro_name": "HFRCO_FREQUENCY_ENUM"
marcozecchini 0:9fca2b23d0ba 2484 },
marcozecchini 0:9fca2b23d0ba 2485 "board_controller_enable": {
marcozecchini 0:9fca2b23d0ba 2486 "help": "Pin to pull high for enabling the USB serial port",
marcozecchini 0:9fca2b23d0ba 2487 "value": "PF7",
marcozecchini 0:9fca2b23d0ba 2488 "macro_name": "EFM_BC_EN"
marcozecchini 0:9fca2b23d0ba 2489 }
marcozecchini 0:9fca2b23d0ba 2490 }
marcozecchini 0:9fca2b23d0ba 2491 },
marcozecchini 0:9fca2b23d0ba 2492 "EFM32LG990F256": {
marcozecchini 0:9fca2b23d0ba 2493 "inherits": ["EFM32"],
marcozecchini 0:9fca2b23d0ba 2494 "extra_labels_add": ["EFM32LG", "256K", "SL_AES"],
marcozecchini 0:9fca2b23d0ba 2495 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 2496 "macros_add": ["EFM32LG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
marcozecchini 0:9fca2b23d0ba 2497 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 2498 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 2499 "device_name": "EFM32LG990F256",
marcozecchini 0:9fca2b23d0ba 2500 "public": false,
marcozecchini 0:9fca2b23d0ba 2501 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 2502 },
marcozecchini 0:9fca2b23d0ba 2503 "EFM32LG_STK3600": {
marcozecchini 0:9fca2b23d0ba 2504 "inherits": ["EFM32LG990F256"],
marcozecchini 0:9fca2b23d0ba 2505 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
marcozecchini 0:9fca2b23d0ba 2506 "forced_reset_timeout": 2,
marcozecchini 0:9fca2b23d0ba 2507 "device_name": "EFM32LG990F256",
marcozecchini 0:9fca2b23d0ba 2508 "config": {
marcozecchini 0:9fca2b23d0ba 2509 "hf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2510 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
marcozecchini 0:9fca2b23d0ba 2511 "value": "HFXO",
marcozecchini 0:9fca2b23d0ba 2512 "macro_name": "CORE_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2513 },
marcozecchini 0:9fca2b23d0ba 2514 "hfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2515 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2516 "value": "48000000",
marcozecchini 0:9fca2b23d0ba 2517 "macro_name": "HFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2518 },
marcozecchini 0:9fca2b23d0ba 2519 "lf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2520 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
marcozecchini 0:9fca2b23d0ba 2521 "value": "LFXO",
marcozecchini 0:9fca2b23d0ba 2522 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2523 },
marcozecchini 0:9fca2b23d0ba 2524 "lfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2525 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2526 "value": "32768",
marcozecchini 0:9fca2b23d0ba 2527 "macro_name": "LFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2528 },
marcozecchini 0:9fca2b23d0ba 2529 "hfrco_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2530 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
marcozecchini 0:9fca2b23d0ba 2531 "value": "21000000",
marcozecchini 0:9fca2b23d0ba 2532 "macro_name": "HFRCO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2533 },
marcozecchini 0:9fca2b23d0ba 2534 "hfrco_band_select": {
marcozecchini 0:9fca2b23d0ba 2535 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
marcozecchini 0:9fca2b23d0ba 2536 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
marcozecchini 0:9fca2b23d0ba 2537 "macro_name": "HFRCO_FREQUENCY_ENUM"
marcozecchini 0:9fca2b23d0ba 2538 },
marcozecchini 0:9fca2b23d0ba 2539 "board_controller_enable": {
marcozecchini 0:9fca2b23d0ba 2540 "help": "Pin to pull high for enabling the USB serial port",
marcozecchini 0:9fca2b23d0ba 2541 "value": "PF7",
marcozecchini 0:9fca2b23d0ba 2542 "macro_name": "EFM_BC_EN"
marcozecchini 0:9fca2b23d0ba 2543 }
marcozecchini 0:9fca2b23d0ba 2544 }
marcozecchini 0:9fca2b23d0ba 2545 },
marcozecchini 0:9fca2b23d0ba 2546 "EFM32WG990F256": {
marcozecchini 0:9fca2b23d0ba 2547 "inherits": ["EFM32"],
marcozecchini 0:9fca2b23d0ba 2548 "extra_labels_add": ["EFM32WG", "256K", "SL_AES"],
marcozecchini 0:9fca2b23d0ba 2549 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 2550 "macros_add": ["EFM32WG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
marcozecchini 0:9fca2b23d0ba 2551 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 2552 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 2553 "device_name": "EFM32WG990F256",
marcozecchini 0:9fca2b23d0ba 2554 "public": false,
marcozecchini 0:9fca2b23d0ba 2555 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 2556 },
marcozecchini 0:9fca2b23d0ba 2557 "EFM32WG_STK3800": {
marcozecchini 0:9fca2b23d0ba 2558 "inherits": ["EFM32WG990F256"],
marcozecchini 0:9fca2b23d0ba 2559 "progen": {"target": "efm32wg-stk"},
marcozecchini 0:9fca2b23d0ba 2560 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
marcozecchini 0:9fca2b23d0ba 2561 "forced_reset_timeout": 2,
marcozecchini 0:9fca2b23d0ba 2562 "config": {
marcozecchini 0:9fca2b23d0ba 2563 "hf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2564 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
marcozecchini 0:9fca2b23d0ba 2565 "value": "HFXO",
marcozecchini 0:9fca2b23d0ba 2566 "macro_name": "CORE_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2567 },
marcozecchini 0:9fca2b23d0ba 2568 "hfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2569 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2570 "value": "48000000",
marcozecchini 0:9fca2b23d0ba 2571 "macro_name": "HFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2572 },
marcozecchini 0:9fca2b23d0ba 2573 "lf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2574 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
marcozecchini 0:9fca2b23d0ba 2575 "value": "LFXO",
marcozecchini 0:9fca2b23d0ba 2576 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2577 },
marcozecchini 0:9fca2b23d0ba 2578 "lfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2579 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2580 "value": "32768",
marcozecchini 0:9fca2b23d0ba 2581 "macro_name": "LFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2582 },
marcozecchini 0:9fca2b23d0ba 2583 "hfrco_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2584 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
marcozecchini 0:9fca2b23d0ba 2585 "value": "21000000",
marcozecchini 0:9fca2b23d0ba 2586 "macro_name": "HFRCO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2587 },
marcozecchini 0:9fca2b23d0ba 2588 "hfrco_band_select": {
marcozecchini 0:9fca2b23d0ba 2589 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
marcozecchini 0:9fca2b23d0ba 2590 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
marcozecchini 0:9fca2b23d0ba 2591 "macro_name": "HFRCO_FREQUENCY_ENUM"
marcozecchini 0:9fca2b23d0ba 2592 },
marcozecchini 0:9fca2b23d0ba 2593 "board_controller_enable": {
marcozecchini 0:9fca2b23d0ba 2594 "help": "Pin to pull high for enabling the USB serial port",
marcozecchini 0:9fca2b23d0ba 2595 "value": "PF7",
marcozecchini 0:9fca2b23d0ba 2596 "macro_name": "EFM_BC_EN"
marcozecchini 0:9fca2b23d0ba 2597 }
marcozecchini 0:9fca2b23d0ba 2598 }
marcozecchini 0:9fca2b23d0ba 2599 },
marcozecchini 0:9fca2b23d0ba 2600 "EFM32ZG222F32": {
marcozecchini 0:9fca2b23d0ba 2601 "inherits": ["EFM32"],
marcozecchini 0:9fca2b23d0ba 2602 "extra_labels_add": ["EFM32ZG", "32K", "SL_AES"],
marcozecchini 0:9fca2b23d0ba 2603 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 2604 "default_toolchain": "uARM",
marcozecchini 0:9fca2b23d0ba 2605 "macros_add": ["EFM32ZG222F32", "TRANSACTION_QUEUE_SIZE_SPI=0"],
marcozecchini 0:9fca2b23d0ba 2606 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 2607 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 2608 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 2609 "device_name": "EFM32ZG222F32",
marcozecchini 0:9fca2b23d0ba 2610 "public": false
marcozecchini 0:9fca2b23d0ba 2611 },
marcozecchini 0:9fca2b23d0ba 2612 "EFM32ZG_STK3200": {
marcozecchini 0:9fca2b23d0ba 2613 "inherits": ["EFM32ZG222F32"],
marcozecchini 0:9fca2b23d0ba 2614 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 2615 "forced_reset_timeout": 2,
marcozecchini 0:9fca2b23d0ba 2616 "config": {
marcozecchini 0:9fca2b23d0ba 2617 "hf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2618 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
marcozecchini 0:9fca2b23d0ba 2619 "value": "HFXO",
marcozecchini 0:9fca2b23d0ba 2620 "macro_name": "CORE_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2621 },
marcozecchini 0:9fca2b23d0ba 2622 "hfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2623 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2624 "value": "24000000",
marcozecchini 0:9fca2b23d0ba 2625 "macro_name": "HFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2626 },
marcozecchini 0:9fca2b23d0ba 2627 "lf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2628 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
marcozecchini 0:9fca2b23d0ba 2629 "value": "LFXO",
marcozecchini 0:9fca2b23d0ba 2630 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2631 },
marcozecchini 0:9fca2b23d0ba 2632 "lfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2633 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2634 "value": "32768",
marcozecchini 0:9fca2b23d0ba 2635 "macro_name": "LFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2636 },
marcozecchini 0:9fca2b23d0ba 2637 "hfrco_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2638 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
marcozecchini 0:9fca2b23d0ba 2639 "value": "21000000",
marcozecchini 0:9fca2b23d0ba 2640 "macro_name": "HFRCO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2641 },
marcozecchini 0:9fca2b23d0ba 2642 "hfrco_band_select": {
marcozecchini 0:9fca2b23d0ba 2643 "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
marcozecchini 0:9fca2b23d0ba 2644 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
marcozecchini 0:9fca2b23d0ba 2645 "macro_name": "HFRCO_FREQUENCY_ENUM"
marcozecchini 0:9fca2b23d0ba 2646 },
marcozecchini 0:9fca2b23d0ba 2647 "board_controller_enable": {
marcozecchini 0:9fca2b23d0ba 2648 "help": "Pin to pull high for enabling the USB serial port",
marcozecchini 0:9fca2b23d0ba 2649 "value": "PA9",
marcozecchini 0:9fca2b23d0ba 2650 "macro_name": "EFM_BC_EN"
marcozecchini 0:9fca2b23d0ba 2651 }
marcozecchini 0:9fca2b23d0ba 2652 }
marcozecchini 0:9fca2b23d0ba 2653 },
marcozecchini 0:9fca2b23d0ba 2654 "EFM32HG322F64": {
marcozecchini 0:9fca2b23d0ba 2655 "inherits": ["EFM32"],
marcozecchini 0:9fca2b23d0ba 2656 "extra_labels_add": ["EFM32HG", "64K", "SL_AES"],
marcozecchini 0:9fca2b23d0ba 2657 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 2658 "default_toolchain": "uARM",
marcozecchini 0:9fca2b23d0ba 2659 "macros_add": ["EFM32HG322F64", "TRANSACTION_QUEUE_SIZE_SPI=0"],
marcozecchini 0:9fca2b23d0ba 2660 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 2661 "default_lib": "small",
marcozecchini 0:9fca2b23d0ba 2662 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 2663 "device_name": "EFM32HG322F64",
marcozecchini 0:9fca2b23d0ba 2664 "public": false
marcozecchini 0:9fca2b23d0ba 2665 },
marcozecchini 0:9fca2b23d0ba 2666 "EFM32HG_STK3400": {
marcozecchini 0:9fca2b23d0ba 2667 "inherits": ["EFM32HG322F64"],
marcozecchini 0:9fca2b23d0ba 2668 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 2669 "forced_reset_timeout": 2,
marcozecchini 0:9fca2b23d0ba 2670 "config": {
marcozecchini 0:9fca2b23d0ba 2671 "hf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2672 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
marcozecchini 0:9fca2b23d0ba 2673 "value": "HFXO",
marcozecchini 0:9fca2b23d0ba 2674 "macro_name": "CORE_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2675 },
marcozecchini 0:9fca2b23d0ba 2676 "hfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2677 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2678 "value": "24000000",
marcozecchini 0:9fca2b23d0ba 2679 "macro_name": "HFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2680 },
marcozecchini 0:9fca2b23d0ba 2681 "lf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2682 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
marcozecchini 0:9fca2b23d0ba 2683 "value": "LFXO",
marcozecchini 0:9fca2b23d0ba 2684 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2685 },
marcozecchini 0:9fca2b23d0ba 2686 "lfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2687 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2688 "value": "32768",
marcozecchini 0:9fca2b23d0ba 2689 "macro_name": "LFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2690 },
marcozecchini 0:9fca2b23d0ba 2691 "hfrco_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2692 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
marcozecchini 0:9fca2b23d0ba 2693 "value": "21000000",
marcozecchini 0:9fca2b23d0ba 2694 "macro_name": "HFRCO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2695 },
marcozecchini 0:9fca2b23d0ba 2696 "hfrco_band_select": {
marcozecchini 0:9fca2b23d0ba 2697 "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
marcozecchini 0:9fca2b23d0ba 2698 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
marcozecchini 0:9fca2b23d0ba 2699 "macro_name": "HFRCO_FREQUENCY_ENUM"
marcozecchini 0:9fca2b23d0ba 2700 },
marcozecchini 0:9fca2b23d0ba 2701 "board_controller_enable": {
marcozecchini 0:9fca2b23d0ba 2702 "help": "Pin to pull high for enabling the USB serial port",
marcozecchini 0:9fca2b23d0ba 2703 "value": "PA9",
marcozecchini 0:9fca2b23d0ba 2704 "macro_name": "EFM_BC_EN"
marcozecchini 0:9fca2b23d0ba 2705 }
marcozecchini 0:9fca2b23d0ba 2706 }
marcozecchini 0:9fca2b23d0ba 2707 },
marcozecchini 0:9fca2b23d0ba 2708 "EFM32PG1B100F256GM32": {
marcozecchini 0:9fca2b23d0ba 2709 "inherits": ["EFM32"],
marcozecchini 0:9fca2b23d0ba 2710 "extra_labels_add": ["EFM32PG", "256K", "SL_CRYPTO"],
marcozecchini 0:9fca2b23d0ba 2711 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 2712 "macros_add": ["EFM32PG1B100F256GM32", "TRANSACTION_QUEUE_SIZE_SPI=4"],
marcozecchini 0:9fca2b23d0ba 2713 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 2714 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 2715 "device_name": "EFM32PG1B100F256GM32",
marcozecchini 0:9fca2b23d0ba 2716 "public": false,
marcozecchini 0:9fca2b23d0ba 2717 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 2718 },
marcozecchini 0:9fca2b23d0ba 2719 "EFM32PG_STK3401": {
marcozecchini 0:9fca2b23d0ba 2720 "inherits": ["EFM32PG1B100F256GM32"],
marcozecchini 0:9fca2b23d0ba 2721 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
marcozecchini 0:9fca2b23d0ba 2722 "forced_reset_timeout": 2,
marcozecchini 0:9fca2b23d0ba 2723 "config": {
marcozecchini 0:9fca2b23d0ba 2724 "hf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2725 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
marcozecchini 0:9fca2b23d0ba 2726 "value": "HFXO",
marcozecchini 0:9fca2b23d0ba 2727 "macro_name": "CORE_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2728 },
marcozecchini 0:9fca2b23d0ba 2729 "hfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2730 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2731 "value": "40000000",
marcozecchini 0:9fca2b23d0ba 2732 "macro_name": "HFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2733 },
marcozecchini 0:9fca2b23d0ba 2734 "lf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2735 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
marcozecchini 0:9fca2b23d0ba 2736 "value": "LFXO",
marcozecchini 0:9fca2b23d0ba 2737 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2738 },
marcozecchini 0:9fca2b23d0ba 2739 "lfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2740 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2741 "value": "32768",
marcozecchini 0:9fca2b23d0ba 2742 "macro_name": "LFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2743 },
marcozecchini 0:9fca2b23d0ba 2744 "hfrco_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2745 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
marcozecchini 0:9fca2b23d0ba 2746 "value": "32000000",
marcozecchini 0:9fca2b23d0ba 2747 "macro_name": "HFRCO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2748 },
marcozecchini 0:9fca2b23d0ba 2749 "hfrco_band_select": {
marcozecchini 0:9fca2b23d0ba 2750 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
marcozecchini 0:9fca2b23d0ba 2751 "value": "cmuHFRCOFreq_32M0Hz",
marcozecchini 0:9fca2b23d0ba 2752 "macro_name": "HFRCO_FREQUENCY_ENUM"
marcozecchini 0:9fca2b23d0ba 2753 },
marcozecchini 0:9fca2b23d0ba 2754 "board_controller_enable": {
marcozecchini 0:9fca2b23d0ba 2755 "help": "Pin to pull high for enabling the USB serial port",
marcozecchini 0:9fca2b23d0ba 2756 "value": "PA5",
marcozecchini 0:9fca2b23d0ba 2757 "macro_name": "EFM_BC_EN"
marcozecchini 0:9fca2b23d0ba 2758 }
marcozecchini 0:9fca2b23d0ba 2759 }
marcozecchini 0:9fca2b23d0ba 2760 },
marcozecchini 0:9fca2b23d0ba 2761 "EFR32MG1P132F256GM48": {
marcozecchini 0:9fca2b23d0ba 2762 "inherits": ["EFM32"],
marcozecchini 0:9fca2b23d0ba 2763 "extra_labels_add": ["EFR32MG1", "256K", "SL_RAIL", "SL_CRYPTO"],
marcozecchini 0:9fca2b23d0ba 2764 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 2765 "macros_add": ["EFR32MG1P132F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"],
marcozecchini 0:9fca2b23d0ba 2766 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 2767 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 2768 "device_name": "EFR32MG1P132F256GM48",
marcozecchini 0:9fca2b23d0ba 2769 "public": false,
marcozecchini 0:9fca2b23d0ba 2770 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 2771 },
marcozecchini 0:9fca2b23d0ba 2772 "EFR32MG1P233F256GM48": {
marcozecchini 0:9fca2b23d0ba 2773 "inherits": ["EFM32"],
marcozecchini 0:9fca2b23d0ba 2774 "extra_labels_add": ["EFR32MG1", "256K", "SL_RAIL", "SL_CRYPTO"],
marcozecchini 0:9fca2b23d0ba 2775 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 2776 "macros_add": ["EFR32MG1P233F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"],
marcozecchini 0:9fca2b23d0ba 2777 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 2778 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 2779 "public": false,
marcozecchini 0:9fca2b23d0ba 2780 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 2781 },
marcozecchini 0:9fca2b23d0ba 2782 "EFR32MG1_BRD4150": {
marcozecchini 0:9fca2b23d0ba 2783 "inherits": ["EFR32MG1P132F256GM48"],
marcozecchini 0:9fca2b23d0ba 2784 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
marcozecchini 0:9fca2b23d0ba 2785 "forced_reset_timeout": 2,
marcozecchini 0:9fca2b23d0ba 2786 "config": {
marcozecchini 0:9fca2b23d0ba 2787 "hf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2788 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
marcozecchini 0:9fca2b23d0ba 2789 "value": "HFXO",
marcozecchini 0:9fca2b23d0ba 2790 "macro_name": "CORE_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2791 },
marcozecchini 0:9fca2b23d0ba 2792 "hfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2793 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2794 "value": "38400000",
marcozecchini 0:9fca2b23d0ba 2795 "macro_name": "HFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2796 },
marcozecchini 0:9fca2b23d0ba 2797 "lf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2798 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
marcozecchini 0:9fca2b23d0ba 2799 "value": "LFXO",
marcozecchini 0:9fca2b23d0ba 2800 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2801 },
marcozecchini 0:9fca2b23d0ba 2802 "lfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2803 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2804 "value": "32768",
marcozecchini 0:9fca2b23d0ba 2805 "macro_name": "LFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2806 },
marcozecchini 0:9fca2b23d0ba 2807 "hfrco_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2808 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
marcozecchini 0:9fca2b23d0ba 2809 "value": "32000000",
marcozecchini 0:9fca2b23d0ba 2810 "macro_name": "HFRCO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2811 },
marcozecchini 0:9fca2b23d0ba 2812 "hfrco_band_select": {
marcozecchini 0:9fca2b23d0ba 2813 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
marcozecchini 0:9fca2b23d0ba 2814 "value": "cmuHFRCOFreq_32M0Hz",
marcozecchini 0:9fca2b23d0ba 2815 "macro_name": "HFRCO_FREQUENCY_ENUM"
marcozecchini 0:9fca2b23d0ba 2816 },
marcozecchini 0:9fca2b23d0ba 2817 "board_controller_enable": {
marcozecchini 0:9fca2b23d0ba 2818 "help": "Pin to pull high for enabling the USB serial port",
marcozecchini 0:9fca2b23d0ba 2819 "value": "PA5",
marcozecchini 0:9fca2b23d0ba 2820 "macro_name": "EFM_BC_EN"
marcozecchini 0:9fca2b23d0ba 2821 }
marcozecchini 0:9fca2b23d0ba 2822 },
marcozecchini 0:9fca2b23d0ba 2823 "public": false
marcozecchini 0:9fca2b23d0ba 2824 },
marcozecchini 0:9fca2b23d0ba 2825 "TB_SENSE_1": {
marcozecchini 0:9fca2b23d0ba 2826 "inherits": ["EFR32MG1P233F256GM48"],
marcozecchini 0:9fca2b23d0ba 2827 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
marcozecchini 0:9fca2b23d0ba 2828 "forced_reset_timeout": 5,
marcozecchini 0:9fca2b23d0ba 2829 "config": {
marcozecchini 0:9fca2b23d0ba 2830 "hf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2831 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
marcozecchini 0:9fca2b23d0ba 2832 "value": "HFXO",
marcozecchini 0:9fca2b23d0ba 2833 "macro_name": "CORE_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2834 },
marcozecchini 0:9fca2b23d0ba 2835 "hfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2836 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2837 "value": "38400000",
marcozecchini 0:9fca2b23d0ba 2838 "macro_name": "HFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2839 },
marcozecchini 0:9fca2b23d0ba 2840 "lf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2841 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
marcozecchini 0:9fca2b23d0ba 2842 "value": "LFXO",
marcozecchini 0:9fca2b23d0ba 2843 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2844 },
marcozecchini 0:9fca2b23d0ba 2845 "lfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2846 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2847 "value": "32768",
marcozecchini 0:9fca2b23d0ba 2848 "macro_name": "LFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2849 },
marcozecchini 0:9fca2b23d0ba 2850 "hfrco_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2851 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
marcozecchini 0:9fca2b23d0ba 2852 "value": "32000000",
marcozecchini 0:9fca2b23d0ba 2853 "macro_name": "HFRCO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2854 },
marcozecchini 0:9fca2b23d0ba 2855 "hfrco_band_select": {
marcozecchini 0:9fca2b23d0ba 2856 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
marcozecchini 0:9fca2b23d0ba 2857 "value": "cmuHFRCOFreq_32M0Hz",
marcozecchini 0:9fca2b23d0ba 2858 "macro_name": "HFRCO_FREQUENCY_ENUM"
marcozecchini 0:9fca2b23d0ba 2859 }
marcozecchini 0:9fca2b23d0ba 2860 }
marcozecchini 0:9fca2b23d0ba 2861 },
marcozecchini 0:9fca2b23d0ba 2862 "EFM32PG12B500F1024GL125": {
marcozecchini 0:9fca2b23d0ba 2863 "inherits": ["EFM32"],
marcozecchini 0:9fca2b23d0ba 2864 "extra_labels_add": ["EFM32PG12", "1024K", "SL_CRYPTO"],
marcozecchini 0:9fca2b23d0ba 2865 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 2866 "macros_add": ["EFM32PG12B500F1024GL125", "TRANSACTION_QUEUE_SIZE_SPI=4"],
marcozecchini 0:9fca2b23d0ba 2867 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 2868 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 2869 "public": false,
marcozecchini 0:9fca2b23d0ba 2870 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 2871 },
marcozecchini 0:9fca2b23d0ba 2872 "EFM32PG12_STK3402": {
marcozecchini 0:9fca2b23d0ba 2873 "inherits": ["EFM32PG12B500F1024GL125"],
marcozecchini 0:9fca2b23d0ba 2874 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 2875 "forced_reset_timeout": 2,
marcozecchini 0:9fca2b23d0ba 2876 "config": {
marcozecchini 0:9fca2b23d0ba 2877 "hf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2878 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
marcozecchini 0:9fca2b23d0ba 2879 "value": "HFXO",
marcozecchini 0:9fca2b23d0ba 2880 "macro_name": "CORE_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2881 },
marcozecchini 0:9fca2b23d0ba 2882 "hfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2883 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2884 "value": "40000000",
marcozecchini 0:9fca2b23d0ba 2885 "macro_name": "HFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2886 },
marcozecchini 0:9fca2b23d0ba 2887 "lf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2888 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
marcozecchini 0:9fca2b23d0ba 2889 "value": "LFXO",
marcozecchini 0:9fca2b23d0ba 2890 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2891 },
marcozecchini 0:9fca2b23d0ba 2892 "lfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2893 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2894 "value": "32768",
marcozecchini 0:9fca2b23d0ba 2895 "macro_name": "LFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2896 },
marcozecchini 0:9fca2b23d0ba 2897 "hfrco_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2898 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
marcozecchini 0:9fca2b23d0ba 2899 "value": "32000000",
marcozecchini 0:9fca2b23d0ba 2900 "macro_name": "HFRCO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2901 },
marcozecchini 0:9fca2b23d0ba 2902 "hfrco_band_select": {
marcozecchini 0:9fca2b23d0ba 2903 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
marcozecchini 0:9fca2b23d0ba 2904 "value": "cmuHFRCOFreq_32M0Hz",
marcozecchini 0:9fca2b23d0ba 2905 "macro_name": "HFRCO_FREQUENCY_ENUM"
marcozecchini 0:9fca2b23d0ba 2906 },
marcozecchini 0:9fca2b23d0ba 2907 "board_controller_enable": {
marcozecchini 0:9fca2b23d0ba 2908 "help": "Pin to pull high for enabling the USB serial port",
marcozecchini 0:9fca2b23d0ba 2909 "value": "PA5",
marcozecchini 0:9fca2b23d0ba 2910 "macro_name": "EFM_BC_EN"
marcozecchini 0:9fca2b23d0ba 2911 }
marcozecchini 0:9fca2b23d0ba 2912 }
marcozecchini 0:9fca2b23d0ba 2913 },
marcozecchini 0:9fca2b23d0ba 2914 "EFR32MG12P332F1024GL125": {
marcozecchini 0:9fca2b23d0ba 2915 "inherits": ["EFM32"],
marcozecchini 0:9fca2b23d0ba 2916 "extra_labels_add": ["EFR32MG12", "1024K", "SL_RAIL", "SL_CRYPTO"],
marcozecchini 0:9fca2b23d0ba 2917 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 2918 "macros_add": ["EFR32MG12P332F1024GL125", "TRANSACTION_QUEUE_SIZE_SPI=4"],
marcozecchini 0:9fca2b23d0ba 2919 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 2920 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 2921 "public": false,
marcozecchini 0:9fca2b23d0ba 2922 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 2923 },
marcozecchini 0:9fca2b23d0ba 2924 "TB_SENSE_12": {
marcozecchini 0:9fca2b23d0ba 2925 "inherits": ["EFR32MG12P332F1024GL125"],
marcozecchini 0:9fca2b23d0ba 2926 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 2927 "forced_reset_timeout": 5,
marcozecchini 0:9fca2b23d0ba 2928 "config": {
marcozecchini 0:9fca2b23d0ba 2929 "hf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2930 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
marcozecchini 0:9fca2b23d0ba 2931 "value": "HFXO",
marcozecchini 0:9fca2b23d0ba 2932 "macro_name": "CORE_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2933 },
marcozecchini 0:9fca2b23d0ba 2934 "hfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2935 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2936 "value": "38400000",
marcozecchini 0:9fca2b23d0ba 2937 "macro_name": "HFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2938 },
marcozecchini 0:9fca2b23d0ba 2939 "lf_clock_src": {
marcozecchini 0:9fca2b23d0ba 2940 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
marcozecchini 0:9fca2b23d0ba 2941 "value": "LFXO",
marcozecchini 0:9fca2b23d0ba 2942 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 2943 },
marcozecchini 0:9fca2b23d0ba 2944 "lfxo_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2945 "help": "Value: External crystal frequency in hertz",
marcozecchini 0:9fca2b23d0ba 2946 "value": "32768",
marcozecchini 0:9fca2b23d0ba 2947 "macro_name": "LFXO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2948 },
marcozecchini 0:9fca2b23d0ba 2949 "hfrco_clock_freq": {
marcozecchini 0:9fca2b23d0ba 2950 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
marcozecchini 0:9fca2b23d0ba 2951 "value": "32000000",
marcozecchini 0:9fca2b23d0ba 2952 "macro_name": "HFRCO_FREQUENCY"
marcozecchini 0:9fca2b23d0ba 2953 },
marcozecchini 0:9fca2b23d0ba 2954 "hfrco_band_select": {
marcozecchini 0:9fca2b23d0ba 2955 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
marcozecchini 0:9fca2b23d0ba 2956 "value": "cmuHFRCOFreq_32M0Hz",
marcozecchini 0:9fca2b23d0ba 2957 "macro_name": "HFRCO_FREQUENCY_ENUM"
marcozecchini 0:9fca2b23d0ba 2958 }
marcozecchini 0:9fca2b23d0ba 2959 }
marcozecchini 0:9fca2b23d0ba 2960 },
marcozecchini 0:9fca2b23d0ba 2961 "WIZWIKI_W7500": {
marcozecchini 0:9fca2b23d0ba 2962 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 2963 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 2964 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"],
marcozecchini 0:9fca2b23d0ba 2965 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
marcozecchini 0:9fca2b23d0ba 2966 "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 2967 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 2968 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 2969 "release_versions": ["2", "5"]
marcozecchini 0:9fca2b23d0ba 2970 },
marcozecchini 0:9fca2b23d0ba 2971 "WIZWIKI_W7500P": {
marcozecchini 0:9fca2b23d0ba 2972 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 2973 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 2974 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"],
marcozecchini 0:9fca2b23d0ba 2975 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
marcozecchini 0:9fca2b23d0ba 2976 "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 2977 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 2978 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 2979 "release_versions": ["2", "5"]
marcozecchini 0:9fca2b23d0ba 2980 },
marcozecchini 0:9fca2b23d0ba 2981 "WIZWIKI_W7500ECO": {
marcozecchini 0:9fca2b23d0ba 2982 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 2983 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 2984 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
marcozecchini 0:9fca2b23d0ba 2985 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
marcozecchini 0:9fca2b23d0ba 2986 "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 2987 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 2988 "release_versions": ["2", "5"]
marcozecchini 0:9fca2b23d0ba 2989 },
marcozecchini 0:9fca2b23d0ba 2990 "SAMR21G18A": {
marcozecchini 0:9fca2b23d0ba 2991 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 2992 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 2993 "macros": ["__SAMR21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
marcozecchini 0:9fca2b23d0ba 2994 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMR21"],
marcozecchini 0:9fca2b23d0ba 2995 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
marcozecchini 0:9fca2b23d0ba 2996 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
marcozecchini 0:9fca2b23d0ba 2997 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 2998 "device_name": "ATSAMR21G18A"
marcozecchini 0:9fca2b23d0ba 2999 },
marcozecchini 0:9fca2b23d0ba 3000 "SAMD21J18A": {
marcozecchini 0:9fca2b23d0ba 3001 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 3002 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 3003 "macros": ["__SAMD21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
marcozecchini 0:9fca2b23d0ba 3004 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
marcozecchini 0:9fca2b23d0ba 3005 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
marcozecchini 0:9fca2b23d0ba 3006 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
marcozecchini 0:9fca2b23d0ba 3007 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 3008 "device_name": "ATSAMD21J18A"
marcozecchini 0:9fca2b23d0ba 3009 },
marcozecchini 0:9fca2b23d0ba 3010 "SAMD21G18A": {
marcozecchini 0:9fca2b23d0ba 3011 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 3012 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 3013 "macros": ["__SAMD21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
marcozecchini 0:9fca2b23d0ba 3014 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
marcozecchini 0:9fca2b23d0ba 3015 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
marcozecchini 0:9fca2b23d0ba 3016 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
marcozecchini 0:9fca2b23d0ba 3017 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 3018 "device_name": "ATSAMD21G18A"
marcozecchini 0:9fca2b23d0ba 3019 },
marcozecchini 0:9fca2b23d0ba 3020 "SAML21J18A": {
marcozecchini 0:9fca2b23d0ba 3021 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 3022 "core": "Cortex-M0+",
marcozecchini 0:9fca2b23d0ba 3023 "macros": ["__SAML21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
marcozecchini 0:9fca2b23d0ba 3024 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAML21"],
marcozecchini 0:9fca2b23d0ba 3025 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
marcozecchini 0:9fca2b23d0ba 3026 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
marcozecchini 0:9fca2b23d0ba 3027 "device_name": "ATSAML21J18A"
marcozecchini 0:9fca2b23d0ba 3028 },
marcozecchini 0:9fca2b23d0ba 3029 "SAMG55J19": {
marcozecchini 0:9fca2b23d0ba 3030 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 3031 "core": "Cortex-M4",
marcozecchini 0:9fca2b23d0ba 3032 "extra_labels": ["Atmel", "SAM_CortexM4", "SAMG55"],
marcozecchini 0:9fca2b23d0ba 3033 "macros": ["__SAMG55J19__", "BOARD=75", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
marcozecchini 0:9fca2b23d0ba 3034 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
marcozecchini 0:9fca2b23d0ba 3035 "default_toolchain": "ARM",
marcozecchini 0:9fca2b23d0ba 3036 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
marcozecchini 0:9fca2b23d0ba 3037 "default_lib": "std",
marcozecchini 0:9fca2b23d0ba 3038 "device_name": "ATSAMG55J19"
marcozecchini 0:9fca2b23d0ba 3039 },
marcozecchini 0:9fca2b23d0ba 3040 "MCU_NRF51_UNIFIED": {
marcozecchini 0:9fca2b23d0ba 3041 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 3042 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 3043 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
marcozecchini 0:9fca2b23d0ba 3044 "macros": [
marcozecchini 0:9fca2b23d0ba 3045 "NRF51",
marcozecchini 0:9fca2b23d0ba 3046 "TARGET_NRF51822",
marcozecchini 0:9fca2b23d0ba 3047 "BLE_STACK_SUPPORT_REQD",
marcozecchini 0:9fca2b23d0ba 3048 "SOFTDEVICE_PRESENT",
marcozecchini 0:9fca2b23d0ba 3049 "S130",
marcozecchini 0:9fca2b23d0ba 3050 "TARGET_MCU_NRF51822",
marcozecchini 0:9fca2b23d0ba 3051 "CMSIS_VECTAB_VIRTUAL",
marcozecchini 0:9fca2b23d0ba 3052 "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"",
marcozecchini 0:9fca2b23d0ba 3053 "NO_SYSTICK",
marcozecchini 0:9fca2b23d0ba 3054 "MBED_TICKLESS"
marcozecchini 0:9fca2b23d0ba 3055 ],
marcozecchini 0:9fca2b23d0ba 3056 "MERGE_BOOTLOADER": false,
marcozecchini 0:9fca2b23d0ba 3057 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822_UNIFIED", "NRF5", "SDK11"],
marcozecchini 0:9fca2b23d0ba 3058 "OUTPUT_EXT": "hex",
marcozecchini 0:9fca2b23d0ba 3059 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 3060 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 3061 "public": false,
marcozecchini 0:9fca2b23d0ba 3062 "MERGE_SOFT_DEVICE": true,
marcozecchini 0:9fca2b23d0ba 3063 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
marcozecchini 0:9fca2b23d0ba 3064 {
marcozecchini 0:9fca2b23d0ba 3065 "boot": "",
marcozecchini 0:9fca2b23d0ba 3066 "name": "s130_nrf51_2.0.0_softdevice.hex",
marcozecchini 0:9fca2b23d0ba 3067 "offset": 110592
marcozecchini 0:9fca2b23d0ba 3068 }
marcozecchini 0:9fca2b23d0ba 3069 ],
marcozecchini 0:9fca2b23d0ba 3070 "detect_code": ["1070"],
marcozecchini 0:9fca2b23d0ba 3071 "post_binary_hook": {
marcozecchini 0:9fca2b23d0ba 3072 "function": "MCU_NRF51Code.binary_hook",
marcozecchini 0:9fca2b23d0ba 3073 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
marcozecchini 0:9fca2b23d0ba 3074 },
marcozecchini 0:9fca2b23d0ba 3075 "program_cycle_s": 6,
marcozecchini 0:9fca2b23d0ba 3076 "features": ["BLE"],
marcozecchini 0:9fca2b23d0ba 3077 "config": {
marcozecchini 0:9fca2b23d0ba 3078 "lf_clock_src": {
marcozecchini 0:9fca2b23d0ba 3079 "value": "NRF_LF_SRC_XTAL",
marcozecchini 0:9fca2b23d0ba 3080 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
marcozecchini 0:9fca2b23d0ba 3081 },
marcozecchini 0:9fca2b23d0ba 3082 "uart_hwfc": {
marcozecchini 0:9fca2b23d0ba 3083 "help": "Value: 1 for enable, 0 for disable",
marcozecchini 0:9fca2b23d0ba 3084 "value": 1,
marcozecchini 0:9fca2b23d0ba 3085 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
marcozecchini 0:9fca2b23d0ba 3086 }
marcozecchini 0:9fca2b23d0ba 3087 },
marcozecchini 0:9fca2b23d0ba 3088 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
marcozecchini 0:9fca2b23d0ba 3089 },
marcozecchini 0:9fca2b23d0ba 3090 "MCU_NRF51_32K_UNIFIED": {
marcozecchini 0:9fca2b23d0ba 3091 "inherits": ["MCU_NRF51_UNIFIED"],
marcozecchini 0:9fca2b23d0ba 3092 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
marcozecchini 0:9fca2b23d0ba 3093 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
marcozecchini 0:9fca2b23d0ba 3094 "public": false
marcozecchini 0:9fca2b23d0ba 3095 },
marcozecchini 0:9fca2b23d0ba 3096 "NRF51_DK": {
marcozecchini 0:9fca2b23d0ba 3097 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 3098 "inherits": ["MCU_NRF51_32K_UNIFIED"],
marcozecchini 0:9fca2b23d0ba 3099 "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
marcozecchini 0:9fca2b23d0ba 3100 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 3101 "device_name": "nRF51822_xxAA"
marcozecchini 0:9fca2b23d0ba 3102 },
marcozecchini 0:9fca2b23d0ba 3103 "NRF51_DONGLE": {
marcozecchini 0:9fca2b23d0ba 3104 "inherits": ["MCU_NRF51_32K_UNIFIED"],
marcozecchini 0:9fca2b23d0ba 3105 "progen": {"target": "nrf51-dongle"},
marcozecchini 0:9fca2b23d0ba 3106 "device_has": ["I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
marcozecchini 0:9fca2b23d0ba 3107 "release_versions": ["2", "5"]
marcozecchini 0:9fca2b23d0ba 3108 },
marcozecchini 0:9fca2b23d0ba 3109 "MCU_NRF52": {
marcozecchini 0:9fca2b23d0ba 3110 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 3111 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 3112 "macros": ["NRF52", "TARGET_NRF52832", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S132", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"", "MBED_TICKLESS"],
marcozecchini 0:9fca2b23d0ba 3113 "device_has": ["STCLK_OFF_DURING_SLEEP"],
marcozecchini 0:9fca2b23d0ba 3114 "extra_labels": ["NORDIC", "MCU_NRF52", "MCU_NRF52832", "NRF5", "SDK11", "NRF52_COMMON"],
marcozecchini 0:9fca2b23d0ba 3115 "OUTPUT_EXT": "hex",
marcozecchini 0:9fca2b23d0ba 3116 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 3117 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 3118 "public": false,
marcozecchini 0:9fca2b23d0ba 3119 "detect_code": ["1101"],
marcozecchini 0:9fca2b23d0ba 3120 "program_cycle_s": 6,
marcozecchini 0:9fca2b23d0ba 3121 "MERGE_SOFT_DEVICE": true,
marcozecchini 0:9fca2b23d0ba 3122 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
marcozecchini 0:9fca2b23d0ba 3123 {
marcozecchini 0:9fca2b23d0ba 3124 "boot": "",
marcozecchini 0:9fca2b23d0ba 3125 "name": "s132_nrf52_2.0.0_softdevice.hex",
marcozecchini 0:9fca2b23d0ba 3126 "offset": 114688
marcozecchini 0:9fca2b23d0ba 3127 }
marcozecchini 0:9fca2b23d0ba 3128 ],
marcozecchini 0:9fca2b23d0ba 3129 "post_binary_hook": {
marcozecchini 0:9fca2b23d0ba 3130 "function": "MCU_NRF51Code.binary_hook",
marcozecchini 0:9fca2b23d0ba 3131 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
marcozecchini 0:9fca2b23d0ba 3132 },
marcozecchini 0:9fca2b23d0ba 3133 "MERGE_BOOTLOADER": false,
marcozecchini 0:9fca2b23d0ba 3134 "features": ["BLE"],
marcozecchini 0:9fca2b23d0ba 3135 "config": {
marcozecchini 0:9fca2b23d0ba 3136 "lf_clock_src": {
marcozecchini 0:9fca2b23d0ba 3137 "value": "NRF_LF_SRC_XTAL",
marcozecchini 0:9fca2b23d0ba 3138 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
marcozecchini 0:9fca2b23d0ba 3139 },
marcozecchini 0:9fca2b23d0ba 3140 "uart_hwfc": {
marcozecchini 0:9fca2b23d0ba 3141 "help": "Value: 1 for enable, 0 for disable",
marcozecchini 0:9fca2b23d0ba 3142 "value": 1,
marcozecchini 0:9fca2b23d0ba 3143 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
marcozecchini 0:9fca2b23d0ba 3144 }
marcozecchini 0:9fca2b23d0ba 3145 }
marcozecchini 0:9fca2b23d0ba 3146 },
marcozecchini 0:9fca2b23d0ba 3147 "NRF52_DK": {
marcozecchini 0:9fca2b23d0ba 3148 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 3149 "inherits": ["MCU_NRF52"],
marcozecchini 0:9fca2b23d0ba 3150 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
marcozecchini 0:9fca2b23d0ba 3151 "device_has_add": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
marcozecchini 0:9fca2b23d0ba 3152 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 3153 "device_name": "nRF52832_xxAA"
marcozecchini 0:9fca2b23d0ba 3154 },
marcozecchini 0:9fca2b23d0ba 3155 "UBLOX_EVA_NINA": {
marcozecchini 0:9fca2b23d0ba 3156 "inherits": ["MCU_NRF52"],
marcozecchini 0:9fca2b23d0ba 3157 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
marcozecchini 0:9fca2b23d0ba 3158 "device_has_add": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
marcozecchini 0:9fca2b23d0ba 3159 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 3160 "overrides": {"uart_hwfc": 0},
marcozecchini 0:9fca2b23d0ba 3161 "device_name": "nRF52832_xxAA"
marcozecchini 0:9fca2b23d0ba 3162 },
marcozecchini 0:9fca2b23d0ba 3163 "UBLOX_EVK_NINA_B1": {
marcozecchini 0:9fca2b23d0ba 3164 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 3165 "inherits": ["MCU_NRF52"],
marcozecchini 0:9fca2b23d0ba 3166 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
marcozecchini 0:9fca2b23d0ba 3167 "device_has_add": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
marcozecchini 0:9fca2b23d0ba 3168 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 3169 "device_name": "nRF52832_xxAA"
marcozecchini 0:9fca2b23d0ba 3170 },
marcozecchini 0:9fca2b23d0ba 3171 "DELTA_DFBM_NQ620": {
marcozecchini 0:9fca2b23d0ba 3172 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 3173 "inherits": ["MCU_NRF52"],
marcozecchini 0:9fca2b23d0ba 3174 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
marcozecchini 0:9fca2b23d0ba 3175 "device_has_add": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
marcozecchini 0:9fca2b23d0ba 3176 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 3177 "overrides": {"lf_clock_src": "NRF_LF_SRC_RC"},
marcozecchini 0:9fca2b23d0ba 3178 "config": {
marcozecchini 0:9fca2b23d0ba 3179 "lf_clock_rc_calib_timer_interval": {
marcozecchini 0:9fca2b23d0ba 3180 "value": 16,
marcozecchini 0:9fca2b23d0ba 3181 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_TIMER_INTERVAL"
marcozecchini 0:9fca2b23d0ba 3182 },
marcozecchini 0:9fca2b23d0ba 3183 "lf_clock_rc_calib_mode_config": {
marcozecchini 0:9fca2b23d0ba 3184 "value": 0,
marcozecchini 0:9fca2b23d0ba 3185 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_MODE_CONFIG"
marcozecchini 0:9fca2b23d0ba 3186 }
marcozecchini 0:9fca2b23d0ba 3187 },
marcozecchini 0:9fca2b23d0ba 3188 "device_name": "nRF52832_xxAA"
marcozecchini 0:9fca2b23d0ba 3189 },
marcozecchini 0:9fca2b23d0ba 3190 "MCU_NRF52840": {
marcozecchini 0:9fca2b23d0ba 3191 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 3192 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 3193 "macros": ["TARGET_NRF52840", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S140", "NRF_SD_BLE_API_VERSION=5", "NRF52840_XXAA", "NRF_DFU_SETTINGS_VERSION=1", "NRF_SD_BLE_API_VERSION=5", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
marcozecchini 0:9fca2b23d0ba 3194 "device_has": ["STCLK_OFF_DURING_SLEEP"],
marcozecchini 0:9fca2b23d0ba 3195 "extra_labels": ["NORDIC", "MCU_NRF52840", "NRF5", "SDK13", "NRF52_COMMON"],
marcozecchini 0:9fca2b23d0ba 3196 "OUTPUT_EXT": "hex",
marcozecchini 0:9fca2b23d0ba 3197 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 3198 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 3199 "public": false,
marcozecchini 0:9fca2b23d0ba 3200 "detect_code": ["1101"],
marcozecchini 0:9fca2b23d0ba 3201 "program_cycle_s": 6,
marcozecchini 0:9fca2b23d0ba 3202 "MERGE_SOFT_DEVICE": true,
marcozecchini 0:9fca2b23d0ba 3203 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
marcozecchini 0:9fca2b23d0ba 3204 {
marcozecchini 0:9fca2b23d0ba 3205 "boot": "",
marcozecchini 0:9fca2b23d0ba 3206 "name": "s140_nrf52840_5.0.0-1.alpha_softdevice.hex",
marcozecchini 0:9fca2b23d0ba 3207 "offset": 135168
marcozecchini 0:9fca2b23d0ba 3208 }
marcozecchini 0:9fca2b23d0ba 3209 ],
marcozecchini 0:9fca2b23d0ba 3210 "bootloader_select_index": 0,
marcozecchini 0:9fca2b23d0ba 3211 "post_binary_hook": {
marcozecchini 0:9fca2b23d0ba 3212 "function": "MCU_NRF51Code.binary_hook",
marcozecchini 0:9fca2b23d0ba 3213 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
marcozecchini 0:9fca2b23d0ba 3214 },
marcozecchini 0:9fca2b23d0ba 3215 "MERGE_BOOTLOADER": false,
marcozecchini 0:9fca2b23d0ba 3216 "features": ["BLE"],
marcozecchini 0:9fca2b23d0ba 3217 "config": {
marcozecchini 0:9fca2b23d0ba 3218 "lf_clock_src": {
marcozecchini 0:9fca2b23d0ba 3219 "value": "NRF_LF_SRC_XTAL",
marcozecchini 0:9fca2b23d0ba 3220 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
marcozecchini 0:9fca2b23d0ba 3221 },
marcozecchini 0:9fca2b23d0ba 3222 "uart_hwfc": {
marcozecchini 0:9fca2b23d0ba 3223 "help": "Value: 1 for enable, 0 for disable",
marcozecchini 0:9fca2b23d0ba 3224 "value": 1,
marcozecchini 0:9fca2b23d0ba 3225 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
marcozecchini 0:9fca2b23d0ba 3226 }
marcozecchini 0:9fca2b23d0ba 3227 }
marcozecchini 0:9fca2b23d0ba 3228 },
marcozecchini 0:9fca2b23d0ba 3229 "NRF52840_DK": {
marcozecchini 0:9fca2b23d0ba 3230 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 3231 "inherits": ["MCU_NRF52840"],
marcozecchini 0:9fca2b23d0ba 3232 "macros_add": ["BOARD_PCA10056", "CONFIG_GPIO_AS_PINRESET", "SWI_DISABLE0", "NRF52_ERRATA_20"],
marcozecchini 0:9fca2b23d0ba 3233 "device_has_add": ["FLASH", "ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "TRNG"],
marcozecchini 0:9fca2b23d0ba 3234 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 3235 "device_name": "nRF52840_xxAA"
marcozecchini 0:9fca2b23d0ba 3236 },
marcozecchini 0:9fca2b23d0ba 3237 "BLUEPILL_F103C8": {
marcozecchini 0:9fca2b23d0ba 3238 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 3239 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 3240 "default_toolchain": "GCC_ARM",
marcozecchini 0:9fca2b23d0ba 3241 "extra_labels_add": ["STM32F1", "STM32F103C8"],
marcozecchini 0:9fca2b23d0ba 3242 "supported_toolchains": ["GCC_ARM"],
marcozecchini 0:9fca2b23d0ba 3243 "device_has_add": [],
marcozecchini 0:9fca2b23d0ba 3244 "device_has_remove": ["RTC", "STDIO_MESSAGES"]
marcozecchini 0:9fca2b23d0ba 3245 },
marcozecchini 0:9fca2b23d0ba 3246 "NUMAKER_PFM_NUC472": {
marcozecchini 0:9fca2b23d0ba 3247 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 3248 "default_toolchain": "ARM",
marcozecchini 0:9fca2b23d0ba 3249 "extra_labels": ["NUVOTON", "NUC472", "NU_XRAM_SUPPORTED", "FLASH_CMSIS_ALGO"],
marcozecchini 0:9fca2b23d0ba 3250 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 3251 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 3252 "config": {
marcozecchini 0:9fca2b23d0ba 3253 "gpio-irq-debounce-enable": {
marcozecchini 0:9fca2b23d0ba 3254 "help": "Enable GPIO IRQ debounce",
marcozecchini 0:9fca2b23d0ba 3255 "value": 0
marcozecchini 0:9fca2b23d0ba 3256 },
marcozecchini 0:9fca2b23d0ba 3257 "gpio-irq-debounce-enable-list": {
marcozecchini 0:9fca2b23d0ba 3258 "help": "Comma separated pin list to enable GPIO IRQ debounce",
marcozecchini 0:9fca2b23d0ba 3259 "value": "NC"
marcozecchini 0:9fca2b23d0ba 3260 },
marcozecchini 0:9fca2b23d0ba 3261 "gpio-irq-debounce-clock-source": {
marcozecchini 0:9fca2b23d0ba 3262 "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_IRC10K",
marcozecchini 0:9fca2b23d0ba 3263 "value": "GPIO_DBCTL_DBCLKSRC_IRC10K"
marcozecchini 0:9fca2b23d0ba 3264 },
marcozecchini 0:9fca2b23d0ba 3265 "gpio-irq-debounce-sample-rate": {
marcozecchini 0:9fca2b23d0ba 3266 "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
marcozecchini 0:9fca2b23d0ba 3267 "value": "GPIO_DBCTL_DBCLKSEL_16"
marcozecchini 0:9fca2b23d0ba 3268 }
marcozecchini 0:9fca2b23d0ba 3269 },
marcozecchini 0:9fca2b23d0ba 3270 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 3271 "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"],
marcozecchini 0:9fca2b23d0ba 3272 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "CAN", "FLASH"],
marcozecchini 0:9fca2b23d0ba 3273 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 3274 "release_versions": ["5"],
marcozecchini 0:9fca2b23d0ba 3275 "device_name": "NUC472HI8AE",
marcozecchini 0:9fca2b23d0ba 3276 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 3277 },
marcozecchini 0:9fca2b23d0ba 3278 "NCS36510": {
marcozecchini 0:9fca2b23d0ba 3279 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 3280 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 3281 "extra_labels": ["ONSEMI"],
marcozecchini 0:9fca2b23d0ba 3282 "config": {
marcozecchini 0:9fca2b23d0ba 3283 "mac-addr-low": {
marcozecchini 0:9fca2b23d0ba 3284 "help": "Lower 32 bits of the MAC extended address. All FFs indicates that factory programmed MAC address shall be used. In order to override the factory programmed MAC address this value needs to be changed from 0xFFFFFFFF to any chosen value.",
marcozecchini 0:9fca2b23d0ba 3285 "value": "0xFFFFFFFF"
marcozecchini 0:9fca2b23d0ba 3286 },
marcozecchini 0:9fca2b23d0ba 3287 "mac-addr-high": {
marcozecchini 0:9fca2b23d0ba 3288 "help": "Higher 32 bits of the MAC extended address. All FFs indicates that factory programmed MAC address shall be used. In order to override the factory programmed MAC address this value needs to be changed from 0xFFFFFFFF to any chosen value.",
marcozecchini 0:9fca2b23d0ba 3289 "value": "0xFFFFFFFF"
marcozecchini 0:9fca2b23d0ba 3290 },
marcozecchini 0:9fca2b23d0ba 3291 "32KHz-clk-trim": {
marcozecchini 0:9fca2b23d0ba 3292 "help": "32KHz clock trim",
marcozecchini 0:9fca2b23d0ba 3293 "value": "0x39"
marcozecchini 0:9fca2b23d0ba 3294 },
marcozecchini 0:9fca2b23d0ba 3295 "32MHz-clk-trim": {
marcozecchini 0:9fca2b23d0ba 3296 "help": "32MHz clock trim",
marcozecchini 0:9fca2b23d0ba 3297 "value": "0x17"
marcozecchini 0:9fca2b23d0ba 3298 },
marcozecchini 0:9fca2b23d0ba 3299 "rssi-trim": {
marcozecchini 0:9fca2b23d0ba 3300 "help": "RSSI trim",
marcozecchini 0:9fca2b23d0ba 3301 "value": "0x3D"
marcozecchini 0:9fca2b23d0ba 3302 },
marcozecchini 0:9fca2b23d0ba 3303 "txtune-trim": {
marcozecchini 0:9fca2b23d0ba 3304 "help": "TX tune trim",
marcozecchini 0:9fca2b23d0ba 3305 "value": "0xFFFFFFFF"
marcozecchini 0:9fca2b23d0ba 3306 }
marcozecchini 0:9fca2b23d0ba 3307 },
marcozecchini 0:9fca2b23d0ba 3308 "OUTPUT_EXT": "hex",
marcozecchini 0:9fca2b23d0ba 3309 "post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"},
marcozecchini 0:9fca2b23d0ba 3310 "macros": ["CM3", "CPU_NCS36510", "TARGET_NCS36510", "LOAD_ADDRESS=0x3000"],
marcozecchini 0:9fca2b23d0ba 3311 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 3312 "device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "LOWPOWERTIMER", "TRNG", "SPISLAVE"],
marcozecchini 0:9fca2b23d0ba 3313 "release_versions": ["2", "5"]
marcozecchini 0:9fca2b23d0ba 3314 },
marcozecchini 0:9fca2b23d0ba 3315 "NUMAKER_PFM_M453": {
marcozecchini 0:9fca2b23d0ba 3316 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 3317 "default_toolchain": "ARM",
marcozecchini 0:9fca2b23d0ba 3318 "extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453", "FLASH_CMSIS_ALGO"],
marcozecchini 0:9fca2b23d0ba 3319 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 3320 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 3321 "config": {
marcozecchini 0:9fca2b23d0ba 3322 "gpio-irq-debounce-enable": {
marcozecchini 0:9fca2b23d0ba 3323 "help": "Enable GPIO IRQ debounce",
marcozecchini 0:9fca2b23d0ba 3324 "value": 0
marcozecchini 0:9fca2b23d0ba 3325 },
marcozecchini 0:9fca2b23d0ba 3326 "gpio-irq-debounce-enable-list": {
marcozecchini 0:9fca2b23d0ba 3327 "help": "Comma separated pin list to enable GPIO IRQ debounce",
marcozecchini 0:9fca2b23d0ba 3328 "value": "NC"
marcozecchini 0:9fca2b23d0ba 3329 },
marcozecchini 0:9fca2b23d0ba 3330 "gpio-irq-debounce-clock-source": {
marcozecchini 0:9fca2b23d0ba 3331 "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC",
marcozecchini 0:9fca2b23d0ba 3332 "value": "GPIO_DBCTL_DBCLKSRC_LIRC"
marcozecchini 0:9fca2b23d0ba 3333 },
marcozecchini 0:9fca2b23d0ba 3334 "gpio-irq-debounce-sample-rate": {
marcozecchini 0:9fca2b23d0ba 3335 "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
marcozecchini 0:9fca2b23d0ba 3336 "value": "GPIO_DBCTL_DBCLKSEL_16"
marcozecchini 0:9fca2b23d0ba 3337 }
marcozecchini 0:9fca2b23d0ba 3338 },
marcozecchini 0:9fca2b23d0ba 3339 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 3340 "progen": {"target": "numaker-pfm-m453"},
marcozecchini 0:9fca2b23d0ba 3341 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "CAN", "FLASH"],
marcozecchini 0:9fca2b23d0ba 3342 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 3343 "device_name": "M453VG6AE",
marcozecchini 0:9fca2b23d0ba 3344 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 3345 },
marcozecchini 0:9fca2b23d0ba 3346 "NUMAKER_PFM_NANO130": {
marcozecchini 0:9fca2b23d0ba 3347 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 3348 "default_toolchain": "ARM",
marcozecchini 0:9fca2b23d0ba 3349 "extra_labels": ["NUVOTON", "NANO100", "NANO130KE3BN"],
marcozecchini 0:9fca2b23d0ba 3350 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 3351 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 3352 "config": {
marcozecchini 0:9fca2b23d0ba 3353 "gpio-irq-debounce-enable": {
marcozecchini 0:9fca2b23d0ba 3354 "help": "Enable GPIO IRQ debounce",
marcozecchini 0:9fca2b23d0ba 3355 "value": 0
marcozecchini 0:9fca2b23d0ba 3356 },
marcozecchini 0:9fca2b23d0ba 3357 "gpio-irq-debounce-enable-list": {
marcozecchini 0:9fca2b23d0ba 3358 "help": "Comma separated pin list to enable GPIO IRQ debounce",
marcozecchini 0:9fca2b23d0ba 3359 "value": "NC"
marcozecchini 0:9fca2b23d0ba 3360 },
marcozecchini 0:9fca2b23d0ba 3361 "gpio-irq-debounce-clock-source": {
marcozecchini 0:9fca2b23d0ba 3362 "help": "Select GPIO IRQ debounce clock source: GPIO_DBCLKSRC_HCLK or GPIO_DBCLKSRC_IRC10K",
marcozecchini 0:9fca2b23d0ba 3363 "value": "GPIO_DBCLKSRC_IRC10K"
marcozecchini 0:9fca2b23d0ba 3364 },
marcozecchini 0:9fca2b23d0ba 3365 "gpio-irq-debounce-sample-rate": {
marcozecchini 0:9fca2b23d0ba 3366 "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCLKSEL_1, GPIO_DBCLKSEL_2, GPIO_DBCLKSEL_4, ..., or GPIO_DBCLKSEL_32768",
marcozecchini 0:9fca2b23d0ba 3367 "value": "GPIO_DBCLKSEL_16"
marcozecchini 0:9fca2b23d0ba 3368 }
marcozecchini 0:9fca2b23d0ba 3369 },
marcozecchini 0:9fca2b23d0ba 3370 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 3371 "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
marcozecchini 0:9fca2b23d0ba 3372 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
marcozecchini 0:9fca2b23d0ba 3373 "release_versions": ["5"],
marcozecchini 0:9fca2b23d0ba 3374 "device_name": "NANO130KE3BN"
marcozecchini 0:9fca2b23d0ba 3375 },
marcozecchini 0:9fca2b23d0ba 3376 "HI2110": {
marcozecchini 0:9fca2b23d0ba 3377 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 3378 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 3379 "default_toolchain": "GCC_ARM",
marcozecchini 0:9fca2b23d0ba 3380 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 3381 "extra_labels": ["ublox"],
marcozecchini 0:9fca2b23d0ba 3382 "macros": ["TARGET_PROCESSOR_FAMILY_BOUDICA", "BOUDICA_SARA", "NDEBUG=1", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
marcozecchini 0:9fca2b23d0ba 3383 "public": false,
marcozecchini 0:9fca2b23d0ba 3384 "target_overrides": {
marcozecchini 0:9fca2b23d0ba 3385 "*": {
marcozecchini 0:9fca2b23d0ba 3386 "core.stdio-flush-at-exit": false
marcozecchini 0:9fca2b23d0ba 3387 }
marcozecchini 0:9fca2b23d0ba 3388 },
marcozecchini 0:9fca2b23d0ba 3389 "device_has": ["INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "STDIO_MESSAGES"],
marcozecchini 0:9fca2b23d0ba 3390 "default_lib": "std",
marcozecchini 0:9fca2b23d0ba 3391 "release_versions": ["5"]
marcozecchini 0:9fca2b23d0ba 3392 },
marcozecchini 0:9fca2b23d0ba 3393 "SARA_NBIOT": {
marcozecchini 0:9fca2b23d0ba 3394 "inherits": ["HI2110"],
marcozecchini 0:9fca2b23d0ba 3395 "extra_labels": ["ublox", "HI2110"],
marcozecchini 0:9fca2b23d0ba 3396 "public": false
marcozecchini 0:9fca2b23d0ba 3397 },
marcozecchini 0:9fca2b23d0ba 3398 "SARA_NBIOT_EVK": {
marcozecchini 0:9fca2b23d0ba 3399 "inherits": ["SARA_NBIOT"],
marcozecchini 0:9fca2b23d0ba 3400 "extra_labels": ["ublox", "HI2110", "SARA_NBIOT"]
marcozecchini 0:9fca2b23d0ba 3401 },
marcozecchini 0:9fca2b23d0ba 3402 "REALTEK_RTL8195AM": {
marcozecchini 0:9fca2b23d0ba 3403 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 3404 "core": "Cortex-M3",
marcozecchini 0:9fca2b23d0ba 3405 "default_toolchain": "GCC_ARM",
marcozecchini 0:9fca2b23d0ba 3406 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 3407 "detect_code": ["4600"],
marcozecchini 0:9fca2b23d0ba 3408 "extra_labels": ["Realtek", "AMEBA", "RTL8195A"],
marcozecchini 0:9fca2b23d0ba 3409 "macros": ["__RTL8195A__","CONFIG_PLATFORM_8195A","CONFIG_MBED_ENABLED","PLATFORM_CMSIS_RTOS"],
marcozecchini 0:9fca2b23d0ba 3410 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 3411 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "TRNG", "EMAC", "FLASH"],
marcozecchini 0:9fca2b23d0ba 3412 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 3413 "post_binary_hook": {
marcozecchini 0:9fca2b23d0ba 3414 "function": "RTL8195ACode.binary_hook",
marcozecchini 0:9fca2b23d0ba 3415 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
marcozecchini 0:9fca2b23d0ba 3416 },
marcozecchini 0:9fca2b23d0ba 3417 "release_versions": ["5"]
marcozecchini 0:9fca2b23d0ba 3418 },
marcozecchini 0:9fca2b23d0ba 3419 "VBLUNO51_LEGACY": {
marcozecchini 0:9fca2b23d0ba 3420 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 3421 "inherits": ["MCU_NRF51_32K"],
marcozecchini 0:9fca2b23d0ba 3422 "extra_labels_add": ["VBLUNO51"]
marcozecchini 0:9fca2b23d0ba 3423 },
marcozecchini 0:9fca2b23d0ba 3424 "VBLUNO51_BOOT": {
marcozecchini 0:9fca2b23d0ba 3425 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 3426 "inherits": ["MCU_NRF51_32K_BOOT"],
marcozecchini 0:9fca2b23d0ba 3427 "extra_labels_add": ["VBLUNO51"],
marcozecchini 0:9fca2b23d0ba 3428 "macros_add": ["TARGET_VBLUNO51"]
marcozecchini 0:9fca2b23d0ba 3429 },
marcozecchini 0:9fca2b23d0ba 3430 "VBLUNO51_OTA": {
marcozecchini 0:9fca2b23d0ba 3431 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 3432 "inherits": ["MCU_NRF51_32K_OTA"],
marcozecchini 0:9fca2b23d0ba 3433 "extra_labels_add": ["VBLUNO51"],
marcozecchini 0:9fca2b23d0ba 3434 "macros_add": ["TARGET_VBLUNO51"]
marcozecchini 0:9fca2b23d0ba 3435 },
marcozecchini 0:9fca2b23d0ba 3436 "VBLUNO51": {
marcozecchini 0:9fca2b23d0ba 3437 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 3438 "inherits": ["MCU_NRF51_32K_UNIFIED"],
marcozecchini 0:9fca2b23d0ba 3439 "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
marcozecchini 0:9fca2b23d0ba 3440 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 3441 "device_name": "nRF51822_xxAC"
marcozecchini 0:9fca2b23d0ba 3442 },
marcozecchini 0:9fca2b23d0ba 3443 "NUCLEO_L496ZG": {
marcozecchini 0:9fca2b23d0ba 3444 "inherits": ["FAMILY_STM32"],
marcozecchini 0:9fca2b23d0ba 3445 "supported_form_factors": ["ARDUINO", "MORPHO"],
marcozecchini 0:9fca2b23d0ba 3446 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 3447 "extra_labels_add": ["STM32L4", "STM32L496ZG", "STM32L496xG"],
marcozecchini 0:9fca2b23d0ba 3448 "config": {
marcozecchini 0:9fca2b23d0ba 3449 "clock_source": {
marcozecchini 0:9fca2b23d0ba 3450 "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
marcozecchini 0:9fca2b23d0ba 3451 "value": "USE_PLL_MSI",
marcozecchini 0:9fca2b23d0ba 3452 "macro_name": "CLOCK_SOURCE"
marcozecchini 0:9fca2b23d0ba 3453 }
marcozecchini 0:9fca2b23d0ba 3454 },
marcozecchini 0:9fca2b23d0ba 3455 "detect_code": ["0823"],
marcozecchini 0:9fca2b23d0ba 3456 "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
marcozecchini 0:9fca2b23d0ba 3457 "release_versions": ["2", "5"],
marcozecchini 0:9fca2b23d0ba 3458 "device_name": "STM32L496ZG"
marcozecchini 0:9fca2b23d0ba 3459 },
marcozecchini 0:9fca2b23d0ba 3460 "NUCLEO_L496ZG_P": {
marcozecchini 0:9fca2b23d0ba 3461 "inherits": ["NUCLEO_L496ZG"],
marcozecchini 0:9fca2b23d0ba 3462 "detect_code": ["0828"]
marcozecchini 0:9fca2b23d0ba 3463 },
marcozecchini 0:9fca2b23d0ba 3464 "VBLUNO52": {
marcozecchini 0:9fca2b23d0ba 3465 "supported_form_factors": ["ARDUINO"],
marcozecchini 0:9fca2b23d0ba 3466 "inherits": ["MCU_NRF52"],
marcozecchini 0:9fca2b23d0ba 3467 "macros_add": ["BOARD_PCA10040", "BOARD_VBLUNO52", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
marcozecchini 0:9fca2b23d0ba 3468 "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
marcozecchini 0:9fca2b23d0ba 3469 "release_versions": ["2"],
marcozecchini 0:9fca2b23d0ba 3470 "device_name": "nRF52832_xxAA"
marcozecchini 0:9fca2b23d0ba 3471 },
marcozecchini 0:9fca2b23d0ba 3472 "NUMAKER_PFM_M487": {
marcozecchini 0:9fca2b23d0ba 3473 "core": "Cortex-M4F",
marcozecchini 0:9fca2b23d0ba 3474 "default_toolchain": "ARM",
marcozecchini 0:9fca2b23d0ba 3475 "extra_labels": ["NUVOTON", "M480", "FLASH_CMSIS_ALGO"],
marcozecchini 0:9fca2b23d0ba 3476 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 3477 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 3478 "config": {
marcozecchini 0:9fca2b23d0ba 3479 "gpio-irq-debounce-enable": {
marcozecchini 0:9fca2b23d0ba 3480 "help": "Enable GPIO IRQ debounce",
marcozecchini 0:9fca2b23d0ba 3481 "value": 0
marcozecchini 0:9fca2b23d0ba 3482 },
marcozecchini 0:9fca2b23d0ba 3483 "gpio-irq-debounce-enable-list": {
marcozecchini 0:9fca2b23d0ba 3484 "help": "Comma separated pin list to enable GPIO IRQ debounce",
marcozecchini 0:9fca2b23d0ba 3485 "value": "NC"
marcozecchini 0:9fca2b23d0ba 3486 },
marcozecchini 0:9fca2b23d0ba 3487 "gpio-irq-debounce-clock-source": {
marcozecchini 0:9fca2b23d0ba 3488 "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC",
marcozecchini 0:9fca2b23d0ba 3489 "value": "GPIO_DBCTL_DBCLKSRC_LIRC"
marcozecchini 0:9fca2b23d0ba 3490 },
marcozecchini 0:9fca2b23d0ba 3491 "gpio-irq-debounce-sample-rate": {
marcozecchini 0:9fca2b23d0ba 3492 "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
marcozecchini 0:9fca2b23d0ba 3493 "value": "GPIO_DBCTL_DBCLKSEL_16"
marcozecchini 0:9fca2b23d0ba 3494 },
marcozecchini 0:9fca2b23d0ba 3495 "usb-device-hsusbd": {
marcozecchini 0:9fca2b23d0ba 3496 "help": "Select high-speed USB device or not",
marcozecchini 0:9fca2b23d0ba 3497 "value": 1
marcozecchini 0:9fca2b23d0ba 3498 },
marcozecchini 0:9fca2b23d0ba 3499 "ctrl01-enable": {
marcozecchini 0:9fca2b23d0ba 3500 "help": "Enable control_01",
marcozecchini 0:9fca2b23d0ba 3501 "value": 0
marcozecchini 0:9fca2b23d0ba 3502 }
marcozecchini 0:9fca2b23d0ba 3503 },
marcozecchini 0:9fca2b23d0ba 3504 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 3505 "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"],
marcozecchini 0:9fca2b23d0ba 3506 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "FLASH", "CAN"],
marcozecchini 0:9fca2b23d0ba 3507 "features": ["LWIP"],
marcozecchini 0:9fca2b23d0ba 3508 "release_versions": ["5"],
marcozecchini 0:9fca2b23d0ba 3509 "device_name": "M487JIDAE",
marcozecchini 0:9fca2b23d0ba 3510 "bootloader_supported": true
marcozecchini 0:9fca2b23d0ba 3511 },
marcozecchini 0:9fca2b23d0ba 3512 "TMPM066": {
marcozecchini 0:9fca2b23d0ba 3513 "inherits": ["Target"],
marcozecchini 0:9fca2b23d0ba 3514 "core": "Cortex-M0",
marcozecchini 0:9fca2b23d0ba 3515 "is_disk_virtual": true,
marcozecchini 0:9fca2b23d0ba 3516 "extra_labels": ["TOSHIBA"],
marcozecchini 0:9fca2b23d0ba 3517 "macros": ["__TMPM066__", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
marcozecchini 0:9fca2b23d0ba 3518 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
marcozecchini 0:9fca2b23d0ba 3519 "device_has": ["ANALOGIN", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "I2C", "I2CSLAVE", "STDIO_MESSAGES", "PWMOUT"],
marcozecchini 0:9fca2b23d0ba 3520 "device_name": "TMPM066FWUG",
marcozecchini 0:9fca2b23d0ba 3521 "detect_code": ["7011"],
marcozecchini 0:9fca2b23d0ba 3522 "release_versions": ["5"]
marcozecchini 0:9fca2b23d0ba 3523 }
marcozecchini 0:9fca2b23d0ba 3524 }