Rtos API example

Committer:
marcozecchini
Date:
Sat Feb 23 12:13:36 2019 +0000
Revision:
0:9fca2b23d0ba
final commit

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marcozecchini 0:9fca2b23d0ba 1 /* mbed Microcontroller Library
marcozecchini 0:9fca2b23d0ba 2 *******************************************************************************
marcozecchini 0:9fca2b23d0ba 3 * Copyright (c) 2017, STMicroelectronics
marcozecchini 0:9fca2b23d0ba 4 * All rights reserved.
marcozecchini 0:9fca2b23d0ba 5 *
marcozecchini 0:9fca2b23d0ba 6 * Redistribution and use in source and binary forms, with or without
marcozecchini 0:9fca2b23d0ba 7 * modification, are permitted provided that the following conditions are met:
marcozecchini 0:9fca2b23d0ba 8 *
marcozecchini 0:9fca2b23d0ba 9 * 1. Redistributions of source code must retain the above copyright notice,
marcozecchini 0:9fca2b23d0ba 10 * this list of conditions and the following disclaimer.
marcozecchini 0:9fca2b23d0ba 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
marcozecchini 0:9fca2b23d0ba 12 * this list of conditions and the following disclaimer in the documentation
marcozecchini 0:9fca2b23d0ba 13 * and/or other materials provided with the distribution.
marcozecchini 0:9fca2b23d0ba 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
marcozecchini 0:9fca2b23d0ba 15 * may be used to endorse or promote products derived from this software
marcozecchini 0:9fca2b23d0ba 16 * without specific prior written permission.
marcozecchini 0:9fca2b23d0ba 17 *
marcozecchini 0:9fca2b23d0ba 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
marcozecchini 0:9fca2b23d0ba 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
marcozecchini 0:9fca2b23d0ba 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
marcozecchini 0:9fca2b23d0ba 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
marcozecchini 0:9fca2b23d0ba 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
marcozecchini 0:9fca2b23d0ba 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
marcozecchini 0:9fca2b23d0ba 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
marcozecchini 0:9fca2b23d0ba 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
marcozecchini 0:9fca2b23d0ba 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
marcozecchini 0:9fca2b23d0ba 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
marcozecchini 0:9fca2b23d0ba 28 *******************************************************************************
marcozecchini 0:9fca2b23d0ba 29 */
marcozecchini 0:9fca2b23d0ba 30 #include "mbed_assert.h"
marcozecchini 0:9fca2b23d0ba 31 #include "pinmap.h"
marcozecchini 0:9fca2b23d0ba 32 #include "PortNames.h"
marcozecchini 0:9fca2b23d0ba 33 #include "mbed_error.h"
marcozecchini 0:9fca2b23d0ba 34 #include "pin_device.h"
marcozecchini 0:9fca2b23d0ba 35
marcozecchini 0:9fca2b23d0ba 36 extern GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx);
marcozecchini 0:9fca2b23d0ba 37
marcozecchini 0:9fca2b23d0ba 38 const uint32_t ll_pin_defines[16] = {
marcozecchini 0:9fca2b23d0ba 39 LL_GPIO_PIN_0,
marcozecchini 0:9fca2b23d0ba 40 LL_GPIO_PIN_1,
marcozecchini 0:9fca2b23d0ba 41 LL_GPIO_PIN_2,
marcozecchini 0:9fca2b23d0ba 42 LL_GPIO_PIN_3,
marcozecchini 0:9fca2b23d0ba 43 LL_GPIO_PIN_4,
marcozecchini 0:9fca2b23d0ba 44 LL_GPIO_PIN_5,
marcozecchini 0:9fca2b23d0ba 45 LL_GPIO_PIN_6,
marcozecchini 0:9fca2b23d0ba 46 LL_GPIO_PIN_7,
marcozecchini 0:9fca2b23d0ba 47 LL_GPIO_PIN_8,
marcozecchini 0:9fca2b23d0ba 48 LL_GPIO_PIN_9,
marcozecchini 0:9fca2b23d0ba 49 LL_GPIO_PIN_10,
marcozecchini 0:9fca2b23d0ba 50 LL_GPIO_PIN_11,
marcozecchini 0:9fca2b23d0ba 51 LL_GPIO_PIN_12,
marcozecchini 0:9fca2b23d0ba 52 LL_GPIO_PIN_13,
marcozecchini 0:9fca2b23d0ba 53 LL_GPIO_PIN_14,
marcozecchini 0:9fca2b23d0ba 54 LL_GPIO_PIN_15
marcozecchini 0:9fca2b23d0ba 55 };
marcozecchini 0:9fca2b23d0ba 56
marcozecchini 0:9fca2b23d0ba 57 /**
marcozecchini 0:9fca2b23d0ba 58 * Configure pin (mode, speed, output type and pull-up/pull-down)
marcozecchini 0:9fca2b23d0ba 59 */
marcozecchini 0:9fca2b23d0ba 60 void pin_function(PinName pin, int data)
marcozecchini 0:9fca2b23d0ba 61 {
marcozecchini 0:9fca2b23d0ba 62 MBED_ASSERT(pin != (PinName)NC);
marcozecchini 0:9fca2b23d0ba 63
marcozecchini 0:9fca2b23d0ba 64 // Get the pin informations
marcozecchini 0:9fca2b23d0ba 65 uint32_t mode = STM_PIN_FUNCTION(data);
marcozecchini 0:9fca2b23d0ba 66 uint32_t afnum = STM_PIN_AFNUM(data);
marcozecchini 0:9fca2b23d0ba 67 uint32_t port = STM_PORT(pin);
marcozecchini 0:9fca2b23d0ba 68 uint32_t ll_pin = ll_pin_defines[STM_PIN(pin)];
marcozecchini 0:9fca2b23d0ba 69 uint32_t ll_mode = 0;
marcozecchini 0:9fca2b23d0ba 70
marcozecchini 0:9fca2b23d0ba 71 // Enable GPIO clock
marcozecchini 0:9fca2b23d0ba 72 GPIO_TypeDef *gpio = Set_GPIO_Clock(port);
marcozecchini 0:9fca2b23d0ba 73
marcozecchini 0:9fca2b23d0ba 74 /* Set default speed to high.
marcozecchini 0:9fca2b23d0ba 75 * For most families there are dedicated registers so it is
marcozecchini 0:9fca2b23d0ba 76 * not so important, register can be set at any time.
marcozecchini 0:9fca2b23d0ba 77 * But for families like F1, speed only applies to output.
marcozecchini 0:9fca2b23d0ba 78 */
marcozecchini 0:9fca2b23d0ba 79 #if defined (TARGET_STM32F1)
marcozecchini 0:9fca2b23d0ba 80 if (mode == STM_PIN_OUTPUT) {
marcozecchini 0:9fca2b23d0ba 81 #endif
marcozecchini 0:9fca2b23d0ba 82 LL_GPIO_SetPinSpeed(gpio, ll_pin, LL_GPIO_SPEED_FREQ_HIGH);
marcozecchini 0:9fca2b23d0ba 83 #if defined (TARGET_STM32F1)
marcozecchini 0:9fca2b23d0ba 84 }
marcozecchini 0:9fca2b23d0ba 85 #endif
marcozecchini 0:9fca2b23d0ba 86
marcozecchini 0:9fca2b23d0ba 87 switch (mode) {
marcozecchini 0:9fca2b23d0ba 88 case STM_PIN_INPUT:
marcozecchini 0:9fca2b23d0ba 89 ll_mode = LL_GPIO_MODE_INPUT;
marcozecchini 0:9fca2b23d0ba 90 break;
marcozecchini 0:9fca2b23d0ba 91 case STM_PIN_OUTPUT:
marcozecchini 0:9fca2b23d0ba 92 ll_mode = LL_GPIO_MODE_OUTPUT;
marcozecchini 0:9fca2b23d0ba 93 break;
marcozecchini 0:9fca2b23d0ba 94 case STM_PIN_ALTERNATE:
marcozecchini 0:9fca2b23d0ba 95 ll_mode = LL_GPIO_MODE_ALTERNATE;
marcozecchini 0:9fca2b23d0ba 96 // In case of ALT function, also set he afnum
marcozecchini 0:9fca2b23d0ba 97 stm_pin_SetAFPin(gpio, pin, afnum);
marcozecchini 0:9fca2b23d0ba 98 break;
marcozecchini 0:9fca2b23d0ba 99 case STM_PIN_ANALOG:
marcozecchini 0:9fca2b23d0ba 100 ll_mode = LL_GPIO_MODE_ANALOG;
marcozecchini 0:9fca2b23d0ba 101 break;
marcozecchini 0:9fca2b23d0ba 102 default:
marcozecchini 0:9fca2b23d0ba 103 MBED_ASSERT(0);
marcozecchini 0:9fca2b23d0ba 104 break;
marcozecchini 0:9fca2b23d0ba 105 }
marcozecchini 0:9fca2b23d0ba 106 LL_GPIO_SetPinMode(gpio, ll_pin, ll_mode);
marcozecchini 0:9fca2b23d0ba 107
marcozecchini 0:9fca2b23d0ba 108 #if defined(GPIO_ASCR_ASC0)
marcozecchini 0:9fca2b23d0ba 109 /* For families where Analog Control ASC0 register is present */
marcozecchini 0:9fca2b23d0ba 110 if (STM_PIN_ANALOG_CONTROL(data)) {
marcozecchini 0:9fca2b23d0ba 111 LL_GPIO_EnablePinAnalogControl(gpio, ll_pin);
marcozecchini 0:9fca2b23d0ba 112 } else {
marcozecchini 0:9fca2b23d0ba 113 LL_GPIO_DisablePinAnalogControl(gpio, ll_pin);
marcozecchini 0:9fca2b23d0ba 114 }
marcozecchini 0:9fca2b23d0ba 115 #endif
marcozecchini 0:9fca2b23d0ba 116
marcozecchini 0:9fca2b23d0ba 117 /* For now by default use Speed HIGH for output or alt modes */
marcozecchini 0:9fca2b23d0ba 118 if ((mode == STM_PIN_OUTPUT) ||(mode == STM_PIN_ALTERNATE)) {
marcozecchini 0:9fca2b23d0ba 119 if (STM_PIN_OD(data)) {
marcozecchini 0:9fca2b23d0ba 120 LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_OPENDRAIN);
marcozecchini 0:9fca2b23d0ba 121 } else {
marcozecchini 0:9fca2b23d0ba 122 LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_PUSHPULL);
marcozecchini 0:9fca2b23d0ba 123 }
marcozecchini 0:9fca2b23d0ba 124 }
marcozecchini 0:9fca2b23d0ba 125
marcozecchini 0:9fca2b23d0ba 126 stm_pin_PullConfig(gpio, ll_pin, STM_PIN_PUPD(data));
marcozecchini 0:9fca2b23d0ba 127
marcozecchini 0:9fca2b23d0ba 128 stm_pin_DisconnectDebug(pin);
marcozecchini 0:9fca2b23d0ba 129 }
marcozecchini 0:9fca2b23d0ba 130
marcozecchini 0:9fca2b23d0ba 131 /**
marcozecchini 0:9fca2b23d0ba 132 * Configure pin pull-up/pull-down
marcozecchini 0:9fca2b23d0ba 133 */
marcozecchini 0:9fca2b23d0ba 134 void pin_mode(PinName pin, PinMode mode)
marcozecchini 0:9fca2b23d0ba 135 {
marcozecchini 0:9fca2b23d0ba 136 MBED_ASSERT(pin != (PinName)NC);
marcozecchini 0:9fca2b23d0ba 137
marcozecchini 0:9fca2b23d0ba 138 uint32_t port_index = STM_PORT(pin);
marcozecchini 0:9fca2b23d0ba 139 uint32_t ll_pin = ll_pin_defines[STM_PIN(pin)];
marcozecchini 0:9fca2b23d0ba 140 // Enable GPIO clock
marcozecchini 0:9fca2b23d0ba 141 GPIO_TypeDef *gpio = Set_GPIO_Clock(port_index);
marcozecchini 0:9fca2b23d0ba 142 uint32_t function = LL_GPIO_GetPinMode(gpio, ll_pin);
marcozecchini 0:9fca2b23d0ba 143
marcozecchini 0:9fca2b23d0ba 144 if ((function == LL_GPIO_MODE_OUTPUT) || (function == LL_GPIO_MODE_ALTERNATE))
marcozecchini 0:9fca2b23d0ba 145 {
marcozecchini 0:9fca2b23d0ba 146 if ((mode == OpenDrainNoPull) || (mode == OpenDrainPullUp) || (mode == OpenDrainPullDown)) {
marcozecchini 0:9fca2b23d0ba 147 LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_OPENDRAIN);
marcozecchini 0:9fca2b23d0ba 148 } else {
marcozecchini 0:9fca2b23d0ba 149 LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_PUSHPULL);
marcozecchini 0:9fca2b23d0ba 150 }
marcozecchini 0:9fca2b23d0ba 151 }
marcozecchini 0:9fca2b23d0ba 152
marcozecchini 0:9fca2b23d0ba 153 if ((mode == OpenDrainPullUp) || (mode == PullUp)) {
marcozecchini 0:9fca2b23d0ba 154 stm_pin_PullConfig(gpio, ll_pin, GPIO_PULLUP);
marcozecchini 0:9fca2b23d0ba 155 } else if ((mode == OpenDrainPullDown) || (mode == PullDown)) {
marcozecchini 0:9fca2b23d0ba 156 stm_pin_PullConfig(gpio, ll_pin, GPIO_PULLDOWN);
marcozecchini 0:9fca2b23d0ba 157 } else {
marcozecchini 0:9fca2b23d0ba 158 stm_pin_PullConfig(gpio, ll_pin, GPIO_NOPULL);
marcozecchini 0:9fca2b23d0ba 159 }
marcozecchini 0:9fca2b23d0ba 160 }