Marco Zecchini / Mbed OS Example_RTOS

Rtos API example

mbed-os/targets/TARGET_STM/mbed_overrides.c@0:9fca2b23d0ba, 2019-02-23 (annotated)

Committer:
marcozecchini
Date:
Sat Feb 23 12:13:36 2019 +0000
Revision:
0:9fca2b23d0ba
final commit

Who changed what in which revision?

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marcozecchini 0:9fca2b23d0ba 1 /* mbed Microcontroller Library
marcozecchini 0:9fca2b23d0ba 2 * Copyright (c) 2017, STMicroelectronics
marcozecchini 0:9fca2b23d0ba 3 * All rights reserved.
marcozecchini 0:9fca2b23d0ba 4 *
marcozecchini 0:9fca2b23d0ba 5 * Redistribution and use in source and binary forms, with or without
marcozecchini 0:9fca2b23d0ba 6 * modification, are permitted provided that the following conditions are met:
marcozecchini 0:9fca2b23d0ba 7 *
marcozecchini 0:9fca2b23d0ba 8 * 1. Redistributions of source code must retain the above copyright notice,
marcozecchini 0:9fca2b23d0ba 9 * this list of conditions and the following disclaimer.
marcozecchini 0:9fca2b23d0ba 10 * 2. Redistributions in binary form must reproduce the above copyright notice,
marcozecchini 0:9fca2b23d0ba 11 * this list of conditions and the following disclaimer in the documentation
marcozecchini 0:9fca2b23d0ba 12 * and/or other materials provided with the distribution.
marcozecchini 0:9fca2b23d0ba 13 * 3. Neither the name of STMicroelectronics nor the names of its contributors
marcozecchini 0:9fca2b23d0ba 14 * may be used to endorse or promote products derived from this software
marcozecchini 0:9fca2b23d0ba 15 * without specific prior written permission.
marcozecchini 0:9fca2b23d0ba 16 *
marcozecchini 0:9fca2b23d0ba 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
marcozecchini 0:9fca2b23d0ba 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
marcozecchini 0:9fca2b23d0ba 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
marcozecchini 0:9fca2b23d0ba 20 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
marcozecchini 0:9fca2b23d0ba 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
marcozecchini 0:9fca2b23d0ba 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
marcozecchini 0:9fca2b23d0ba 23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
marcozecchini 0:9fca2b23d0ba 24 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
marcozecchini 0:9fca2b23d0ba 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
marcozecchini 0:9fca2b23d0ba 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
marcozecchini 0:9fca2b23d0ba 27 */
marcozecchini 0:9fca2b23d0ba 28 #include "cmsis.h"
marcozecchini 0:9fca2b23d0ba 29
marcozecchini 0:9fca2b23d0ba 30 // This function is called after RAM initialization and before main.
marcozecchini 0:9fca2b23d0ba 31 void mbed_sdk_init()
marcozecchini 0:9fca2b23d0ba 32 {
marcozecchini 0:9fca2b23d0ba 33 // Update the SystemCoreClock variable.
marcozecchini 0:9fca2b23d0ba 34 SystemCoreClockUpdate();
marcozecchini 0:9fca2b23d0ba 35 HAL_Init();
marcozecchini 0:9fca2b23d0ba 36
marcozecchini 0:9fca2b23d0ba 37 #if TARGET_STM32F7
marcozecchini 0:9fca2b23d0ba 38 // Enable CPU L1-Cache
marcozecchini 0:9fca2b23d0ba 39 SCB_EnableICache();
marcozecchini 0:9fca2b23d0ba 40 SCB_EnableDCache();
marcozecchini 0:9fca2b23d0ba 41 #endif /* TARGET_STM32F7 */
marcozecchini 0:9fca2b23d0ba 42
marcozecchini 0:9fca2b23d0ba 43 /* Configure the System clock source, PLL Multiplier and Divider factors,
marcozecchini 0:9fca2b23d0ba 44 AHB/APBx prescalers and Flash settings */
marcozecchini 0:9fca2b23d0ba 45 SetSysClock();
marcozecchini 0:9fca2b23d0ba 46 SystemCoreClockUpdate();
marcozecchini 0:9fca2b23d0ba 47 }