Marco Zecchini / Mbed OS Example_RTOS

Rtos API example

mbed-os/targets/TARGET_NXP/mbed_rtx.h@0:9fca2b23d0ba, 2019-02-23 (annotated)

Committer:
marcozecchini
Date:
Sat Feb 23 12:13:36 2019 +0000
Revision:
0:9fca2b23d0ba
final commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
marcozecchini 0:9fca2b23d0ba 1 /* mbed Microcontroller Library
marcozecchini 0:9fca2b23d0ba 2 * Copyright (c) 2016 ARM Limited
marcozecchini 0:9fca2b23d0ba 3 *
marcozecchini 0:9fca2b23d0ba 4 * Licensed under the Apache License, Version 2.0 (the "License");
marcozecchini 0:9fca2b23d0ba 5 * you may not use this file except in compliance with the License.
marcozecchini 0:9fca2b23d0ba 6 * You may obtain a copy of the License at
marcozecchini 0:9fca2b23d0ba 7 *
marcozecchini 0:9fca2b23d0ba 8 * http://www.apache.org/licenses/LICENSE-2.0
marcozecchini 0:9fca2b23d0ba 9 *
marcozecchini 0:9fca2b23d0ba 10 * Unless required by applicable law or agreed to in writing, software
marcozecchini 0:9fca2b23d0ba 11 * distributed under the License is distributed on an "AS IS" BASIS,
marcozecchini 0:9fca2b23d0ba 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
marcozecchini 0:9fca2b23d0ba 13 * See the License for the specific language governing permissions and
marcozecchini 0:9fca2b23d0ba 14 * limitations under the License.
marcozecchini 0:9fca2b23d0ba 15 */
marcozecchini 0:9fca2b23d0ba 16
marcozecchini 0:9fca2b23d0ba 17 #ifndef MBED_MBED_RTX_H
marcozecchini 0:9fca2b23d0ba 18 #define MBED_MBED_RTX_H
marcozecchini 0:9fca2b23d0ba 19
marcozecchini 0:9fca2b23d0ba 20 #if defined(TARGET_LPC11U68)
marcozecchini 0:9fca2b23d0ba 21
marcozecchini 0:9fca2b23d0ba 22 #ifndef INITIAL_SP
marcozecchini 0:9fca2b23d0ba 23 #define INITIAL_SP (0x10008000UL)
marcozecchini 0:9fca2b23d0ba 24 #endif
marcozecchini 0:9fca2b23d0ba 25
marcozecchini 0:9fca2b23d0ba 26 #elif defined(TARGET_LPC11U24) \
marcozecchini 0:9fca2b23d0ba 27 || defined(TARGET_LPC11U35_401) \
marcozecchini 0:9fca2b23d0ba 28 || defined(TARGET_LPC11U35_501) \
marcozecchini 0:9fca2b23d0ba 29 || defined(TARGET_LPCCAPPUCCINO)
marcozecchini 0:9fca2b23d0ba 30
marcozecchini 0:9fca2b23d0ba 31 #ifndef INITIAL_SP
marcozecchini 0:9fca2b23d0ba 32 #define INITIAL_SP (0x10002000UL)
marcozecchini 0:9fca2b23d0ba 33 #endif
marcozecchini 0:9fca2b23d0ba 34
marcozecchini 0:9fca2b23d0ba 35 #elif defined(TARGET_LPC1114)
marcozecchini 0:9fca2b23d0ba 36
marcozecchini 0:9fca2b23d0ba 37 #ifndef INITIAL_SP
marcozecchini 0:9fca2b23d0ba 38 #define INITIAL_SP (0x10001000UL)
marcozecchini 0:9fca2b23d0ba 39 #endif
marcozecchini 0:9fca2b23d0ba 40
marcozecchini 0:9fca2b23d0ba 41 #elif defined(TARGET_LPC1347)
marcozecchini 0:9fca2b23d0ba 42
marcozecchini 0:9fca2b23d0ba 43 #ifndef INITIAL_SP
marcozecchini 0:9fca2b23d0ba 44 #define INITIAL_SP (0x10002000UL)
marcozecchini 0:9fca2b23d0ba 45 #endif
marcozecchini 0:9fca2b23d0ba 46
marcozecchini 0:9fca2b23d0ba 47 #elif defined(TARGET_LPC1549)
marcozecchini 0:9fca2b23d0ba 48
marcozecchini 0:9fca2b23d0ba 49 #ifndef INITIAL_SP
marcozecchini 0:9fca2b23d0ba 50 #define INITIAL_SP (0x02009000UL)
marcozecchini 0:9fca2b23d0ba 51 #endif
marcozecchini 0:9fca2b23d0ba 52
marcozecchini 0:9fca2b23d0ba 53 #elif defined(TARGET_LPC1768) || defined(TARGET_LPC1769)
marcozecchini 0:9fca2b23d0ba 54
marcozecchini 0:9fca2b23d0ba 55 #ifndef INITIAL_SP
marcozecchini 0:9fca2b23d0ba 56 #define INITIAL_SP (0x10008000UL)
marcozecchini 0:9fca2b23d0ba 57 #endif
marcozecchini 0:9fca2b23d0ba 58
marcozecchini 0:9fca2b23d0ba 59 #elif defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM)
marcozecchini 0:9fca2b23d0ba 60
marcozecchini 0:9fca2b23d0ba 61 #ifndef INITIAL_SP
marcozecchini 0:9fca2b23d0ba 62 #define INITIAL_SP (0x10010000UL)
marcozecchini 0:9fca2b23d0ba 63 #endif
marcozecchini 0:9fca2b23d0ba 64
marcozecchini 0:9fca2b23d0ba 65 #elif defined(TARGET_LPC4330) || defined(TARGET_LPC4337)
marcozecchini 0:9fca2b23d0ba 66
marcozecchini 0:9fca2b23d0ba 67 #ifndef INITIAL_SP
marcozecchini 0:9fca2b23d0ba 68 #define INITIAL_SP (0x10008000UL)
marcozecchini 0:9fca2b23d0ba 69 #endif
marcozecchini 0:9fca2b23d0ba 70
marcozecchini 0:9fca2b23d0ba 71 #elif defined(TARGET_LPC812)
marcozecchini 0:9fca2b23d0ba 72
marcozecchini 0:9fca2b23d0ba 73 #ifndef INITIAL_SP
marcozecchini 0:9fca2b23d0ba 74 #define INITIAL_SP (0x10001000UL)
marcozecchini 0:9fca2b23d0ba 75 #endif
marcozecchini 0:9fca2b23d0ba 76
marcozecchini 0:9fca2b23d0ba 77 #elif defined(TARGET_LPC824) || defined(TARGET_SSCI824)
marcozecchini 0:9fca2b23d0ba 78
marcozecchini 0:9fca2b23d0ba 79 #ifndef INITIAL_SP
marcozecchini 0:9fca2b23d0ba 80 #define INITIAL_SP (0x10002000UL)
marcozecchini 0:9fca2b23d0ba 81 #endif
marcozecchini 0:9fca2b23d0ba 82
marcozecchini 0:9fca2b23d0ba 83 #elif defined(TARGET_LPC54114_M4)
marcozecchini 0:9fca2b23d0ba 84
marcozecchini 0:9fca2b23d0ba 85 #ifndef INITIAL_SP
marcozecchini 0:9fca2b23d0ba 86 #define INITIAL_SP (0x20010000UL)
marcozecchini 0:9fca2b23d0ba 87 #endif
marcozecchini 0:9fca2b23d0ba 88
marcozecchini 0:9fca2b23d0ba 89 #elif defined(TARGET_LPC546XX)
marcozecchini 0:9fca2b23d0ba 90
marcozecchini 0:9fca2b23d0ba 91 #ifndef INITIAL_SP
marcozecchini 0:9fca2b23d0ba 92 #define INITIAL_SP (0x20028000UL)
marcozecchini 0:9fca2b23d0ba 93 #endif
marcozecchini 0:9fca2b23d0ba 94
marcozecchini 0:9fca2b23d0ba 95 #endif
marcozecchini 0:9fca2b23d0ba 96
marcozecchini 0:9fca2b23d0ba 97 #endif // MBED_MBED_RTX_H