Marco Zecchini / Mbed OS Example_RTOS

Rtos API example

mbed-os/hal/spi_api.h@0:9fca2b23d0ba, 2019-02-23 (annotated)

Committer:
marcozecchini
Date:
Sat Feb 23 12:13:36 2019 +0000
Revision:
0:9fca2b23d0ba
final commit

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marcozecchini 0:9fca2b23d0ba 1
marcozecchini 0:9fca2b23d0ba 2 /** \addtogroup hal */
marcozecchini 0:9fca2b23d0ba 3 /** @{*/
marcozecchini 0:9fca2b23d0ba 4 /* mbed Microcontroller Library
marcozecchini 0:9fca2b23d0ba 5 * Copyright (c) 2006-2013 ARM Limited
marcozecchini 0:9fca2b23d0ba 6 *
marcozecchini 0:9fca2b23d0ba 7 * Licensed under the Apache License, Version 2.0 (the "License");
marcozecchini 0:9fca2b23d0ba 8 * you may not use this file except in compliance with the License.
marcozecchini 0:9fca2b23d0ba 9 * You may obtain a copy of the License at
marcozecchini 0:9fca2b23d0ba 10 *
marcozecchini 0:9fca2b23d0ba 11 * http://www.apache.org/licenses/LICENSE-2.0
marcozecchini 0:9fca2b23d0ba 12 *
marcozecchini 0:9fca2b23d0ba 13 * Unless required by applicable law or agreed to in writing, software
marcozecchini 0:9fca2b23d0ba 14 * distributed under the License is distributed on an "AS IS" BASIS,
marcozecchini 0:9fca2b23d0ba 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
marcozecchini 0:9fca2b23d0ba 16 * See the License for the specific language governing permissions and
marcozecchini 0:9fca2b23d0ba 17 * limitations under the License.
marcozecchini 0:9fca2b23d0ba 18 */
marcozecchini 0:9fca2b23d0ba 19 #ifndef MBED_SPI_API_H
marcozecchini 0:9fca2b23d0ba 20 #define MBED_SPI_API_H
marcozecchini 0:9fca2b23d0ba 21
marcozecchini 0:9fca2b23d0ba 22 #include "device.h"
marcozecchini 0:9fca2b23d0ba 23 #include "hal/dma_api.h"
marcozecchini 0:9fca2b23d0ba 24 #include "hal/buffer.h"
marcozecchini 0:9fca2b23d0ba 25
marcozecchini 0:9fca2b23d0ba 26 #if DEVICE_SPI
marcozecchini 0:9fca2b23d0ba 27
marcozecchini 0:9fca2b23d0ba 28 #define SPI_EVENT_ERROR (1 << 1)
marcozecchini 0:9fca2b23d0ba 29 #define SPI_EVENT_COMPLETE (1 << 2)
marcozecchini 0:9fca2b23d0ba 30 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
marcozecchini 0:9fca2b23d0ba 31 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
marcozecchini 0:9fca2b23d0ba 32
marcozecchini 0:9fca2b23d0ba 33 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
marcozecchini 0:9fca2b23d0ba 34
marcozecchini 0:9fca2b23d0ba 35 #define SPI_FILL_WORD (0xFFFF)
marcozecchini 0:9fca2b23d0ba 36 #define SPI_FILL_CHAR (0xFF)
marcozecchini 0:9fca2b23d0ba 37
marcozecchini 0:9fca2b23d0ba 38 #if DEVICE_SPI_ASYNCH
marcozecchini 0:9fca2b23d0ba 39 /** Asynch SPI HAL structure
marcozecchini 0:9fca2b23d0ba 40 */
marcozecchini 0:9fca2b23d0ba 41 typedef struct {
marcozecchini 0:9fca2b23d0ba 42 struct spi_s spi; /**< Target specific SPI structure */
marcozecchini 0:9fca2b23d0ba 43 struct buffer_s tx_buff; /**< Tx buffer */
marcozecchini 0:9fca2b23d0ba 44 struct buffer_s rx_buff; /**< Rx buffer */
marcozecchini 0:9fca2b23d0ba 45 } spi_t;
marcozecchini 0:9fca2b23d0ba 46
marcozecchini 0:9fca2b23d0ba 47 #else
marcozecchini 0:9fca2b23d0ba 48 /** Non-asynch SPI HAL structure
marcozecchini 0:9fca2b23d0ba 49 */
marcozecchini 0:9fca2b23d0ba 50 typedef struct spi_s spi_t;
marcozecchini 0:9fca2b23d0ba 51
marcozecchini 0:9fca2b23d0ba 52 #endif
marcozecchini 0:9fca2b23d0ba 53
marcozecchini 0:9fca2b23d0ba 54 #ifdef __cplusplus
marcozecchini 0:9fca2b23d0ba 55 extern "C" {
marcozecchini 0:9fca2b23d0ba 56 #endif
marcozecchini 0:9fca2b23d0ba 57
marcozecchini 0:9fca2b23d0ba 58 /**
marcozecchini 0:9fca2b23d0ba 59 * \defgroup hal_GeneralSPI SPI Configuration Functions
marcozecchini 0:9fca2b23d0ba 60 * @{
marcozecchini 0:9fca2b23d0ba 61 */
marcozecchini 0:9fca2b23d0ba 62
marcozecchini 0:9fca2b23d0ba 63 /** Initialize the SPI peripheral
marcozecchini 0:9fca2b23d0ba 64 *
marcozecchini 0:9fca2b23d0ba 65 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
marcozecchini 0:9fca2b23d0ba 66 * @param[out] obj The SPI object to initialize
marcozecchini 0:9fca2b23d0ba 67 * @param[in] mosi The pin to use for MOSI
marcozecchini 0:9fca2b23d0ba 68 * @param[in] miso The pin to use for MISO
marcozecchini 0:9fca2b23d0ba 69 * @param[in] sclk The pin to use for SCLK
marcozecchini 0:9fca2b23d0ba 70 * @param[in] ssel The pin to use for SSEL
marcozecchini 0:9fca2b23d0ba 71 */
marcozecchini 0:9fca2b23d0ba 72 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
marcozecchini 0:9fca2b23d0ba 73
marcozecchini 0:9fca2b23d0ba 74 /** Release a SPI object
marcozecchini 0:9fca2b23d0ba 75 *
marcozecchini 0:9fca2b23d0ba 76 * TODO: spi_free is currently unimplemented
marcozecchini 0:9fca2b23d0ba 77 * This will require reference counting at the C++ level to be safe
marcozecchini 0:9fca2b23d0ba 78 *
marcozecchini 0:9fca2b23d0ba 79 * Return the pins owned by the SPI object to their reset state
marcozecchini 0:9fca2b23d0ba 80 * Disable the SPI peripheral
marcozecchini 0:9fca2b23d0ba 81 * Disable the SPI clock
marcozecchini 0:9fca2b23d0ba 82 * @param[in] obj The SPI object to deinitialize
marcozecchini 0:9fca2b23d0ba 83 */
marcozecchini 0:9fca2b23d0ba 84 void spi_free(spi_t *obj);
marcozecchini 0:9fca2b23d0ba 85
marcozecchini 0:9fca2b23d0ba 86 /** Configure the SPI format
marcozecchini 0:9fca2b23d0ba 87 *
marcozecchini 0:9fca2b23d0ba 88 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
marcozecchini 0:9fca2b23d0ba 89 * The default bit order is MSB.
marcozecchini 0:9fca2b23d0ba 90 * @param[in,out] obj The SPI object to configure
marcozecchini 0:9fca2b23d0ba 91 * @param[in] bits The number of bits per frame
marcozecchini 0:9fca2b23d0ba 92 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
marcozecchini 0:9fca2b23d0ba 93 * @param[in] slave Zero for master mode or non-zero for slave mode
marcozecchini 0:9fca2b23d0ba 94 */
marcozecchini 0:9fca2b23d0ba 95 void spi_format(spi_t *obj, int bits, int mode, int slave);
marcozecchini 0:9fca2b23d0ba 96
marcozecchini 0:9fca2b23d0ba 97 /** Set the SPI baud rate
marcozecchini 0:9fca2b23d0ba 98 *
marcozecchini 0:9fca2b23d0ba 99 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
marcozecchini 0:9fca2b23d0ba 100 * Configures the SPI peripheral's baud rate
marcozecchini 0:9fca2b23d0ba 101 * @param[in,out] obj The SPI object to configure
marcozecchini 0:9fca2b23d0ba 102 * @param[in] hz The baud rate in Hz
marcozecchini 0:9fca2b23d0ba 103 */
marcozecchini 0:9fca2b23d0ba 104 void spi_frequency(spi_t *obj, int hz);
marcozecchini 0:9fca2b23d0ba 105
marcozecchini 0:9fca2b23d0ba 106 /**@}*/
marcozecchini 0:9fca2b23d0ba 107 /**
marcozecchini 0:9fca2b23d0ba 108 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
marcozecchini 0:9fca2b23d0ba 109 * @{
marcozecchini 0:9fca2b23d0ba 110 */
marcozecchini 0:9fca2b23d0ba 111
marcozecchini 0:9fca2b23d0ba 112 /** Write a byte out in master mode and receive a value
marcozecchini 0:9fca2b23d0ba 113 *
marcozecchini 0:9fca2b23d0ba 114 * @param[in] obj The SPI peripheral to use for sending
marcozecchini 0:9fca2b23d0ba 115 * @param[in] value The value to send
marcozecchini 0:9fca2b23d0ba 116 * @return Returns the value received during send
marcozecchini 0:9fca2b23d0ba 117 */
marcozecchini 0:9fca2b23d0ba 118 int spi_master_write(spi_t *obj, int value);
marcozecchini 0:9fca2b23d0ba 119
marcozecchini 0:9fca2b23d0ba 120 /** Write a block out in master mode and receive a value
marcozecchini 0:9fca2b23d0ba 121 *
marcozecchini 0:9fca2b23d0ba 122 * The total number of bytes sent and recieved will be the maximum of
marcozecchini 0:9fca2b23d0ba 123 * tx_length and rx_length. The bytes written will be padded with the
marcozecchini 0:9fca2b23d0ba 124 * value 0xff.
marcozecchini 0:9fca2b23d0ba 125 *
marcozecchini 0:9fca2b23d0ba 126 * @param[in] obj The SPI peripheral to use for sending
marcozecchini 0:9fca2b23d0ba 127 * @param[in] tx_buffer Pointer to the byte-array of data to write to the device
marcozecchini 0:9fca2b23d0ba 128 * @param[in] tx_length Number of bytes to write, may be zero
marcozecchini 0:9fca2b23d0ba 129 * @param[in] rx_buffer Pointer to the byte-array of data to read from the device
marcozecchini 0:9fca2b23d0ba 130 * @param[in] rx_length Number of bytes to read, may be zero
marcozecchini 0:9fca2b23d0ba 131 * @param[in] write_fill Default data transmitted while performing a read
marcozecchini 0:9fca2b23d0ba 132 * @returns
marcozecchini 0:9fca2b23d0ba 133 * The number of bytes written and read from the device. This is
marcozecchini 0:9fca2b23d0ba 134 * maximum of tx_length and rx_length.
marcozecchini 0:9fca2b23d0ba 135 */
marcozecchini 0:9fca2b23d0ba 136 int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, char write_fill);
marcozecchini 0:9fca2b23d0ba 137
marcozecchini 0:9fca2b23d0ba 138 /** Check if a value is available to read
marcozecchini 0:9fca2b23d0ba 139 *
marcozecchini 0:9fca2b23d0ba 140 * @param[in] obj The SPI peripheral to check
marcozecchini 0:9fca2b23d0ba 141 * @return non-zero if a value is available
marcozecchini 0:9fca2b23d0ba 142 */
marcozecchini 0:9fca2b23d0ba 143 int spi_slave_receive(spi_t *obj);
marcozecchini 0:9fca2b23d0ba 144
marcozecchini 0:9fca2b23d0ba 145 /** Get a received value out of the SPI receive buffer in slave mode
marcozecchini 0:9fca2b23d0ba 146 *
marcozecchini 0:9fca2b23d0ba 147 * Blocks until a value is available
marcozecchini 0:9fca2b23d0ba 148 * @param[in] obj The SPI peripheral to read
marcozecchini 0:9fca2b23d0ba 149 * @return The value received
marcozecchini 0:9fca2b23d0ba 150 */
marcozecchini 0:9fca2b23d0ba 151 int spi_slave_read(spi_t *obj);
marcozecchini 0:9fca2b23d0ba 152
marcozecchini 0:9fca2b23d0ba 153 /** Write a value to the SPI peripheral in slave mode
marcozecchini 0:9fca2b23d0ba 154 *
marcozecchini 0:9fca2b23d0ba 155 * Blocks until the SPI peripheral can be written to
marcozecchini 0:9fca2b23d0ba 156 * @param[in] obj The SPI peripheral to write
marcozecchini 0:9fca2b23d0ba 157 * @param[in] value The value to write
marcozecchini 0:9fca2b23d0ba 158 */
marcozecchini 0:9fca2b23d0ba 159 void spi_slave_write(spi_t *obj, int value);
marcozecchini 0:9fca2b23d0ba 160
marcozecchini 0:9fca2b23d0ba 161 /** Checks if the specified SPI peripheral is in use
marcozecchini 0:9fca2b23d0ba 162 *
marcozecchini 0:9fca2b23d0ba 163 * @param[in] obj The SPI peripheral to check
marcozecchini 0:9fca2b23d0ba 164 * @return non-zero if the peripheral is currently transmitting
marcozecchini 0:9fca2b23d0ba 165 */
marcozecchini 0:9fca2b23d0ba 166 int spi_busy(spi_t *obj);
marcozecchini 0:9fca2b23d0ba 167
marcozecchini 0:9fca2b23d0ba 168 /** Get the module number
marcozecchini 0:9fca2b23d0ba 169 *
marcozecchini 0:9fca2b23d0ba 170 * @param[in] obj The SPI peripheral to check
marcozecchini 0:9fca2b23d0ba 171 * @return The module number
marcozecchini 0:9fca2b23d0ba 172 */
marcozecchini 0:9fca2b23d0ba 173 uint8_t spi_get_module(spi_t *obj);
marcozecchini 0:9fca2b23d0ba 174
marcozecchini 0:9fca2b23d0ba 175 /**@}*/
marcozecchini 0:9fca2b23d0ba 176
marcozecchini 0:9fca2b23d0ba 177 #if DEVICE_SPI_ASYNCH
marcozecchini 0:9fca2b23d0ba 178 /**
marcozecchini 0:9fca2b23d0ba 179 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
marcozecchini 0:9fca2b23d0ba 180 * @{
marcozecchini 0:9fca2b23d0ba 181 */
marcozecchini 0:9fca2b23d0ba 182
marcozecchini 0:9fca2b23d0ba 183 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
marcozecchini 0:9fca2b23d0ba 184 *
marcozecchini 0:9fca2b23d0ba 185 * @param[in] obj The SPI object that holds the transfer information
marcozecchini 0:9fca2b23d0ba 186 * @param[in] tx The transmit buffer
marcozecchini 0:9fca2b23d0ba 187 * @param[in] tx_length The number of bytes to transmit
marcozecchini 0:9fca2b23d0ba 188 * @param[in] rx The receive buffer
marcozecchini 0:9fca2b23d0ba 189 * @param[in] rx_length The number of bytes to receive
marcozecchini 0:9fca2b23d0ba 190 * @param[in] bit_width The bit width of buffer words
marcozecchini 0:9fca2b23d0ba 191 * @param[in] event The logical OR of events to be registered
marcozecchini 0:9fca2b23d0ba 192 * @param[in] handler SPI interrupt handler
marcozecchini 0:9fca2b23d0ba 193 * @param[in] hint A suggestion for how to use DMA with this transfer
marcozecchini 0:9fca2b23d0ba 194 */
marcozecchini 0:9fca2b23d0ba 195 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
marcozecchini 0:9fca2b23d0ba 196
marcozecchini 0:9fca2b23d0ba 197 /** The asynchronous IRQ handler
marcozecchini 0:9fca2b23d0ba 198 *
marcozecchini 0:9fca2b23d0ba 199 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
marcozecchini 0:9fca2b23d0ba 200 * conditions, such as buffer overflows or transfer complete.
marcozecchini 0:9fca2b23d0ba 201 * @param[in] obj The SPI object that holds the transfer information
marcozecchini 0:9fca2b23d0ba 202 * @return Event flags if a transfer termination condition was met; otherwise 0.
marcozecchini 0:9fca2b23d0ba 203 */
marcozecchini 0:9fca2b23d0ba 204 uint32_t spi_irq_handler_asynch(spi_t *obj);
marcozecchini 0:9fca2b23d0ba 205
marcozecchini 0:9fca2b23d0ba 206 /** Attempts to determine if the SPI peripheral is already in use
marcozecchini 0:9fca2b23d0ba 207 *
marcozecchini 0:9fca2b23d0ba 208 * If a temporary DMA channel has been allocated, peripheral is in use.
marcozecchini 0:9fca2b23d0ba 209 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
marcozecchini 0:9fca2b23d0ba 210 * channel were allocated.
marcozecchini 0:9fca2b23d0ba 211 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
marcozecchini 0:9fca2b23d0ba 212 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
marcozecchini 0:9fca2b23d0ba 213 * there are any bytes in the FIFOs.
marcozecchini 0:9fca2b23d0ba 214 * @param[in] obj The SPI object to check for activity
marcozecchini 0:9fca2b23d0ba 215 * @return Non-zero if the SPI port is active or zero if it is not.
marcozecchini 0:9fca2b23d0ba 216 */
marcozecchini 0:9fca2b23d0ba 217 uint8_t spi_active(spi_t *obj);
marcozecchini 0:9fca2b23d0ba 218
marcozecchini 0:9fca2b23d0ba 219 /** Abort an SPI transfer
marcozecchini 0:9fca2b23d0ba 220 *
marcozecchini 0:9fca2b23d0ba 221 * @param obj The SPI peripheral to stop
marcozecchini 0:9fca2b23d0ba 222 */
marcozecchini 0:9fca2b23d0ba 223 void spi_abort_asynch(spi_t *obj);
marcozecchini 0:9fca2b23d0ba 224
marcozecchini 0:9fca2b23d0ba 225
marcozecchini 0:9fca2b23d0ba 226 #endif
marcozecchini 0:9fca2b23d0ba 227
marcozecchini 0:9fca2b23d0ba 228 /**@}*/
marcozecchini 0:9fca2b23d0ba 229
marcozecchini 0:9fca2b23d0ba 230 #ifdef __cplusplus
marcozecchini 0:9fca2b23d0ba 231 }
marcozecchini 0:9fca2b23d0ba 232 #endif // __cplusplus
marcozecchini 0:9fca2b23d0ba 233
marcozecchini 0:9fca2b23d0ba 234 #endif // SPI_DEVICE
marcozecchini 0:9fca2b23d0ba 235
marcozecchini 0:9fca2b23d0ba 236 #endif // MBED_SPI_API_H
marcozecchini 0:9fca2b23d0ba 237
marcozecchini 0:9fca2b23d0ba 238 /** @}*/