Mark Vandermeulen / FYDP_Final

Code for our FYDP -only one IMU works right now -RTOS is working

Dependencies:   mbed

mbed/mbed-rtos/rtx/rt_HAL_CM.h@0:964eb6a2ef00, 2015-03-18 (annotated)

Committer:
majik
Date:
Wed Mar 18 22:23:48 2015 +0000
Revision:
0:964eb6a2ef00
This is our FYDP code, but only one IMU works with the RTOS.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
majik 0:964eb6a2ef00 1 /*----------------------------------------------------------------------------
majik 0:964eb6a2ef00 2 * RL-ARM - RTX
majik 0:964eb6a2ef00 3 *----------------------------------------------------------------------------
majik 0:964eb6a2ef00 4 * Name: RT_HAL_CM.H
majik 0:964eb6a2ef00 5 * Purpose: Hardware Abstraction Layer for Cortex-M definitions
majik 0:964eb6a2ef00 6 * Rev.: V4.60
majik 0:964eb6a2ef00 7 *----------------------------------------------------------------------------
majik 0:964eb6a2ef00 8 *
majik 0:964eb6a2ef00 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
majik 0:964eb6a2ef00 10 * All rights reserved.
majik 0:964eb6a2ef00 11 * Redistribution and use in source and binary forms, with or without
majik 0:964eb6a2ef00 12 * modification, are permitted provided that the following conditions are met:
majik 0:964eb6a2ef00 13 * - Redistributions of source code must retain the above copyright
majik 0:964eb6a2ef00 14 * notice, this list of conditions and the following disclaimer.
majik 0:964eb6a2ef00 15 * - Redistributions in binary form must reproduce the above copyright
majik 0:964eb6a2ef00 16 * notice, this list of conditions and the following disclaimer in the
majik 0:964eb6a2ef00 17 * documentation and/or other materials provided with the distribution.
majik 0:964eb6a2ef00 18 * - Neither the name of ARM nor the names of its contributors may be used
majik 0:964eb6a2ef00 19 * to endorse or promote products derived from this software without
majik 0:964eb6a2ef00 20 * specific prior written permission.
majik 0:964eb6a2ef00 21 *
majik 0:964eb6a2ef00 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
majik 0:964eb6a2ef00 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
majik 0:964eb6a2ef00 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
majik 0:964eb6a2ef00 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
majik 0:964eb6a2ef00 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
majik 0:964eb6a2ef00 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
majik 0:964eb6a2ef00 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
majik 0:964eb6a2ef00 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
majik 0:964eb6a2ef00 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
majik 0:964eb6a2ef00 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
majik 0:964eb6a2ef00 32 * POSSIBILITY OF SUCH DAMAGE.
majik 0:964eb6a2ef00 33 *---------------------------------------------------------------------------*/
majik 0:964eb6a2ef00 34
majik 0:964eb6a2ef00 35 /* Definitions */
majik 0:964eb6a2ef00 36 #define INITIAL_xPSR 0x01000000
majik 0:964eb6a2ef00 37 #define DEMCR_TRCENA 0x01000000
majik 0:964eb6a2ef00 38 #define ITM_ITMENA 0x00000001
majik 0:964eb6a2ef00 39 #define MAGIC_WORD 0xE25A2EA5
majik 0:964eb6a2ef00 40
majik 0:964eb6a2ef00 41 #if defined (__CC_ARM) /* ARM Compiler */
majik 0:964eb6a2ef00 42
majik 0:964eb6a2ef00 43 #if ((__TARGET_ARCH_7_M || __TARGET_ARCH_7E_M) && !NO_EXCLUSIVE_ACCESS)
majik 0:964eb6a2ef00 44 #define __USE_EXCLUSIVE_ACCESS
majik 0:964eb6a2ef00 45 #else
majik 0:964eb6a2ef00 46 #undef __USE_EXCLUSIVE_ACCESS
majik 0:964eb6a2ef00 47 #endif
majik 0:964eb6a2ef00 48
majik 0:964eb6a2ef00 49 #elif defined (__GNUC__) /* GNU Compiler */
majik 0:964eb6a2ef00 50
majik 0:964eb6a2ef00 51 #undef __USE_EXCLUSIVE_ACCESS
majik 0:964eb6a2ef00 52
majik 0:964eb6a2ef00 53 #if defined (__CORTEX_M0) || defined (__CORTEX_M0PLUS)
majik 0:964eb6a2ef00 54 #define __TARGET_ARCH_6S_M 1
majik 0:964eb6a2ef00 55 #else
majik 0:964eb6a2ef00 56 #define __TARGET_ARCH_6S_M 0
majik 0:964eb6a2ef00 57 #endif
majik 0:964eb6a2ef00 58
majik 0:964eb6a2ef00 59 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
majik 0:964eb6a2ef00 60 #define __TARGET_FPU_VFP 1
majik 0:964eb6a2ef00 61 #else
majik 0:964eb6a2ef00 62 #define __TARGET_FPU_VFP 0
majik 0:964eb6a2ef00 63 #endif
majik 0:964eb6a2ef00 64
majik 0:964eb6a2ef00 65 #define __inline inline
majik 0:964eb6a2ef00 66 #define __weak __attribute__((weak))
majik 0:964eb6a2ef00 67
majik 0:964eb6a2ef00 68 #ifndef __CMSIS_GENERIC
majik 0:964eb6a2ef00 69
majik 0:964eb6a2ef00 70 __attribute__((always_inline)) static inline void __enable_irq(void)
majik 0:964eb6a2ef00 71 {
majik 0:964eb6a2ef00 72 __asm volatile ("cpsie i");
majik 0:964eb6a2ef00 73 }
majik 0:964eb6a2ef00 74
majik 0:964eb6a2ef00 75 __attribute__((always_inline)) static inline U32 __disable_irq(void)
majik 0:964eb6a2ef00 76 {
majik 0:964eb6a2ef00 77 U32 result;
majik 0:964eb6a2ef00 78
majik 0:964eb6a2ef00 79 __asm volatile ("mrs %0, primask" : "=r" (result));
majik 0:964eb6a2ef00 80 __asm volatile ("cpsid i");
majik 0:964eb6a2ef00 81 return(result & 1);
majik 0:964eb6a2ef00 82 }
majik 0:964eb6a2ef00 83
majik 0:964eb6a2ef00 84 #endif
majik 0:964eb6a2ef00 85
majik 0:964eb6a2ef00 86 __attribute__(( always_inline)) static inline U8 __clz(U32 value)
majik 0:964eb6a2ef00 87 {
majik 0:964eb6a2ef00 88 U8 result;
majik 0:964eb6a2ef00 89
majik 0:964eb6a2ef00 90 __asm volatile ("clz %0, %1" : "=r" (result) : "r" (value));
majik 0:964eb6a2ef00 91 return(result);
majik 0:964eb6a2ef00 92 }
majik 0:964eb6a2ef00 93
majik 0:964eb6a2ef00 94 #elif defined (__ICCARM__) /* IAR Compiler */
majik 0:964eb6a2ef00 95
majik 0:964eb6a2ef00 96 #undef __USE_EXCLUSIVE_ACCESS
majik 0:964eb6a2ef00 97
majik 0:964eb6a2ef00 98 #if (__CORE__ == __ARM6M__)
majik 0:964eb6a2ef00 99 #define __TARGET_ARCH_6S_M 1
majik 0:964eb6a2ef00 100 #else
majik 0:964eb6a2ef00 101 #define __TARGET_ARCH_6S_M 0
majik 0:964eb6a2ef00 102 #endif
majik 0:964eb6a2ef00 103
majik 0:964eb6a2ef00 104 #if defined __ARMVFP__
majik 0:964eb6a2ef00 105 #define __TARGET_FPU_VFP 1
majik 0:964eb6a2ef00 106 #else
majik 0:964eb6a2ef00 107 #define __TARGET_FPU_VFP 0
majik 0:964eb6a2ef00 108 #endif
majik 0:964eb6a2ef00 109
majik 0:964eb6a2ef00 110 #define __inline inline
majik 0:964eb6a2ef00 111
majik 0:964eb6a2ef00 112 #ifndef __CMSIS_GENERIC
majik 0:964eb6a2ef00 113
majik 0:964eb6a2ef00 114 static inline void __enable_irq(void)
majik 0:964eb6a2ef00 115 {
majik 0:964eb6a2ef00 116 __asm volatile ("cpsie i");
majik 0:964eb6a2ef00 117 }
majik 0:964eb6a2ef00 118
majik 0:964eb6a2ef00 119 static inline U32 __disable_irq(void)
majik 0:964eb6a2ef00 120 {
majik 0:964eb6a2ef00 121 U32 result;
majik 0:964eb6a2ef00 122
majik 0:964eb6a2ef00 123 __asm volatile ("mrs %0, primask" : "=r" (result));
majik 0:964eb6a2ef00 124 __asm volatile ("cpsid i");
majik 0:964eb6a2ef00 125 return(result & 1);
majik 0:964eb6a2ef00 126 }
majik 0:964eb6a2ef00 127
majik 0:964eb6a2ef00 128 #endif
majik 0:964eb6a2ef00 129
majik 0:964eb6a2ef00 130 static inline U8 __clz(U32 value)
majik 0:964eb6a2ef00 131 {
majik 0:964eb6a2ef00 132 U8 result;
majik 0:964eb6a2ef00 133
majik 0:964eb6a2ef00 134 __asm volatile ("clz %0, %1" : "=r" (result) : "r" (value));
majik 0:964eb6a2ef00 135 return(result);
majik 0:964eb6a2ef00 136 }
majik 0:964eb6a2ef00 137
majik 0:964eb6a2ef00 138 #endif
majik 0:964eb6a2ef00 139
majik 0:964eb6a2ef00 140 /* NVIC registers */
majik 0:964eb6a2ef00 141 #define NVIC_ST_CTRL (*((volatile U32 *)0xE000E010))
majik 0:964eb6a2ef00 142 #define NVIC_ST_RELOAD (*((volatile U32 *)0xE000E014))
majik 0:964eb6a2ef00 143 #define NVIC_ST_CURRENT (*((volatile U32 *)0xE000E018))
majik 0:964eb6a2ef00 144 #define NVIC_ISER ((volatile U32 *)0xE000E100)
majik 0:964eb6a2ef00 145 #define NVIC_ICER ((volatile U32 *)0xE000E180)
majik 0:964eb6a2ef00 146 #if (__TARGET_ARCH_6S_M)
majik 0:964eb6a2ef00 147 #define NVIC_IP ((volatile U32 *)0xE000E400)
majik 0:964eb6a2ef00 148 #else
majik 0:964eb6a2ef00 149 #define NVIC_IP ((volatile U8 *)0xE000E400)
majik 0:964eb6a2ef00 150 #endif
majik 0:964eb6a2ef00 151 #define NVIC_INT_CTRL (*((volatile U32 *)0xE000ED04))
majik 0:964eb6a2ef00 152 #define NVIC_AIR_CTRL (*((volatile U32 *)0xE000ED0C))
majik 0:964eb6a2ef00 153 #define NVIC_SYS_PRI2 (*((volatile U32 *)0xE000ED1C))
majik 0:964eb6a2ef00 154 #define NVIC_SYS_PRI3 (*((volatile U32 *)0xE000ED20))
majik 0:964eb6a2ef00 155
majik 0:964eb6a2ef00 156 #define OS_PEND_IRQ() NVIC_INT_CTRL = (1<<28)
majik 0:964eb6a2ef00 157 #define OS_PENDING ((NVIC_INT_CTRL >> 26) & (1<<2 | 1))
majik 0:964eb6a2ef00 158 #define OS_UNPEND(fl) NVIC_INT_CTRL = (*fl = OS_PENDING) << 25
majik 0:964eb6a2ef00 159 #define OS_PEND(fl,p) NVIC_INT_CTRL = (fl | p<<2) << 26
majik 0:964eb6a2ef00 160 #define OS_LOCK() NVIC_ST_CTRL = 0x0005
majik 0:964eb6a2ef00 161 #define OS_UNLOCK() NVIC_ST_CTRL = 0x0007
majik 0:964eb6a2ef00 162
majik 0:964eb6a2ef00 163 #define OS_X_PENDING ((NVIC_INT_CTRL >> 28) & 1)
majik 0:964eb6a2ef00 164 #define OS_X_UNPEND(fl) NVIC_INT_CTRL = (*fl = OS_X_PENDING) << 27
majik 0:964eb6a2ef00 165 #define OS_X_PEND(fl,p) NVIC_INT_CTRL = (fl | p) << 28
majik 0:964eb6a2ef00 166 #if (__TARGET_ARCH_6S_M)
majik 0:964eb6a2ef00 167 #define OS_X_INIT(n) NVIC_IP[n>>2] |= 0xFF << (8*(n & 0x03)); \
majik 0:964eb6a2ef00 168 NVIC_ISER[n>>5] = 1 << (n & 0x1F)
majik 0:964eb6a2ef00 169 #else
majik 0:964eb6a2ef00 170 #define OS_X_INIT(n) NVIC_IP[n] = 0xFF; \
majik 0:964eb6a2ef00 171 NVIC_ISER[n>>5] = 1 << (n & 0x1F)
majik 0:964eb6a2ef00 172 #endif
majik 0:964eb6a2ef00 173 #define OS_X_LOCK(n) NVIC_ICER[n>>5] = 1 << (n & 0x1F)
majik 0:964eb6a2ef00 174 #define OS_X_UNLOCK(n) NVIC_ISER[n>>5] = 1 << (n & 0x1F)
majik 0:964eb6a2ef00 175
majik 0:964eb6a2ef00 176 /* Core Debug registers */
majik 0:964eb6a2ef00 177 #define DEMCR (*((volatile U32 *)0xE000EDFC))
majik 0:964eb6a2ef00 178
majik 0:964eb6a2ef00 179 /* ITM registers */
majik 0:964eb6a2ef00 180 #define ITM_CONTROL (*((volatile U32 *)0xE0000E80))
majik 0:964eb6a2ef00 181 #define ITM_ENABLE (*((volatile U32 *)0xE0000E00))
majik 0:964eb6a2ef00 182 #define ITM_PORT30_U32 (*((volatile U32 *)0xE0000078))
majik 0:964eb6a2ef00 183 #define ITM_PORT31_U32 (*((volatile U32 *)0xE000007C))
majik 0:964eb6a2ef00 184 #define ITM_PORT31_U16 (*((volatile U16 *)0xE000007C))
majik 0:964eb6a2ef00 185 #define ITM_PORT31_U8 (*((volatile U8 *)0xE000007C))
majik 0:964eb6a2ef00 186
majik 0:964eb6a2ef00 187 /* Variables */
majik 0:964eb6a2ef00 188 extern BIT dbg_msg;
majik 0:964eb6a2ef00 189
majik 0:964eb6a2ef00 190 /* Functions */
majik 0:964eb6a2ef00 191 #ifdef __USE_EXCLUSIVE_ACCESS
majik 0:964eb6a2ef00 192 #define rt_inc(p) while(__strex((__ldrex(p)+1),p))
majik 0:964eb6a2ef00 193 #define rt_dec(p) while(__strex((__ldrex(p)-1),p))
majik 0:964eb6a2ef00 194 #else
majik 0:964eb6a2ef00 195 #define rt_inc(p) __disable_irq();(*p)++;__enable_irq();
majik 0:964eb6a2ef00 196 #define rt_dec(p) __disable_irq();(*p)--;__enable_irq();
majik 0:964eb6a2ef00 197 #endif
majik 0:964eb6a2ef00 198
majik 0:964eb6a2ef00 199 __inline static U32 rt_inc_qi (U32 size, U8 *count, U8 *first) {
majik 0:964eb6a2ef00 200 U32 cnt,c2;
majik 0:964eb6a2ef00 201 #ifdef __USE_EXCLUSIVE_ACCESS
majik 0:964eb6a2ef00 202 do {
majik 0:964eb6a2ef00 203 if ((cnt = __ldrex(count)) == size) {
majik 0:964eb6a2ef00 204 __clrex();
majik 0:964eb6a2ef00 205 return (cnt); }
majik 0:964eb6a2ef00 206 } while (__strex(cnt+1, count));
majik 0:964eb6a2ef00 207 do {
majik 0:964eb6a2ef00 208 c2 = (cnt = __ldrex(first)) + 1;
majik 0:964eb6a2ef00 209 if (c2 == size) c2 = 0;
majik 0:964eb6a2ef00 210 } while (__strex(c2, first));
majik 0:964eb6a2ef00 211 #else
majik 0:964eb6a2ef00 212 __disable_irq();
majik 0:964eb6a2ef00 213 if ((cnt = *count) < size) {
majik 0:964eb6a2ef00 214 *count = cnt+1;
majik 0:964eb6a2ef00 215 c2 = (cnt = *first) + 1;
majik 0:964eb6a2ef00 216 if (c2 == size) c2 = 0;
majik 0:964eb6a2ef00 217 *first = c2;
majik 0:964eb6a2ef00 218 }
majik 0:964eb6a2ef00 219 __enable_irq ();
majik 0:964eb6a2ef00 220 #endif
majik 0:964eb6a2ef00 221 return (cnt);
majik 0:964eb6a2ef00 222 }
majik 0:964eb6a2ef00 223
majik 0:964eb6a2ef00 224 __inline static void rt_systick_init (void) {
majik 0:964eb6a2ef00 225 NVIC_ST_RELOAD = os_trv;
majik 0:964eb6a2ef00 226 NVIC_ST_CURRENT = 0;
majik 0:964eb6a2ef00 227 NVIC_ST_CTRL = 0x0007;
majik 0:964eb6a2ef00 228 NVIC_SYS_PRI3 |= 0xFF000000;
majik 0:964eb6a2ef00 229 }
majik 0:964eb6a2ef00 230
majik 0:964eb6a2ef00 231 __inline static void rt_svc_init (void) {
majik 0:964eb6a2ef00 232 #if !(__TARGET_ARCH_6S_M)
majik 0:964eb6a2ef00 233 int sh,prigroup;
majik 0:964eb6a2ef00 234 #endif
majik 0:964eb6a2ef00 235 NVIC_SYS_PRI3 |= 0x00FF0000;
majik 0:964eb6a2ef00 236 #if (__TARGET_ARCH_6S_M)
majik 0:964eb6a2ef00 237 NVIC_SYS_PRI2 |= (NVIC_SYS_PRI3<<(8+1)) & 0xFC000000;
majik 0:964eb6a2ef00 238 #else
majik 0:964eb6a2ef00 239 sh = 8 - __clz (~((NVIC_SYS_PRI3 << 8) & 0xFF000000));
majik 0:964eb6a2ef00 240 prigroup = ((NVIC_AIR_CTRL >> 8) & 0x07);
majik 0:964eb6a2ef00 241 if (prigroup >= sh) {
majik 0:964eb6a2ef00 242 sh = prigroup + 1;
majik 0:964eb6a2ef00 243 }
majik 0:964eb6a2ef00 244 NVIC_SYS_PRI2 = ((0xFEFFFFFF << sh) & 0xFF000000) | (NVIC_SYS_PRI2 & 0x00FFFFFF);
majik 0:964eb6a2ef00 245 #endif
majik 0:964eb6a2ef00 246 }
majik 0:964eb6a2ef00 247
majik 0:964eb6a2ef00 248 extern void rt_set_PSP (U32 stack);
majik 0:964eb6a2ef00 249 extern U32 rt_get_PSP (void);
majik 0:964eb6a2ef00 250 extern void os_set_env (void);
majik 0:964eb6a2ef00 251 extern void *_alloc_box (void *box_mem);
majik 0:964eb6a2ef00 252 extern int _free_box (void *box_mem, void *box);
majik 0:964eb6a2ef00 253
majik 0:964eb6a2ef00 254 extern void rt_init_stack (P_TCB p_TCB, FUNCP task_body);
majik 0:964eb6a2ef00 255 extern void rt_ret_val (P_TCB p_TCB, U32 v0);
majik 0:964eb6a2ef00 256 extern void rt_ret_val2 (P_TCB p_TCB, U32 v0, U32 v1);
majik 0:964eb6a2ef00 257
majik 0:964eb6a2ef00 258 extern void dbg_init (void);
majik 0:964eb6a2ef00 259 extern void dbg_task_notify (P_TCB p_tcb, BOOL create);
majik 0:964eb6a2ef00 260 extern void dbg_task_switch (U32 task_id);
majik 0:964eb6a2ef00 261
majik 0:964eb6a2ef00 262 #ifdef DBG_MSG
majik 0:964eb6a2ef00 263 #define DBG_INIT() dbg_init()
majik 0:964eb6a2ef00 264 #define DBG_TASK_NOTIFY(p_tcb,create) if (dbg_msg) dbg_task_notify(p_tcb,create)
majik 0:964eb6a2ef00 265 #define DBG_TASK_SWITCH(task_id) if (dbg_msg && (os_tsk.new_tsk != os_tsk.run)) \
majik 0:964eb6a2ef00 266 dbg_task_switch(task_id)
majik 0:964eb6a2ef00 267 #else
majik 0:964eb6a2ef00 268 #define DBG_INIT()
majik 0:964eb6a2ef00 269 #define DBG_TASK_NOTIFY(p_tcb,create)
majik 0:964eb6a2ef00 270 #define DBG_TASK_SWITCH(task_id)
majik 0:964eb6a2ef00 271 #endif
majik 0:964eb6a2ef00 272
majik 0:964eb6a2ef00 273 /*----------------------------------------------------------------------------
majik 0:964eb6a2ef00 274 * end of file
majik 0:964eb6a2ef00 275 *---------------------------------------------------------------------------*/
majik 0:964eb6a2ef00 276