Lorenzo Maiorfi / SX1272Lib_RTOS

SX1272Lib updated in order to be RTOS aware

Fork of SX1272Lib by Semtech

Since Semtech original SX1272 library used InterruptIn and Timout mbed-os classes, whose ISRs are not allowed to lock RTOS mutexes, any SPI-related operation was doomed to fail. Indeed, SPI transactions functions are always nested inside a spi-level mutex lock/unlock pair in order to provide for thread access safety. A typical case occurs for example when radio is set to sleep state after a RX timeout.

This fork solves such problems by mean of a EventQueue/Thread pair, where any InterruptIn and Timeout ISRs actually enqueue callback calls.

Take a look at usage example at https://github.com/maiorfi/mbedos_lablet_lora_1

sx1272/sx1272.cpp@11:866b939cf709, 2018-03-03 (annotated)

Committer:
Lorenzo Maiorfi
Date:
Sat Mar 03 18:07:30 2018 +0100
Revision:
11:866b939cf709
Parent:
10:bd29cdff8f3e 
Fix debug

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mluis 0:45c4f0364ca4 1 /*
mluis 0:45c4f0364ca4 2 / _____) _ | |
mluis 0:45c4f0364ca4 3 ( (____ _____ ____ _| |_ _____ ____| |__
mluis 0:45c4f0364ca4 4 \____ \| ___ | (_ _) ___ |/ ___) _ \
mluis 0:45c4f0364ca4 5 _____) ) ____| | | || |_| ____( (___| | | |
mluis 0:45c4f0364ca4 6 (______/|_____)_|_|_| \__)_____)\____)_| |_|
mluis 0:45c4f0364ca4 7 (C) 2015 Semtech
mluis 0:45c4f0364ca4 8
mluis 0:45c4f0364ca4 9 Description: Actual implementation of a SX1272 radio, inherits Radio
mluis 0:45c4f0364ca4 10
mluis 0:45c4f0364ca4 11 License: Revised BSD License, see LICENSE.TXT file include in the project
mluis 0:45c4f0364ca4 12
mluis 0:45c4f0364ca4 13 Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin
mluis 0:45c4f0364ca4 14 */
mluis 0:45c4f0364ca4 15 #include "sx1272.h"
mluis 0:45c4f0364ca4 16
mluis 0:45c4f0364ca4 17 const FskBandwidth_t SX1272::FskBandwidths[] =
mluis 7:b988b60083a1 18 {
mluis 7:b988b60083a1 19 { 2600 , 0x17 },
mluis 0:45c4f0364ca4 20 { 3100 , 0x0F },
mluis 0:45c4f0364ca4 21 { 3900 , 0x07 },
mluis 0:45c4f0364ca4 22 { 5200 , 0x16 },
mluis 0:45c4f0364ca4 23 { 6300 , 0x0E },
mluis 0:45c4f0364ca4 24 { 7800 , 0x06 },
mluis 0:45c4f0364ca4 25 { 10400 , 0x15 },
mluis 0:45c4f0364ca4 26 { 12500 , 0x0D },
mluis 0:45c4f0364ca4 27 { 15600 , 0x05 },
mluis 0:45c4f0364ca4 28 { 20800 , 0x14 },
mluis 0:45c4f0364ca4 29 { 25000 , 0x0C },
mluis 0:45c4f0364ca4 30 { 31300 , 0x04 },
mluis 0:45c4f0364ca4 31 { 41700 , 0x13 },
mluis 0:45c4f0364ca4 32 { 50000 , 0x0B },
mluis 0:45c4f0364ca4 33 { 62500 , 0x03 },
mluis 0:45c4f0364ca4 34 { 83333 , 0x12 },
mluis 0:45c4f0364ca4 35 { 100000, 0x0A },
mluis 0:45c4f0364ca4 36 { 125000, 0x02 },
mluis 0:45c4f0364ca4 37 { 166700, 0x11 },
mluis 0:45c4f0364ca4 38 { 200000, 0x09 },
mluis 0:45c4f0364ca4 39 { 250000, 0x01 },
mluis 7:b988b60083a1 40 { 300000, 0x00 }, // Invalid Bandwidth
mluis 0:45c4f0364ca4 41 };
mluis 0:45c4f0364ca4 42
mluis 0:45c4f0364ca4 43
mluis 0:45c4f0364ca4 44 SX1272::SX1272( RadioEvents_t *events,
mluis 0:45c4f0364ca4 45 PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset,
mluis 0:45c4f0364ca4 46 PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5 )
mluis 0:45c4f0364ca4 47 : Radio( events ),
mluis 0:45c4f0364ca4 48 spi( mosi, miso, sclk ),
mluis 0:45c4f0364ca4 49 nss( nss ),
mluis 0:45c4f0364ca4 50 reset( reset ),
mluis 0:45c4f0364ca4 51 dio0( dio0 ), dio1( dio1 ), dio2( dio2 ), dio3( dio3 ), dio4( dio4 ), dio5( dio5 ),
mluis 0:45c4f0364ca4 52 isRadioActive( false )
mluis 0:45c4f0364ca4 53 {
mluis 0:45c4f0364ca4 54 wait_ms( 10 );
mluis 7:b988b60083a1 55 this->rxtxBuffer = new uint8_t[RX_BUFFER_SIZE];
mluis 7:b988b60083a1 56
mluis 0:45c4f0364ca4 57 this->RadioEvents = events;
mluis 7:b988b60083a1 58
mluis 0:45c4f0364ca4 59 this->dioIrq = new DioIrqHandler[6];
mluis 0:45c4f0364ca4 60
Lorenzo Maiorfi 8:1002d3025eaa 61 this->dioIrq[0] = &SX1272::enqueueOnDio0Irq; /*&SX1272::OnDio0Irq;*/
Lorenzo Maiorfi 8:1002d3025eaa 62 this->dioIrq[1] = &SX1272::enqueueOnDio1Irq; /*&SX1272::OnDio1Irq;*/
Lorenzo Maiorfi 8:1002d3025eaa 63 this->dioIrq[2] = &SX1272::enqueueOnDio2Irq; /*&SX1272::OnDio2Irq;*/
Lorenzo Maiorfi 8:1002d3025eaa 64 this->dioIrq[3] = &SX1272::enqueueOnDio3Irq; /*&SX1272::OnDio3Irq;*/
Lorenzo Maiorfi 8:1002d3025eaa 65 this->dioIrq[4] = &SX1272::enqueueOnDio4Irq; /*&SX1272::OnDio4Irq;*/
Lorenzo Maiorfi 8:1002d3025eaa 66 this->dioIrq[5] = &SX1272::enqueueOnDio5Irq; /*NULL;*/
mluis 7:b988b60083a1 67
mluis 0:45c4f0364ca4 68 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 69 }
mluis 0:45c4f0364ca4 70
mluis 0:45c4f0364ca4 71 SX1272::~SX1272( )
mluis 0:45c4f0364ca4 72 {
mluis 7:b988b60083a1 73 delete this->rxtxBuffer;
mluis 0:45c4f0364ca4 74 delete this->dioIrq;
mluis 0:45c4f0364ca4 75 }
mluis 0:45c4f0364ca4 76
mluis 0:45c4f0364ca4 77 void SX1272::Init( RadioEvents_t *events )
mluis 0:45c4f0364ca4 78 {
mluis 0:45c4f0364ca4 79 this->RadioEvents = events;
Lorenzo Maiorfi 8:1002d3025eaa 80
Lorenzo Maiorfi 8:1002d3025eaa 81 // <RTOS>
Lorenzo Maiorfi 10:bd29cdff8f3e 82 //_thread_events_queue->start(callback(_eq_events, &EventQueue::dispatch_forever));
Lorenzo Maiorfi 8:1002d3025eaa 83 // </RTOS>
mluis 0:45c4f0364ca4 84 }
mluis 0:45c4f0364ca4 85
mluis 0:45c4f0364ca4 86 RadioState SX1272::GetStatus( void )
mluis 0:45c4f0364ca4 87 {
mluis 0:45c4f0364ca4 88 return this->settings.State;
mluis 0:45c4f0364ca4 89 }
mluis 0:45c4f0364ca4 90
mluis 0:45c4f0364ca4 91 void SX1272::SetChannel( uint32_t freq )
mluis 0:45c4f0364ca4 92 {
mluis 0:45c4f0364ca4 93 this->settings.Channel = freq;
mluis 0:45c4f0364ca4 94 freq = ( uint32_t )( ( double )freq / ( double )FREQ_STEP );
mluis 0:45c4f0364ca4 95 Write( REG_FRFMSB, ( uint8_t )( ( freq >> 16 ) & 0xFF ) );
mluis 0:45c4f0364ca4 96 Write( REG_FRFMID, ( uint8_t )( ( freq >> 8 ) & 0xFF ) );
mluis 0:45c4f0364ca4 97 Write( REG_FRFLSB, ( uint8_t )( freq & 0xFF ) );
mluis 0:45c4f0364ca4 98 }
mluis 0:45c4f0364ca4 99
mluis 0:45c4f0364ca4 100 bool SX1272::IsChannelFree( RadioModems_t modem, uint32_t freq, int16_t rssiThresh )
mluis 0:45c4f0364ca4 101 {
mluis 0:45c4f0364ca4 102 int16_t rssi = 0;
mluis 7:b988b60083a1 103
mluis 0:45c4f0364ca4 104 SetModem( modem );
mluis 0:45c4f0364ca4 105
mluis 0:45c4f0364ca4 106 SetChannel( freq );
mluis 7:b988b60083a1 107
mluis 0:45c4f0364ca4 108 SetOpMode( RF_OPMODE_RECEIVER );
mluis 0:45c4f0364ca4 109
mluis 0:45c4f0364ca4 110 wait_ms( 1 );
mluis 7:b988b60083a1 111
mluis 0:45c4f0364ca4 112 rssi = GetRssi( modem );
mluis 7:b988b60083a1 113
mluis 0:45c4f0364ca4 114 Sleep( );
mluis 7:b988b60083a1 115
mluis 0:45c4f0364ca4 116 if( rssi > rssiThresh )
mluis 0:45c4f0364ca4 117 {
mluis 0:45c4f0364ca4 118 return false;
mluis 0:45c4f0364ca4 119 }
mluis 0:45c4f0364ca4 120 return true;
mluis 0:45c4f0364ca4 121 }
mluis 0:45c4f0364ca4 122
mluis 0:45c4f0364ca4 123 uint32_t SX1272::Random( void )
mluis 0:45c4f0364ca4 124 {
mluis 0:45c4f0364ca4 125 uint8_t i;
mluis 0:45c4f0364ca4 126 uint32_t rnd = 0;
mluis 0:45c4f0364ca4 127
mluis 0:45c4f0364ca4 128 /*
mluis 7:b988b60083a1 129 * Radio setup for random number generation
mluis 0:45c4f0364ca4 130 */
mluis 0:45c4f0364ca4 131 // Set LoRa modem ON
mluis 0:45c4f0364ca4 132 SetModem( MODEM_LORA );
mluis 0:45c4f0364ca4 133
mluis 0:45c4f0364ca4 134 // Disable LoRa modem interrupts
mluis 0:45c4f0364ca4 135 Write( REG_LR_IRQFLAGSMASK, RFLR_IRQFLAGS_RXTIMEOUT |
mluis 0:45c4f0364ca4 136 RFLR_IRQFLAGS_RXDONE |
mluis 0:45c4f0364ca4 137 RFLR_IRQFLAGS_PAYLOADCRCERROR |
mluis 0:45c4f0364ca4 138 RFLR_IRQFLAGS_VALIDHEADER |
mluis 0:45c4f0364ca4 139 RFLR_IRQFLAGS_TXDONE |
mluis 0:45c4f0364ca4 140 RFLR_IRQFLAGS_CADDONE |
mluis 0:45c4f0364ca4 141 RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
mluis 0:45c4f0364ca4 142 RFLR_IRQFLAGS_CADDETECTED );
mluis 0:45c4f0364ca4 143
mluis 0:45c4f0364ca4 144 // Set radio in continuous reception
mluis 0:45c4f0364ca4 145 SetOpMode( RF_OPMODE_RECEIVER );
mluis 0:45c4f0364ca4 146
mluis 0:45c4f0364ca4 147 for( i = 0; i < 32; i++ )
mluis 0:45c4f0364ca4 148 {
mluis 0:45c4f0364ca4 149 wait_ms( 1 );
mluis 0:45c4f0364ca4 150 // Unfiltered RSSI value reading. Only takes the LSB value
mluis 0:45c4f0364ca4 151 rnd |= ( ( uint32_t )Read( REG_LR_RSSIWIDEBAND ) & 0x01 ) << i;
mluis 0:45c4f0364ca4 152 }
mluis 0:45c4f0364ca4 153
mluis 0:45c4f0364ca4 154 Sleep( );
mluis 0:45c4f0364ca4 155
mluis 0:45c4f0364ca4 156 return rnd;
mluis 0:45c4f0364ca4 157 }
mluis 0:45c4f0364ca4 158
mluis 0:45c4f0364ca4 159 /*!
mluis 0:45c4f0364ca4 160 * Returns the known FSK bandwidth registers value
mluis 0:45c4f0364ca4 161 *
mluis 0:45c4f0364ca4 162 * \param [IN] bandwidth Bandwidth value in Hz
mluis 0:45c4f0364ca4 163 * \retval regValue Bandwidth register value.
mluis 0:45c4f0364ca4 164 */
mluis 0:45c4f0364ca4 165 uint8_t SX1272::GetFskBandwidthRegValue( uint32_t bandwidth )
mluis 0:45c4f0364ca4 166 {
mluis 0:45c4f0364ca4 167 uint8_t i;
mluis 0:45c4f0364ca4 168
mluis 0:45c4f0364ca4 169 for( i = 0; i < ( sizeof( FskBandwidths ) / sizeof( FskBandwidth_t ) ) - 1; i++ )
mluis 0:45c4f0364ca4 170 {
mluis 0:45c4f0364ca4 171 if( ( bandwidth >= FskBandwidths[i].bandwidth ) && ( bandwidth < FskBandwidths[i + 1].bandwidth ) )
mluis 0:45c4f0364ca4 172 {
mluis 0:45c4f0364ca4 173 return FskBandwidths[i].RegValue;
mluis 0:45c4f0364ca4 174 }
mluis 0:45c4f0364ca4 175 }
mluis 0:45c4f0364ca4 176 // ERROR: Value not found
mluis 0:45c4f0364ca4 177 while( 1 );
mluis 0:45c4f0364ca4 178 }
mluis 0:45c4f0364ca4 179
mluis 0:45c4f0364ca4 180 void SX1272::SetRxConfig( RadioModems_t modem, uint32_t bandwidth,
mluis 0:45c4f0364ca4 181 uint32_t datarate, uint8_t coderate,
mluis 0:45c4f0364ca4 182 uint32_t bandwidthAfc, uint16_t preambleLen,
mluis 0:45c4f0364ca4 183 uint16_t symbTimeout, bool fixLen,
mluis 0:45c4f0364ca4 184 uint8_t payloadLen,
mluis 0:45c4f0364ca4 185 bool crcOn, bool freqHopOn, uint8_t hopPeriod,
mluis 0:45c4f0364ca4 186 bool iqInverted, bool rxContinuous )
mluis 0:45c4f0364ca4 187 {
mluis 0:45c4f0364ca4 188 SetModem( modem );
mluis 0:45c4f0364ca4 189
mluis 0:45c4f0364ca4 190 switch( modem )
mluis 0:45c4f0364ca4 191 {
mluis 0:45c4f0364ca4 192 case MODEM_FSK:
mluis 0:45c4f0364ca4 193 {
mluis 0:45c4f0364ca4 194 this->settings.Fsk.Bandwidth = bandwidth;
mluis 0:45c4f0364ca4 195 this->settings.Fsk.Datarate = datarate;
mluis 0:45c4f0364ca4 196 this->settings.Fsk.BandwidthAfc = bandwidthAfc;
mluis 0:45c4f0364ca4 197 this->settings.Fsk.FixLen = fixLen;
mluis 0:45c4f0364ca4 198 this->settings.Fsk.PayloadLen = payloadLen;
mluis 0:45c4f0364ca4 199 this->settings.Fsk.CrcOn = crcOn;
mluis 0:45c4f0364ca4 200 this->settings.Fsk.IqInverted = iqInverted;
mluis 0:45c4f0364ca4 201 this->settings.Fsk.RxContinuous = rxContinuous;
mluis 0:45c4f0364ca4 202 this->settings.Fsk.PreambleLen = preambleLen;
mluis 7:b988b60083a1 203 this->settings.Fsk.RxSingleTimeout = symbTimeout * ( ( 1.0 / ( double )datarate ) * 8.0 ) * 1e3;
mluis 7:b988b60083a1 204
mluis 0:45c4f0364ca4 205 datarate = ( uint16_t )( ( double )XTAL_FREQ / ( double )datarate );
mluis 0:45c4f0364ca4 206 Write( REG_BITRATEMSB, ( uint8_t )( datarate >> 8 ) );
mluis 0:45c4f0364ca4 207 Write( REG_BITRATELSB, ( uint8_t )( datarate & 0xFF ) );
mluis 0:45c4f0364ca4 208
mluis 0:45c4f0364ca4 209 Write( REG_RXBW, GetFskBandwidthRegValue( bandwidth ) );
mluis 0:45c4f0364ca4 210 Write( REG_AFCBW, GetFskBandwidthRegValue( bandwidthAfc ) );
mluis 0:45c4f0364ca4 211
mluis 0:45c4f0364ca4 212 Write( REG_PREAMBLEMSB, ( uint8_t )( ( preambleLen >> 8 ) & 0xFF ) );
mluis 0:45c4f0364ca4 213 Write( REG_PREAMBLELSB, ( uint8_t )( preambleLen & 0xFF ) );
mluis 7:b988b60083a1 214
mluis 0:45c4f0364ca4 215 if( fixLen == 1 )
mluis 0:45c4f0364ca4 216 {
mluis 0:45c4f0364ca4 217 Write( REG_PAYLOADLENGTH, payloadLen );
mluis 0:45c4f0364ca4 218 }
mluis 7:b988b60083a1 219 else
mluis 7:b988b60083a1 220 {
mluis 7:b988b60083a1 221 Write( REG_PAYLOADLENGTH, 0xFF ); // Set payload length to the maximum
mluis 7:b988b60083a1 222 }
mluis 7:b988b60083a1 223
mluis 0:45c4f0364ca4 224 Write( REG_PACKETCONFIG1,
mluis 7:b988b60083a1 225 ( Read( REG_PACKETCONFIG1 ) &
mluis 0:45c4f0364ca4 226 RF_PACKETCONFIG1_CRC_MASK &
mluis 0:45c4f0364ca4 227 RF_PACKETCONFIG1_PACKETFORMAT_MASK ) |
mluis 0:45c4f0364ca4 228 ( ( fixLen == 1 ) ? RF_PACKETCONFIG1_PACKETFORMAT_FIXED : RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE ) |
mluis 0:45c4f0364ca4 229 ( crcOn << 4 ) );
mluis 7:b988b60083a1 230 Write( REG_PACKETCONFIG2, ( Read( REG_PACKETCONFIG2 ) | RF_PACKETCONFIG2_DATAMODE_PACKET ) );
mluis 0:45c4f0364ca4 231 }
mluis 0:45c4f0364ca4 232 break;
mluis 0:45c4f0364ca4 233 case MODEM_LORA:
mluis 0:45c4f0364ca4 234 {
mluis 0:45c4f0364ca4 235 this->settings.LoRa.Bandwidth = bandwidth;
mluis 0:45c4f0364ca4 236 this->settings.LoRa.Datarate = datarate;
mluis 0:45c4f0364ca4 237 this->settings.LoRa.Coderate = coderate;
mluis 0:45c4f0364ca4 238 this->settings.LoRa.PreambleLen = preambleLen;
mluis 0:45c4f0364ca4 239 this->settings.LoRa.FixLen = fixLen;
mluis 0:45c4f0364ca4 240 this->settings.LoRa.PayloadLen = payloadLen;
mluis 0:45c4f0364ca4 241 this->settings.LoRa.CrcOn = crcOn;
mluis 0:45c4f0364ca4 242 this->settings.LoRa.FreqHopOn = freqHopOn;
mluis 0:45c4f0364ca4 243 this->settings.LoRa.HopPeriod = hopPeriod;
mluis 0:45c4f0364ca4 244 this->settings.LoRa.IqInverted = iqInverted;
mluis 0:45c4f0364ca4 245 this->settings.LoRa.RxContinuous = rxContinuous;
mluis 0:45c4f0364ca4 246
mluis 0:45c4f0364ca4 247 if( datarate > 12 )
mluis 0:45c4f0364ca4 248 {
mluis 0:45c4f0364ca4 249 datarate = 12;
mluis 0:45c4f0364ca4 250 }
mluis 0:45c4f0364ca4 251 else if( datarate < 6 )
mluis 0:45c4f0364ca4 252 {
mluis 0:45c4f0364ca4 253 datarate = 6;
mluis 0:45c4f0364ca4 254 }
mluis 7:b988b60083a1 255
mluis 0:45c4f0364ca4 256 if( ( ( bandwidth == 0 ) && ( ( datarate == 11 ) || ( datarate == 12 ) ) ) ||
mluis 0:45c4f0364ca4 257 ( ( bandwidth == 1 ) && ( datarate == 12 ) ) )
mluis 0:45c4f0364ca4 258 {
mluis 0:45c4f0364ca4 259 this->settings.LoRa.LowDatarateOptimize = 0x01;
mluis 0:45c4f0364ca4 260 }
mluis 0:45c4f0364ca4 261 else
mluis 0:45c4f0364ca4 262 {
mluis 0:45c4f0364ca4 263 this->settings.LoRa.LowDatarateOptimize = 0x00;
mluis 0:45c4f0364ca4 264 }
mluis 0:45c4f0364ca4 265
mluis 7:b988b60083a1 266 Write( REG_LR_MODEMCONFIG1,
mluis 0:45c4f0364ca4 267 ( Read( REG_LR_MODEMCONFIG1 ) &
mluis 0:45c4f0364ca4 268 RFLR_MODEMCONFIG1_BW_MASK &
mluis 0:45c4f0364ca4 269 RFLR_MODEMCONFIG1_CODINGRATE_MASK &
mluis 0:45c4f0364ca4 270 RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK &
mluis 0:45c4f0364ca4 271 RFLR_MODEMCONFIG1_RXPAYLOADCRC_MASK &
mluis 0:45c4f0364ca4 272 RFLR_MODEMCONFIG1_LOWDATARATEOPTIMIZE_MASK ) |
mluis 7:b988b60083a1 273 ( bandwidth << 6 ) | ( coderate << 3 ) |
mluis 0:45c4f0364ca4 274 ( fixLen << 2 ) | ( crcOn << 1 ) |
mluis 0:45c4f0364ca4 275 this->settings.LoRa.LowDatarateOptimize );
mluis 0:45c4f0364ca4 276
mluis 0:45c4f0364ca4 277 Write( REG_LR_MODEMCONFIG2,
mluis 0:45c4f0364ca4 278 ( Read( REG_LR_MODEMCONFIG2 ) &
mluis 0:45c4f0364ca4 279 RFLR_MODEMCONFIG2_SF_MASK &
mluis 0:45c4f0364ca4 280 RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK ) |
mluis 0:45c4f0364ca4 281 ( datarate << 4 ) |
mluis 0:45c4f0364ca4 282 ( ( symbTimeout >> 8 ) & ~RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK ) );
mluis 0:45c4f0364ca4 283
mluis 0:45c4f0364ca4 284 Write( REG_LR_SYMBTIMEOUTLSB, ( uint8_t )( symbTimeout & 0xFF ) );
mluis 7:b988b60083a1 285
mluis 0:45c4f0364ca4 286 Write( REG_LR_PREAMBLEMSB, ( uint8_t )( ( preambleLen >> 8 ) & 0xFF ) );
mluis 0:45c4f0364ca4 287 Write( REG_LR_PREAMBLELSB, ( uint8_t )( preambleLen & 0xFF ) );
mluis 0:45c4f0364ca4 288
mluis 0:45c4f0364ca4 289 if( fixLen == 1 )
mluis 0:45c4f0364ca4 290 {
mluis 0:45c4f0364ca4 291 Write( REG_LR_PAYLOADLENGTH, payloadLen );
mluis 0:45c4f0364ca4 292 }
mluis 0:45c4f0364ca4 293
mluis 0:45c4f0364ca4 294 if( this->settings.LoRa.FreqHopOn == true )
mluis 0:45c4f0364ca4 295 {
mluis 0:45c4f0364ca4 296 Write( REG_LR_PLLHOP, ( Read( REG_LR_PLLHOP ) & RFLR_PLLHOP_FASTHOP_MASK ) | RFLR_PLLHOP_FASTHOP_ON );
mluis 0:45c4f0364ca4 297 Write( REG_LR_HOPPERIOD, this->settings.LoRa.HopPeriod );
mluis 0:45c4f0364ca4 298 }
mluis 0:45c4f0364ca4 299
mluis 0:45c4f0364ca4 300 if( datarate == 6 )
mluis 0:45c4f0364ca4 301 {
mluis 7:b988b60083a1 302 Write( REG_LR_DETECTOPTIMIZE,
mluis 0:45c4f0364ca4 303 ( Read( REG_LR_DETECTOPTIMIZE ) &
mluis 0:45c4f0364ca4 304 RFLR_DETECTIONOPTIMIZE_MASK ) |
mluis 0:45c4f0364ca4 305 RFLR_DETECTIONOPTIMIZE_SF6 );
mluis 7:b988b60083a1 306 Write( REG_LR_DETECTIONTHRESHOLD,
mluis 0:45c4f0364ca4 307 RFLR_DETECTIONTHRESH_SF6 );
mluis 0:45c4f0364ca4 308 }
mluis 0:45c4f0364ca4 309 else
mluis 0:45c4f0364ca4 310 {
mluis 0:45c4f0364ca4 311 Write( REG_LR_DETECTOPTIMIZE,
mluis 0:45c4f0364ca4 312 ( Read( REG_LR_DETECTOPTIMIZE ) &
mluis 0:45c4f0364ca4 313 RFLR_DETECTIONOPTIMIZE_MASK ) |
mluis 0:45c4f0364ca4 314 RFLR_DETECTIONOPTIMIZE_SF7_TO_SF12 );
mluis 7:b988b60083a1 315 Write( REG_LR_DETECTIONTHRESHOLD,
mluis 0:45c4f0364ca4 316 RFLR_DETECTIONTHRESH_SF7_TO_SF12 );
mluis 0:45c4f0364ca4 317 }
mluis 0:45c4f0364ca4 318 }
mluis 0:45c4f0364ca4 319 break;
mluis 0:45c4f0364ca4 320 }
mluis 0:45c4f0364ca4 321 }
mluis 0:45c4f0364ca4 322
mluis 7:b988b60083a1 323 void SX1272::SetTxConfig( RadioModems_t modem, int8_t power, uint32_t fdev,
mluis 0:45c4f0364ca4 324 uint32_t bandwidth, uint32_t datarate,
mluis 0:45c4f0364ca4 325 uint8_t coderate, uint16_t preambleLen,
mluis 7:b988b60083a1 326 bool fixLen, bool crcOn, bool freqHopOn,
mluis 0:45c4f0364ca4 327 uint8_t hopPeriod, bool iqInverted, uint32_t timeout )
mluis 0:45c4f0364ca4 328 {
mluis 0:45c4f0364ca4 329 SetModem( modem );
mluis 0:45c4f0364ca4 330
mluis 7:b988b60083a1 331 SetRfTxPower( power );
mluis 0:45c4f0364ca4 332
mluis 0:45c4f0364ca4 333 switch( modem )
mluis 0:45c4f0364ca4 334 {
mluis 0:45c4f0364ca4 335 case MODEM_FSK:
mluis 0:45c4f0364ca4 336 {
mluis 0:45c4f0364ca4 337 this->settings.Fsk.Power = power;
mluis 0:45c4f0364ca4 338 this->settings.Fsk.Fdev = fdev;
mluis 0:45c4f0364ca4 339 this->settings.Fsk.Bandwidth = bandwidth;
mluis 0:45c4f0364ca4 340 this->settings.Fsk.Datarate = datarate;
mluis 0:45c4f0364ca4 341 this->settings.Fsk.PreambleLen = preambleLen;
mluis 0:45c4f0364ca4 342 this->settings.Fsk.FixLen = fixLen;
mluis 0:45c4f0364ca4 343 this->settings.Fsk.CrcOn = crcOn;
mluis 0:45c4f0364ca4 344 this->settings.Fsk.IqInverted = iqInverted;
mluis 0:45c4f0364ca4 345 this->settings.Fsk.TxTimeout = timeout;
mluis 7:b988b60083a1 346
mluis 0:45c4f0364ca4 347 fdev = ( uint16_t )( ( double )fdev / ( double )FREQ_STEP );
mluis 0:45c4f0364ca4 348 Write( REG_FDEVMSB, ( uint8_t )( fdev >> 8 ) );
mluis 0:45c4f0364ca4 349 Write( REG_FDEVLSB, ( uint8_t )( fdev & 0xFF ) );
mluis 0:45c4f0364ca4 350
mluis 0:45c4f0364ca4 351 datarate = ( uint16_t )( ( double )XTAL_FREQ / ( double )datarate );
mluis 0:45c4f0364ca4 352 Write( REG_BITRATEMSB, ( uint8_t )( datarate >> 8 ) );
mluis 0:45c4f0364ca4 353 Write( REG_BITRATELSB, ( uint8_t )( datarate & 0xFF ) );
mluis 0:45c4f0364ca4 354
mluis 0:45c4f0364ca4 355 Write( REG_PREAMBLEMSB, ( preambleLen >> 8 ) & 0x00FF );
mluis 0:45c4f0364ca4 356 Write( REG_PREAMBLELSB, preambleLen & 0xFF );
mluis 0:45c4f0364ca4 357
mluis 0:45c4f0364ca4 358 Write( REG_PACKETCONFIG1,
mluis 7:b988b60083a1 359 ( Read( REG_PACKETCONFIG1 ) &
mluis 0:45c4f0364ca4 360 RF_PACKETCONFIG1_CRC_MASK &
mluis 0:45c4f0364ca4 361 RF_PACKETCONFIG1_PACKETFORMAT_MASK ) |
mluis 0:45c4f0364ca4 362 ( ( fixLen == 1 ) ? RF_PACKETCONFIG1_PACKETFORMAT_FIXED : RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE ) |
mluis 0:45c4f0364ca4 363 ( crcOn << 4 ) );
mluis 7:b988b60083a1 364 Write( REG_PACKETCONFIG2, ( Read( REG_PACKETCONFIG2 ) | RF_PACKETCONFIG2_DATAMODE_PACKET ) );
mluis 0:45c4f0364ca4 365 }
mluis 0:45c4f0364ca4 366 break;
mluis 0:45c4f0364ca4 367 case MODEM_LORA:
mluis 0:45c4f0364ca4 368 {
mluis 0:45c4f0364ca4 369 this->settings.LoRa.Power = power;
mluis 0:45c4f0364ca4 370 this->settings.LoRa.Bandwidth = bandwidth;
mluis 0:45c4f0364ca4 371 this->settings.LoRa.Datarate = datarate;
mluis 0:45c4f0364ca4 372 this->settings.LoRa.Coderate = coderate;
mluis 0:45c4f0364ca4 373 this->settings.LoRa.PreambleLen = preambleLen;
mluis 0:45c4f0364ca4 374 this->settings.LoRa.FixLen = fixLen;
mluis 0:45c4f0364ca4 375 this->settings.LoRa.FreqHopOn = freqHopOn;
mluis 0:45c4f0364ca4 376 this->settings.LoRa.HopPeriod = hopPeriod;
mluis 0:45c4f0364ca4 377 this->settings.LoRa.CrcOn = crcOn;
mluis 0:45c4f0364ca4 378 this->settings.LoRa.IqInverted = iqInverted;
mluis 0:45c4f0364ca4 379 this->settings.LoRa.TxTimeout = timeout;
mluis 0:45c4f0364ca4 380
mluis 0:45c4f0364ca4 381 if( datarate > 12 )
mluis 0:45c4f0364ca4 382 {
mluis 0:45c4f0364ca4 383 datarate = 12;
mluis 0:45c4f0364ca4 384 }
mluis 0:45c4f0364ca4 385 else if( datarate < 6 )
mluis 0:45c4f0364ca4 386 {
mluis 0:45c4f0364ca4 387 datarate = 6;
mluis 0:45c4f0364ca4 388 }
mluis 0:45c4f0364ca4 389 if( ( ( bandwidth == 0 ) && ( ( datarate == 11 ) || ( datarate == 12 ) ) ) ||
mluis 0:45c4f0364ca4 390 ( ( bandwidth == 1 ) && ( datarate == 12 ) ) )
mluis 0:45c4f0364ca4 391 {
mluis 0:45c4f0364ca4 392 this->settings.LoRa.LowDatarateOptimize = 0x01;
mluis 0:45c4f0364ca4 393 }
mluis 0:45c4f0364ca4 394 else
mluis 0:45c4f0364ca4 395 {
mluis 0:45c4f0364ca4 396 this->settings.LoRa.LowDatarateOptimize = 0x00;
mluis 0:45c4f0364ca4 397 }
mluis 0:45c4f0364ca4 398
mluis 0:45c4f0364ca4 399 if( this->settings.LoRa.FreqHopOn == true )
mluis 0:45c4f0364ca4 400 {
mluis 0:45c4f0364ca4 401 Write( REG_LR_PLLHOP, ( Read( REG_LR_PLLHOP ) & RFLR_PLLHOP_FASTHOP_MASK ) | RFLR_PLLHOP_FASTHOP_ON );
mluis 0:45c4f0364ca4 402 Write( REG_LR_HOPPERIOD, this->settings.LoRa.HopPeriod );
mluis 0:45c4f0364ca4 403 }
mluis 0:45c4f0364ca4 404
mluis 7:b988b60083a1 405 Write( REG_LR_MODEMCONFIG1,
mluis 0:45c4f0364ca4 406 ( Read( REG_LR_MODEMCONFIG1 ) &
mluis 0:45c4f0364ca4 407 RFLR_MODEMCONFIG1_BW_MASK &
mluis 0:45c4f0364ca4 408 RFLR_MODEMCONFIG1_CODINGRATE_MASK &
mluis 0:45c4f0364ca4 409 RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK &
mluis 0:45c4f0364ca4 410 RFLR_MODEMCONFIG1_RXPAYLOADCRC_MASK &
mluis 0:45c4f0364ca4 411 RFLR_MODEMCONFIG1_LOWDATARATEOPTIMIZE_MASK ) |
mluis 7:b988b60083a1 412 ( bandwidth << 6 ) | ( coderate << 3 ) |
mluis 0:45c4f0364ca4 413 ( fixLen << 2 ) | ( crcOn << 1 ) |
mluis 0:45c4f0364ca4 414 this->settings.LoRa.LowDatarateOptimize );
mluis 0:45c4f0364ca4 415
mluis 0:45c4f0364ca4 416 Write( REG_LR_MODEMCONFIG2,
mluis 0:45c4f0364ca4 417 ( Read( REG_LR_MODEMCONFIG2 ) &
mluis 0:45c4f0364ca4 418 RFLR_MODEMCONFIG2_SF_MASK ) |
mluis 0:45c4f0364ca4 419 ( datarate << 4 ) );
mluis 0:45c4f0364ca4 420
mluis 7:b988b60083a1 421
mluis 0:45c4f0364ca4 422 Write( REG_LR_PREAMBLEMSB, ( preambleLen >> 8 ) & 0x00FF );
mluis 0:45c4f0364ca4 423 Write( REG_LR_PREAMBLELSB, preambleLen & 0xFF );
mluis 7:b988b60083a1 424
mluis 0:45c4f0364ca4 425 if( datarate == 6 )
mluis 0:45c4f0364ca4 426 {
mluis 7:b988b60083a1 427 Write( REG_LR_DETECTOPTIMIZE,
mluis 0:45c4f0364ca4 428 ( Read( REG_LR_DETECTOPTIMIZE ) &
mluis 0:45c4f0364ca4 429 RFLR_DETECTIONOPTIMIZE_MASK ) |
mluis 0:45c4f0364ca4 430 RFLR_DETECTIONOPTIMIZE_SF6 );
mluis 7:b988b60083a1 431 Write( REG_LR_DETECTIONTHRESHOLD,
mluis 0:45c4f0364ca4 432 RFLR_DETECTIONTHRESH_SF6 );
mluis 0:45c4f0364ca4 433 }
mluis 0:45c4f0364ca4 434 else
mluis 0:45c4f0364ca4 435 {
mluis 0:45c4f0364ca4 436 Write( REG_LR_DETECTOPTIMIZE,
mluis 0:45c4f0364ca4 437 ( Read( REG_LR_DETECTOPTIMIZE ) &
mluis 0:45c4f0364ca4 438 RFLR_DETECTIONOPTIMIZE_MASK ) |
mluis 0:45c4f0364ca4 439 RFLR_DETECTIONOPTIMIZE_SF7_TO_SF12 );
mluis 7:b988b60083a1 440 Write( REG_LR_DETECTIONTHRESHOLD,
mluis 0:45c4f0364ca4 441 RFLR_DETECTIONTHRESH_SF7_TO_SF12 );
mluis 0:45c4f0364ca4 442 }
mluis 0:45c4f0364ca4 443 }
mluis 0:45c4f0364ca4 444 break;
mluis 0:45c4f0364ca4 445 }
mluis 0:45c4f0364ca4 446 }
mluis 0:45c4f0364ca4 447
mluis 7:b988b60083a1 448 uint32_t SX1272::TimeOnAir( RadioModems_t modem, uint8_t pktLen )
mluis 0:45c4f0364ca4 449 {
mluis 0:45c4f0364ca4 450 uint32_t airTime = 0;
mluis 0:45c4f0364ca4 451
mluis 0:45c4f0364ca4 452 switch( modem )
mluis 0:45c4f0364ca4 453 {
mluis 0:45c4f0364ca4 454 case MODEM_FSK:
mluis 0:45c4f0364ca4 455 {
mluis 0:45c4f0364ca4 456 airTime = rint( ( 8 * ( this->settings.Fsk.PreambleLen +
mluis 0:45c4f0364ca4 457 ( ( Read( REG_SYNCCONFIG ) & ~RF_SYNCCONFIG_SYNCSIZE_MASK ) + 1 ) +
mluis 0:45c4f0364ca4 458 ( ( this->settings.Fsk.FixLen == 0x01 ) ? 0.0 : 1.0 ) +
mluis 0:45c4f0364ca4 459 ( ( ( Read( REG_PACKETCONFIG1 ) & ~RF_PACKETCONFIG1_ADDRSFILTERING_MASK ) != 0x00 ) ? 1.0 : 0 ) +
mluis 0:45c4f0364ca4 460 pktLen +
mluis 0:45c4f0364ca4 461 ( ( this->settings.Fsk.CrcOn == 0x01 ) ? 2.0 : 0 ) ) /
mluis 7:b988b60083a1 462 this->settings.Fsk.Datarate ) * 1e3 );
mluis 0:45c4f0364ca4 463 }
mluis 0:45c4f0364ca4 464 break;
mluis 0:45c4f0364ca4 465 case MODEM_LORA:
mluis 0:45c4f0364ca4 466 {
mluis 0:45c4f0364ca4 467 double bw = 0.0;
mluis 0:45c4f0364ca4 468 switch( this->settings.LoRa.Bandwidth )
mluis 0:45c4f0364ca4 469 {
mluis 0:45c4f0364ca4 470 case 0: // 125 kHz
mluis 0:45c4f0364ca4 471 bw = 125e3;
mluis 0:45c4f0364ca4 472 break;
mluis 0:45c4f0364ca4 473 case 1: // 250 kHz
mluis 0:45c4f0364ca4 474 bw = 250e3;
mluis 0:45c4f0364ca4 475 break;
mluis 0:45c4f0364ca4 476 case 2: // 500 kHz
mluis 0:45c4f0364ca4 477 bw = 500e3;
mluis 0:45c4f0364ca4 478 break;
mluis 0:45c4f0364ca4 479 }
mluis 0:45c4f0364ca4 480
mluis 0:45c4f0364ca4 481 // Symbol rate : time for one symbol (secs)
mluis 0:45c4f0364ca4 482 double rs = bw / ( 1 << this->settings.LoRa.Datarate );
mluis 0:45c4f0364ca4 483 double ts = 1 / rs;
mluis 0:45c4f0364ca4 484 // time of preamble
mluis 0:45c4f0364ca4 485 double tPreamble = ( this->settings.LoRa.PreambleLen + 4.25 ) * ts;
mluis 0:45c4f0364ca4 486 // Symbol length of payload and time
mluis 0:45c4f0364ca4 487 double tmp = ceil( ( 8 * pktLen - 4 * this->settings.LoRa.Datarate +
mluis 0:45c4f0364ca4 488 28 + 16 * this->settings.LoRa.CrcOn -
mluis 0:45c4f0364ca4 489 ( this->settings.LoRa.FixLen ? 20 : 0 ) ) /
mluis 7:b988b60083a1 490 ( double )( 4 * ( this->settings.LoRa.Datarate -
mluis 7:b988b60083a1 491 ( ( this->settings.LoRa.LowDatarateOptimize > 0 ) ? 2 : 0 ) ) ) ) *
mluis 0:45c4f0364ca4 492 ( this->settings.LoRa.Coderate + 4 );
mluis 0:45c4f0364ca4 493 double nPayload = 8 + ( ( tmp > 0 ) ? tmp : 0 );
mluis 0:45c4f0364ca4 494 double tPayload = nPayload * ts;
mluis 7:b988b60083a1 495 // Time on air
mluis 0:45c4f0364ca4 496 double tOnAir = tPreamble + tPayload;
mluis 7:b988b60083a1 497 // return ms secs
mluis 7:b988b60083a1 498 airTime = floor( tOnAir * 1e3 + 0.999 );
mluis 0:45c4f0364ca4 499 }
mluis 0:45c4f0364ca4 500 break;
mluis 0:45c4f0364ca4 501 }
mluis 0:45c4f0364ca4 502 return airTime;
mluis 0:45c4f0364ca4 503 }
mluis 0:45c4f0364ca4 504
mluis 0:45c4f0364ca4 505 void SX1272::Send( uint8_t *buffer, uint8_t size )
mluis 0:45c4f0364ca4 506 {
mluis 0:45c4f0364ca4 507 uint32_t txTimeout = 0;
mluis 0:45c4f0364ca4 508
mluis 0:45c4f0364ca4 509 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 510 {
mluis 0:45c4f0364ca4 511 case MODEM_FSK:
mluis 0:45c4f0364ca4 512 {
mluis 0:45c4f0364ca4 513 this->settings.FskPacketHandler.NbBytes = 0;
mluis 0:45c4f0364ca4 514 this->settings.FskPacketHandler.Size = size;
mluis 0:45c4f0364ca4 515
mluis 0:45c4f0364ca4 516 if( this->settings.Fsk.FixLen == false )
mluis 0:45c4f0364ca4 517 {
mluis 0:45c4f0364ca4 518 WriteFifo( ( uint8_t* )&size, 1 );
mluis 0:45c4f0364ca4 519 }
mluis 0:45c4f0364ca4 520 else
mluis 0:45c4f0364ca4 521 {
mluis 0:45c4f0364ca4 522 Write( REG_PAYLOADLENGTH, size );
mluis 7:b988b60083a1 523 }
mluis 7:b988b60083a1 524
mluis 0:45c4f0364ca4 525 if( ( size > 0 ) && ( size <= 64 ) )
mluis 0:45c4f0364ca4 526 {
mluis 0:45c4f0364ca4 527 this->settings.FskPacketHandler.ChunkSize = size;
mluis 0:45c4f0364ca4 528 }
mluis 0:45c4f0364ca4 529 else
mluis 0:45c4f0364ca4 530 {
mluis 7:b988b60083a1 531 memcpy( rxtxBuffer, buffer, size );
mluis 0:45c4f0364ca4 532 this->settings.FskPacketHandler.ChunkSize = 32;
mluis 0:45c4f0364ca4 533 }
mluis 0:45c4f0364ca4 534
mluis 0:45c4f0364ca4 535 // Write payload buffer
mluis 0:45c4f0364ca4 536 WriteFifo( buffer, this->settings.FskPacketHandler.ChunkSize );
mluis 0:45c4f0364ca4 537 this->settings.FskPacketHandler.NbBytes += this->settings.FskPacketHandler.ChunkSize;
mluis 0:45c4f0364ca4 538 txTimeout = this->settings.Fsk.TxTimeout;
mluis 0:45c4f0364ca4 539 }
mluis 0:45c4f0364ca4 540 break;
mluis 0:45c4f0364ca4 541 case MODEM_LORA:
mluis 0:45c4f0364ca4 542 {
mluis 0:45c4f0364ca4 543 if( this->settings.LoRa.IqInverted == true )
mluis 0:45c4f0364ca4 544 {
mluis 0:45c4f0364ca4 545 Write( REG_LR_INVERTIQ, ( ( Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_OFF | RFLR_INVERTIQ_TX_ON ) );
mluis 0:45c4f0364ca4 546 Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_ON );
mluis 0:45c4f0364ca4 547 }
mluis 0:45c4f0364ca4 548 else
mluis 0:45c4f0364ca4 549 {
mluis 0:45c4f0364ca4 550 Write( REG_LR_INVERTIQ, ( ( Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_OFF | RFLR_INVERTIQ_TX_OFF ) );
mluis 0:45c4f0364ca4 551 Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_OFF );
mluis 7:b988b60083a1 552 }
mluis 7:b988b60083a1 553
mluis 0:45c4f0364ca4 554 this->settings.LoRaPacketHandler.Size = size;
mluis 0:45c4f0364ca4 555
mluis 0:45c4f0364ca4 556 // Initializes the payload size
mluis 0:45c4f0364ca4 557 Write( REG_LR_PAYLOADLENGTH, size );
mluis 0:45c4f0364ca4 558
mluis 7:b988b60083a1 559 // Full buffer used for Tx
mluis 0:45c4f0364ca4 560 Write( REG_LR_FIFOTXBASEADDR, 0 );
mluis 0:45c4f0364ca4 561 Write( REG_LR_FIFOADDRPTR, 0 );
mluis 0:45c4f0364ca4 562
mluis 0:45c4f0364ca4 563 // FIFO operations can not take place in Sleep mode
mluis 0:45c4f0364ca4 564 if( ( Read( REG_OPMODE ) & ~RF_OPMODE_MASK ) == RF_OPMODE_SLEEP )
mluis 0:45c4f0364ca4 565 {
mluis 0:45c4f0364ca4 566 Standby( );
mluis 0:45c4f0364ca4 567 wait_ms( 1 );
mluis 0:45c4f0364ca4 568 }
mluis 0:45c4f0364ca4 569 // Write payload buffer
mluis 0:45c4f0364ca4 570 WriteFifo( buffer, size );
mluis 0:45c4f0364ca4 571 txTimeout = this->settings.LoRa.TxTimeout;
mluis 0:45c4f0364ca4 572 }
mluis 0:45c4f0364ca4 573 break;
mluis 0:45c4f0364ca4 574 }
mluis 0:45c4f0364ca4 575
mluis 0:45c4f0364ca4 576 Tx( txTimeout );
mluis 0:45c4f0364ca4 577 }
mluis 0:45c4f0364ca4 578
mluis 0:45c4f0364ca4 579 void SX1272::Sleep( void )
mluis 0:45c4f0364ca4 580 {
mluis 7:b988b60083a1 581 txTimeoutTimer.detach( );
mluis 0:45c4f0364ca4 582 rxTimeoutTimer.detach( );
mluis 0:45c4f0364ca4 583
mluis 0:45c4f0364ca4 584 SetOpMode( RF_OPMODE_SLEEP );
mluis 0:45c4f0364ca4 585 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 586 }
mluis 0:45c4f0364ca4 587
mluis 0:45c4f0364ca4 588 void SX1272::Standby( void )
mluis 0:45c4f0364ca4 589 {
mluis 7:b988b60083a1 590 txTimeoutTimer.detach( );
mluis 0:45c4f0364ca4 591 rxTimeoutTimer.detach( );
mluis 0:45c4f0364ca4 592
mluis 0:45c4f0364ca4 593 SetOpMode( RF_OPMODE_STANDBY );
mluis 0:45c4f0364ca4 594 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 595 }
mluis 0:45c4f0364ca4 596
mluis 0:45c4f0364ca4 597 void SX1272::Rx( uint32_t timeout )
mluis 0:45c4f0364ca4 598 {
mluis 0:45c4f0364ca4 599 bool rxContinuous = false;
mluis 7:b988b60083a1 600
mluis 0:45c4f0364ca4 601 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 602 {
mluis 0:45c4f0364ca4 603 case MODEM_FSK:
mluis 0:45c4f0364ca4 604 {
mluis 0:45c4f0364ca4 605 rxContinuous = this->settings.Fsk.RxContinuous;
mluis 7:b988b60083a1 606
mluis 0:45c4f0364ca4 607 // DIO0=PayloadReady
mluis 0:45c4f0364ca4 608 // DIO1=FifoLevel
mluis 0:45c4f0364ca4 609 // DIO2=SyncAddr
mluis 0:45c4f0364ca4 610 // DIO3=FifoEmpty
mluis 0:45c4f0364ca4 611 // DIO4=Preamble
mluis 0:45c4f0364ca4 612 // DIO5=ModeReady
mluis 0:45c4f0364ca4 613 Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RF_DIOMAPPING1_DIO0_MASK &
mluis 7:b988b60083a1 614 RF_DIOMAPPING1_DIO1_MASK &
mluis 0:45c4f0364ca4 615 RF_DIOMAPPING1_DIO2_MASK ) |
mluis 0:45c4f0364ca4 616 RF_DIOMAPPING1_DIO0_00 |
mluis 7:b988b60083a1 617 RF_DIOMAPPING1_DIO1_00 |
mluis 0:45c4f0364ca4 618 RF_DIOMAPPING1_DIO2_11 );
mluis 7:b988b60083a1 619
mluis 0:45c4f0364ca4 620 Write( REG_DIOMAPPING2, ( Read( REG_DIOMAPPING2 ) & RF_DIOMAPPING2_DIO4_MASK &
mluis 7:b988b60083a1 621 RF_DIOMAPPING2_MAP_MASK ) |
mluis 0:45c4f0364ca4 622 RF_DIOMAPPING2_DIO4_11 |
mluis 0:45c4f0364ca4 623 RF_DIOMAPPING2_MAP_PREAMBLEDETECT );
mluis 7:b988b60083a1 624
mluis 0:45c4f0364ca4 625 this->settings.FskPacketHandler.FifoThresh = Read( REG_FIFOTHRESH ) & 0x3F;
mluis 7:b988b60083a1 626
mluis 7:b988b60083a1 627 Write( REG_RXCONFIG, RF_RXCONFIG_AFCAUTO_ON | RF_RXCONFIG_AGCAUTO_ON | RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT );
mluis 7:b988b60083a1 628
mluis 0:45c4f0364ca4 629 this->settings.FskPacketHandler.PreambleDetected = false;
mluis 0:45c4f0364ca4 630 this->settings.FskPacketHandler.SyncWordDetected = false;
mluis 0:45c4f0364ca4 631 this->settings.FskPacketHandler.NbBytes = 0;
mluis 0:45c4f0364ca4 632 this->settings.FskPacketHandler.Size = 0;
mluis 0:45c4f0364ca4 633 }
mluis 0:45c4f0364ca4 634 break;
mluis 0:45c4f0364ca4 635 case MODEM_LORA:
mluis 0:45c4f0364ca4 636 {
mluis 0:45c4f0364ca4 637 if( this->settings.LoRa.IqInverted == true )
mluis 0:45c4f0364ca4 638 {
mluis 0:45c4f0364ca4 639 Write( REG_LR_INVERTIQ, ( ( Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_ON | RFLR_INVERTIQ_TX_OFF ) );
mluis 0:45c4f0364ca4 640 Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_ON );
mluis 0:45c4f0364ca4 641 }
mluis 0:45c4f0364ca4 642 else
mluis 0:45c4f0364ca4 643 {
mluis 0:45c4f0364ca4 644 Write( REG_LR_INVERTIQ, ( ( Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_OFF | RFLR_INVERTIQ_TX_OFF ) );
mluis 0:45c4f0364ca4 645 Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_OFF );
mluis 7:b988b60083a1 646 }
mluis 7:b988b60083a1 647
mluis 0:45c4f0364ca4 648 rxContinuous = this->settings.LoRa.RxContinuous;
mluis 7:b988b60083a1 649
mluis 0:45c4f0364ca4 650 if( this->settings.LoRa.FreqHopOn == true )
mluis 0:45c4f0364ca4 651 {
mluis 0:45c4f0364ca4 652 Write( REG_LR_IRQFLAGSMASK, //RFLR_IRQFLAGS_RXTIMEOUT |
mluis 0:45c4f0364ca4 653 //RFLR_IRQFLAGS_RXDONE |
mluis 0:45c4f0364ca4 654 //RFLR_IRQFLAGS_PAYLOADCRCERROR |
mluis 0:45c4f0364ca4 655 RFLR_IRQFLAGS_VALIDHEADER |
mluis 0:45c4f0364ca4 656 RFLR_IRQFLAGS_TXDONE |
mluis 0:45c4f0364ca4 657 RFLR_IRQFLAGS_CADDONE |
mluis 0:45c4f0364ca4 658 //RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
mluis 0:45c4f0364ca4 659 RFLR_IRQFLAGS_CADDETECTED );
mluis 7:b988b60083a1 660
mluis 0:45c4f0364ca4 661 // DIO0=RxDone, DIO2=FhssChangeChannel
mluis 0:45c4f0364ca4 662 Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK & RFLR_DIOMAPPING1_DIO2_MASK ) | RFLR_DIOMAPPING1_DIO0_00 | RFLR_DIOMAPPING1_DIO2_00 );
mluis 0:45c4f0364ca4 663 }
mluis 0:45c4f0364ca4 664 else
mluis 0:45c4f0364ca4 665 {
mluis 0:45c4f0364ca4 666 Write( REG_LR_IRQFLAGSMASK, //RFLR_IRQFLAGS_RXTIMEOUT |
mluis 0:45c4f0364ca4 667 //RFLR_IRQFLAGS_RXDONE |
mluis 0:45c4f0364ca4 668 //RFLR_IRQFLAGS_PAYLOADCRCERROR |
mluis 0:45c4f0364ca4 669 RFLR_IRQFLAGS_VALIDHEADER |
mluis 0:45c4f0364ca4 670 RFLR_IRQFLAGS_TXDONE |
mluis 0:45c4f0364ca4 671 RFLR_IRQFLAGS_CADDONE |
mluis 0:45c4f0364ca4 672 RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
mluis 0:45c4f0364ca4 673 RFLR_IRQFLAGS_CADDETECTED );
mluis 7:b988b60083a1 674
mluis 0:45c4f0364ca4 675 // DIO0=RxDone
mluis 0:45c4f0364ca4 676 Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK ) | RFLR_DIOMAPPING1_DIO0_00 );
mluis 0:45c4f0364ca4 677 }
mluis 0:45c4f0364ca4 678 Write( REG_LR_FIFORXBASEADDR, 0 );
mluis 0:45c4f0364ca4 679 Write( REG_LR_FIFOADDRPTR, 0 );
mluis 0:45c4f0364ca4 680 }
mluis 0:45c4f0364ca4 681 break;
mluis 0:45c4f0364ca4 682 }
mluis 0:45c4f0364ca4 683
mluis 7:b988b60083a1 684 memset( rxtxBuffer, 0, ( size_t )RX_BUFFER_SIZE );
mluis 0:45c4f0364ca4 685
mluis 0:45c4f0364ca4 686 this->settings.State = RF_RX_RUNNING;
mluis 0:45c4f0364ca4 687 if( timeout != 0 )
mluis 0:45c4f0364ca4 688 {
Lorenzo Maiorfi 8:1002d3025eaa 689 rxTimeoutTimer.attach_us(mbed::callback( this, &SX1272::enqueueOnTimeoutIrq /*&SX1272::OnTimeoutIrq*/ ), timeout * 1e3 );
mluis 0:45c4f0364ca4 690 }
mluis 0:45c4f0364ca4 691
mluis 0:45c4f0364ca4 692 if( this->settings.Modem == MODEM_FSK )
mluis 0:45c4f0364ca4 693 {
mluis 0:45c4f0364ca4 694 SetOpMode( RF_OPMODE_RECEIVER );
mluis 7:b988b60083a1 695
mluis 0:45c4f0364ca4 696 if( rxContinuous == false )
mluis 0:45c4f0364ca4 697 {
Lorenzo Maiorfi 8:1002d3025eaa 698 rxTimeoutSyncWord.attach_us( mbed::callback( this, &SX1272::enqueueOnTimeoutIrq /*&SX1272::OnTimeoutIrq*/ ),
mluis 7:b988b60083a1 699 this->settings.Fsk.RxSingleTimeout * 1e3 );
mluis 0:45c4f0364ca4 700 }
mluis 0:45c4f0364ca4 701 }
mluis 0:45c4f0364ca4 702 else
mluis 0:45c4f0364ca4 703 {
mluis 0:45c4f0364ca4 704 if( rxContinuous == true )
mluis 0:45c4f0364ca4 705 {
mluis 0:45c4f0364ca4 706 SetOpMode( RFLR_OPMODE_RECEIVER );
mluis 0:45c4f0364ca4 707 }
mluis 0:45c4f0364ca4 708 else
mluis 0:45c4f0364ca4 709 {
mluis 0:45c4f0364ca4 710 SetOpMode( RFLR_OPMODE_RECEIVER_SINGLE );
mluis 0:45c4f0364ca4 711 }
mluis 0:45c4f0364ca4 712 }
mluis 0:45c4f0364ca4 713 }
mluis 0:45c4f0364ca4 714
mluis 0:45c4f0364ca4 715 void SX1272::Tx( uint32_t timeout )
mluis 0:45c4f0364ca4 716 {
mluis 0:45c4f0364ca4 717
mluis 0:45c4f0364ca4 718 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 719 {
mluis 0:45c4f0364ca4 720 case MODEM_FSK:
mluis 0:45c4f0364ca4 721 {
mluis 0:45c4f0364ca4 722 // DIO0=PacketSent
mluis 7:b988b60083a1 723 // DIO1=FifoEmpty
mluis 0:45c4f0364ca4 724 // DIO2=FifoFull
mluis 0:45c4f0364ca4 725 // DIO3=FifoEmpty
mluis 0:45c4f0364ca4 726 // DIO4=LowBat
mluis 0:45c4f0364ca4 727 // DIO5=ModeReady
mluis 0:45c4f0364ca4 728 Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RF_DIOMAPPING1_DIO0_MASK &
mluis 7:b988b60083a1 729 RF_DIOMAPPING1_DIO1_MASK &
mluis 7:b988b60083a1 730 RF_DIOMAPPING1_DIO2_MASK ) |
mluis 7:b988b60083a1 731 RF_DIOMAPPING1_DIO1_01 );
mluis 0:45c4f0364ca4 732
mluis 0:45c4f0364ca4 733 Write( REG_DIOMAPPING2, ( Read( REG_DIOMAPPING2 ) & RF_DIOMAPPING2_DIO4_MASK &
mluis 0:45c4f0364ca4 734 RF_DIOMAPPING2_MAP_MASK ) );
mluis 0:45c4f0364ca4 735 this->settings.FskPacketHandler.FifoThresh = Read( REG_FIFOTHRESH ) & 0x3F;
mluis 0:45c4f0364ca4 736 }
mluis 0:45c4f0364ca4 737 break;
mluis 0:45c4f0364ca4 738 case MODEM_LORA:
mluis 0:45c4f0364ca4 739 {
mluis 0:45c4f0364ca4 740 if( this->settings.LoRa.FreqHopOn == true )
mluis 0:45c4f0364ca4 741 {
mluis 0:45c4f0364ca4 742 Write( REG_LR_IRQFLAGSMASK, RFLR_IRQFLAGS_RXTIMEOUT |
mluis 0:45c4f0364ca4 743 RFLR_IRQFLAGS_RXDONE |
mluis 0:45c4f0364ca4 744 RFLR_IRQFLAGS_PAYLOADCRCERROR |
mluis 0:45c4f0364ca4 745 RFLR_IRQFLAGS_VALIDHEADER |
mluis 0:45c4f0364ca4 746 //RFLR_IRQFLAGS_TXDONE |
mluis 0:45c4f0364ca4 747 RFLR_IRQFLAGS_CADDONE |
mluis 0:45c4f0364ca4 748 //RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
mluis 0:45c4f0364ca4 749 RFLR_IRQFLAGS_CADDETECTED );
mluis 7:b988b60083a1 750
mluis 0:45c4f0364ca4 751 // DIO0=TxDone, DIO2=FhssChangeChannel
mluis 0:45c4f0364ca4 752 Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK & RFLR_DIOMAPPING1_DIO2_MASK ) | RFLR_DIOMAPPING1_DIO0_01 | RFLR_DIOMAPPING1_DIO2_00 );
mluis 0:45c4f0364ca4 753 }
mluis 0:45c4f0364ca4 754 else
mluis 0:45c4f0364ca4 755 {
mluis 0:45c4f0364ca4 756 Write( REG_LR_IRQFLAGSMASK, RFLR_IRQFLAGS_RXTIMEOUT |
mluis 0:45c4f0364ca4 757 RFLR_IRQFLAGS_RXDONE |
mluis 0:45c4f0364ca4 758 RFLR_IRQFLAGS_PAYLOADCRCERROR |
mluis 0:45c4f0364ca4 759 RFLR_IRQFLAGS_VALIDHEADER |
mluis 0:45c4f0364ca4 760 //RFLR_IRQFLAGS_TXDONE |
mluis 0:45c4f0364ca4 761 RFLR_IRQFLAGS_CADDONE |
mluis 0:45c4f0364ca4 762 RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
mluis 0:45c4f0364ca4 763 RFLR_IRQFLAGS_CADDETECTED );
mluis 0:45c4f0364ca4 764
mluis 0:45c4f0364ca4 765 // DIO0=TxDone
mluis 0:45c4f0364ca4 766 Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK ) | RFLR_DIOMAPPING1_DIO0_01 );
mluis 0:45c4f0364ca4 767 }
mluis 0:45c4f0364ca4 768 }
mluis 0:45c4f0364ca4 769 break;
mluis 0:45c4f0364ca4 770 }
mluis 0:45c4f0364ca4 771
mluis 0:45c4f0364ca4 772 this->settings.State = RF_TX_RUNNING;
Lorenzo Maiorfi 8:1002d3025eaa 773 txTimeoutTimer.attach_us( mbed::callback( this, &SX1272::enqueueOnTimeoutIrq /*&SX1272::OnTimeoutIrq*/ ), timeout * 1e3 );
mluis 0:45c4f0364ca4 774 SetOpMode( RF_OPMODE_TRANSMITTER );
mluis 0:45c4f0364ca4 775 }
mluis 0:45c4f0364ca4 776
mluis 0:45c4f0364ca4 777 void SX1272::StartCad( void )
mluis 0:45c4f0364ca4 778 {
mluis 0:45c4f0364ca4 779 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 780 {
mluis 0:45c4f0364ca4 781 case MODEM_FSK:
mluis 0:45c4f0364ca4 782 {
mluis 7:b988b60083a1 783
mluis 0:45c4f0364ca4 784 }
mluis 0:45c4f0364ca4 785 break;
mluis 0:45c4f0364ca4 786 case MODEM_LORA:
mluis 0:45c4f0364ca4 787 {
mluis 0:45c4f0364ca4 788 Write( REG_LR_IRQFLAGSMASK, RFLR_IRQFLAGS_RXTIMEOUT |
mluis 0:45c4f0364ca4 789 RFLR_IRQFLAGS_RXDONE |
mluis 0:45c4f0364ca4 790 RFLR_IRQFLAGS_PAYLOADCRCERROR |
mluis 0:45c4f0364ca4 791 RFLR_IRQFLAGS_VALIDHEADER |
mluis 0:45c4f0364ca4 792 RFLR_IRQFLAGS_TXDONE |
mluis 0:45c4f0364ca4 793 //RFLR_IRQFLAGS_CADDONE |
mluis 0:45c4f0364ca4 794 RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL // |
mluis 7:b988b60083a1 795 //RFLR_IRQFLAGS_CADDETECTED
mluis 0:45c4f0364ca4 796 );
mluis 7:b988b60083a1 797
mluis 0:45c4f0364ca4 798 // DIO3=CADDone
mluis 7:b988b60083a1 799 Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO3_MASK ) | RFLR_DIOMAPPING1_DIO3_00 );
mluis 7:b988b60083a1 800
mluis 0:45c4f0364ca4 801 this->settings.State = RF_CAD;
mluis 0:45c4f0364ca4 802 SetOpMode( RFLR_OPMODE_CAD );
mluis 0:45c4f0364ca4 803 }
mluis 0:45c4f0364ca4 804 break;
mluis 0:45c4f0364ca4 805 default:
mluis 0:45c4f0364ca4 806 break;
mluis 0:45c4f0364ca4 807 }
mluis 0:45c4f0364ca4 808 }
mluis 0:45c4f0364ca4 809
mluis 7:b988b60083a1 810 void SX1272::SetTxContinuousWave( uint32_t freq, int8_t power, uint16_t time )
mluis 7:b988b60083a1 811 {
mluis 7:b988b60083a1 812 uint32_t timeout = ( uint32_t )( time * 1e6 );
mluis 7:b988b60083a1 813
mluis 7:b988b60083a1 814 SetChannel( freq );
mluis 7:b988b60083a1 815
mluis 7:b988b60083a1 816 SetTxConfig( MODEM_FSK, power, 0, 0, 4800, 0, 5, false, false, 0, 0, 0, timeout );
mluis 7:b988b60083a1 817
mluis 7:b988b60083a1 818 Write( REG_PACKETCONFIG2, ( Read( REG_PACKETCONFIG2 ) & RF_PACKETCONFIG2_DATAMODE_MASK ) );
mluis 7:b988b60083a1 819 // Disable radio interrupts
mluis 7:b988b60083a1 820 Write( REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_11 | RF_DIOMAPPING1_DIO1_11 );
mluis 7:b988b60083a1 821 Write( REG_DIOMAPPING2, RF_DIOMAPPING2_DIO4_10 | RF_DIOMAPPING2_DIO5_10 );
mluis 7:b988b60083a1 822
mluis 7:b988b60083a1 823 this->settings.State = RF_TX_RUNNING;
Lorenzo Maiorfi 8:1002d3025eaa 824 txTimeoutTimer.attach_us( mbed::callback( this, &SX1272::enqueueOnTimeoutIrq /*&SX1272::OnTimeoutIrq*/ ), timeout );
mluis 7:b988b60083a1 825 SetOpMode( RF_OPMODE_TRANSMITTER );
mluis 7:b988b60083a1 826 }
mluis 7:b988b60083a1 827
mluis 0:45c4f0364ca4 828 int16_t SX1272::GetRssi( RadioModems_t modem )
mluis 0:45c4f0364ca4 829 {
mluis 0:45c4f0364ca4 830 int16_t rssi = 0;
mluis 0:45c4f0364ca4 831
mluis 0:45c4f0364ca4 832 switch( modem )
mluis 0:45c4f0364ca4 833 {
mluis 0:45c4f0364ca4 834 case MODEM_FSK:
mluis 0:45c4f0364ca4 835 rssi = -( Read( REG_RSSIVALUE ) >> 1 );
mluis 0:45c4f0364ca4 836 break;
mluis 0:45c4f0364ca4 837 case MODEM_LORA:
mluis 0:45c4f0364ca4 838 rssi = RSSI_OFFSET + Read( REG_LR_RSSIVALUE );
mluis 0:45c4f0364ca4 839 break;
mluis 0:45c4f0364ca4 840 default:
mluis 0:45c4f0364ca4 841 rssi = -1;
mluis 0:45c4f0364ca4 842 break;
mluis 0:45c4f0364ca4 843 }
mluis 0:45c4f0364ca4 844 return rssi;
mluis 0:45c4f0364ca4 845 }
mluis 0:45c4f0364ca4 846
mluis 0:45c4f0364ca4 847 void SX1272::SetOpMode( uint8_t opMode )
mluis 0:45c4f0364ca4 848 {
mluis 7:b988b60083a1 849 if( opMode == RF_OPMODE_SLEEP )
mluis 0:45c4f0364ca4 850 {
mluis 7:b988b60083a1 851 SetAntSwLowPower( true );
mluis 0:45c4f0364ca4 852 }
mluis 7:b988b60083a1 853 else
mluis 7:b988b60083a1 854 {
mluis 7:b988b60083a1 855 SetAntSwLowPower( false );
mluis 7:b988b60083a1 856 SetAntSw( opMode );
mluis 7:b988b60083a1 857 }
mluis 7:b988b60083a1 858 Write( REG_OPMODE, ( Read( REG_OPMODE ) & RF_OPMODE_MASK ) | opMode );
mluis 0:45c4f0364ca4 859 }
mluis 0:45c4f0364ca4 860
mluis 0:45c4f0364ca4 861 void SX1272::SetModem( RadioModems_t modem )
mluis 0:45c4f0364ca4 862 {
mluis 7:b988b60083a1 863 if( ( Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_ON ) != 0 )
mluis 7:b988b60083a1 864 {
mluis 7:b988b60083a1 865 this->settings.Modem = MODEM_LORA;
mluis 7:b988b60083a1 866 }
mluis 7:b988b60083a1 867 else
mluis 7:b988b60083a1 868 {
mluis 7:b988b60083a1 869 this->settings.Modem = MODEM_FSK;
mluis 7:b988b60083a1 870 }
mluis 7:b988b60083a1 871
mluis 0:45c4f0364ca4 872 if( this->settings.Modem == modem )
mluis 0:45c4f0364ca4 873 {
mluis 0:45c4f0364ca4 874 return;
mluis 0:45c4f0364ca4 875 }
mluis 0:45c4f0364ca4 876
mluis 0:45c4f0364ca4 877 this->settings.Modem = modem;
mluis 0:45c4f0364ca4 878 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 879 {
mluis 0:45c4f0364ca4 880 default:
mluis 0:45c4f0364ca4 881 case MODEM_FSK:
mluis 7:b988b60083a1 882 Sleep( );
mluis 0:45c4f0364ca4 883 Write( REG_OPMODE, ( Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_MASK ) | RFLR_OPMODE_LONGRANGEMODE_OFF );
mluis 7:b988b60083a1 884
mluis 0:45c4f0364ca4 885 Write( REG_DIOMAPPING1, 0x00 );
mluis 0:45c4f0364ca4 886 Write( REG_DIOMAPPING2, 0x30 ); // DIO5=ModeReady
mluis 0:45c4f0364ca4 887 break;
mluis 0:45c4f0364ca4 888 case MODEM_LORA:
mluis 7:b988b60083a1 889 Sleep( );
mluis 0:45c4f0364ca4 890 Write( REG_OPMODE, ( Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_MASK ) | RFLR_OPMODE_LONGRANGEMODE_ON );
mluis 0:45c4f0364ca4 891
mluis 0:45c4f0364ca4 892 Write( REG_DIOMAPPING1, 0x00 );
mluis 0:45c4f0364ca4 893 Write( REG_DIOMAPPING2, 0x00 );
mluis 0:45c4f0364ca4 894 break;
mluis 0:45c4f0364ca4 895 }
mluis 0:45c4f0364ca4 896 }
mluis 0:45c4f0364ca4 897
mluis 0:45c4f0364ca4 898 void SX1272::SetMaxPayloadLength( RadioModems_t modem, uint8_t max )
mluis 0:45c4f0364ca4 899 {
mluis 0:45c4f0364ca4 900 this->SetModem( modem );
mluis 0:45c4f0364ca4 901
mluis 0:45c4f0364ca4 902 switch( modem )
mluis 0:45c4f0364ca4 903 {
mluis 0:45c4f0364ca4 904 case MODEM_FSK:
mluis 0:45c4f0364ca4 905 if( this->settings.Fsk.FixLen == false )
mluis 0:45c4f0364ca4 906 {
mluis 0:45c4f0364ca4 907 this->Write( REG_PAYLOADLENGTH, max );
mluis 0:45c4f0364ca4 908 }
mluis 0:45c4f0364ca4 909 break;
mluis 0:45c4f0364ca4 910 case MODEM_LORA:
mluis 0:45c4f0364ca4 911 this->Write( REG_LR_PAYLOADMAXLENGTH, max );
mluis 0:45c4f0364ca4 912 break;
mluis 0:45c4f0364ca4 913 }
mluis 0:45c4f0364ca4 914 }
mluis 0:45c4f0364ca4 915
mluis 7:b988b60083a1 916 void SX1272::SetPublicNetwork( bool enable )
mluis 7:b988b60083a1 917 {
mluis 7:b988b60083a1 918 SetModem( MODEM_LORA );
mluis 7:b988b60083a1 919 this->settings.LoRa.PublicNetwork = enable;
mluis 7:b988b60083a1 920 if( enable == true )
mluis 7:b988b60083a1 921 {
mluis 7:b988b60083a1 922 // Change LoRa modem SyncWord
mluis 7:b988b60083a1 923 Write( REG_LR_SYNCWORD, LORA_MAC_PUBLIC_SYNCWORD );
mluis 7:b988b60083a1 924 }
mluis 7:b988b60083a1 925 else
mluis 7:b988b60083a1 926 {
mluis 7:b988b60083a1 927 // Change LoRa modem SyncWord
mluis 7:b988b60083a1 928 Write( REG_LR_SYNCWORD, LORA_MAC_PRIVATE_SYNCWORD );
mluis 7:b988b60083a1 929 }
mluis 7:b988b60083a1 930 }
mluis 7:b988b60083a1 931
mluis 0:45c4f0364ca4 932 void SX1272::OnTimeoutIrq( void )
mluis 0:45c4f0364ca4 933 {
mluis 0:45c4f0364ca4 934 switch( this->settings.State )
mluis 0:45c4f0364ca4 935 {
mluis 0:45c4f0364ca4 936 case RF_RX_RUNNING:
mluis 0:45c4f0364ca4 937 if( this->settings.Modem == MODEM_FSK )
mluis 0:45c4f0364ca4 938 {
mluis 0:45c4f0364ca4 939 this->settings.FskPacketHandler.PreambleDetected = false;
mluis 0:45c4f0364ca4 940 this->settings.FskPacketHandler.SyncWordDetected = false;
mluis 0:45c4f0364ca4 941 this->settings.FskPacketHandler.NbBytes = 0;
mluis 0:45c4f0364ca4 942 this->settings.FskPacketHandler.Size = 0;
mluis 0:45c4f0364ca4 943
mluis 0:45c4f0364ca4 944 // Clear Irqs
mluis 7:b988b60083a1 945 Write( REG_IRQFLAGS1, RF_IRQFLAGS1_RSSI |
mluis 0:45c4f0364ca4 946 RF_IRQFLAGS1_PREAMBLEDETECT |
mluis 0:45c4f0364ca4 947 RF_IRQFLAGS1_SYNCADDRESSMATCH );
mluis 0:45c4f0364ca4 948 Write( REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN );
mluis 0:45c4f0364ca4 949
mluis 0:45c4f0364ca4 950 if( this->settings.Fsk.RxContinuous == true )
mluis 0:45c4f0364ca4 951 {
mluis 0:45c4f0364ca4 952 // Continuous mode restart Rx chain
mluis 0:45c4f0364ca4 953 Write( REG_RXCONFIG, Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
Lorenzo Maiorfi 8:1002d3025eaa 954 rxTimeoutSyncWord.attach_us( mbed::callback( this, &SX1272::enqueueOnTimeoutIrq /*&SX1272::OnTimeoutIrq*/ ),
mluis 7:b988b60083a1 955 this->settings.Fsk.RxSingleTimeout * 1e3 );
mluis 0:45c4f0364ca4 956 }
mluis 0:45c4f0364ca4 957 else
mluis 0:45c4f0364ca4 958 {
mluis 0:45c4f0364ca4 959 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 960 rxTimeoutSyncWord.detach( );
mluis 0:45c4f0364ca4 961 }
mluis 0:45c4f0364ca4 962 }
mluis 0:45c4f0364ca4 963 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxTimeout != NULL ) )
mluis 0:45c4f0364ca4 964 {
Lorenzo Maiorfi 8:1002d3025eaa 965 /*this->RadioEvents->RxTimeout( );*/
Lorenzo Maiorfi 8:1002d3025eaa 966 enqueueRadioEvent_RxTimeout();
mluis 0:45c4f0364ca4 967 }
mluis 0:45c4f0364ca4 968 break;
mluis 0:45c4f0364ca4 969 case RF_TX_RUNNING:
mluis 7:b988b60083a1 970 // Tx timeout shouldn't happen.
mluis 7:b988b60083a1 971 // But it has been observed that when it happens it is a result of a corrupted SPI transfer
mluis 7:b988b60083a1 972 // it depends on the platform design.
mluis 7:b988b60083a1 973 //
mluis 7:b988b60083a1 974 // The workaround is to put the radio in a known state. Thus, we re-initialize it.
mluis 7:b988b60083a1 975
mluis 7:b988b60083a1 976 // BEGIN WORKAROUND
mluis 7:b988b60083a1 977
mluis 7:b988b60083a1 978 // Reset the radio
mluis 7:b988b60083a1 979 Reset( );
mluis 7:b988b60083a1 980
mluis 7:b988b60083a1 981 // Initialize radio default values
mluis 7:b988b60083a1 982 SetOpMode( RF_OPMODE_SLEEP );
mluis 7:b988b60083a1 983
mluis 7:b988b60083a1 984 RadioRegistersInit( );
mluis 7:b988b60083a1 985
mluis 7:b988b60083a1 986 SetModem( MODEM_FSK );
mluis 7:b988b60083a1 987
mluis 7:b988b60083a1 988 // Restore previous network type setting.
mluis 7:b988b60083a1 989 SetPublicNetwork( this->settings.LoRa.PublicNetwork );
mluis 7:b988b60083a1 990 // END WORKAROUND
mluis 7:b988b60083a1 991
mluis 0:45c4f0364ca4 992 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 993 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->TxTimeout != NULL ) )
mluis 0:45c4f0364ca4 994 {
Lorenzo Maiorfi 8:1002d3025eaa 995 /*this->RadioEvents->TxTimeout( );*/
Lorenzo Maiorfi 8:1002d3025eaa 996 enqueueRadioEvent_TxTimeout();
mluis 0:45c4f0364ca4 997 }
mluis 0:45c4f0364ca4 998 break;
mluis 0:45c4f0364ca4 999 default:
mluis 0:45c4f0364ca4 1000 break;
mluis 0:45c4f0364ca4 1001 }
mluis 0:45c4f0364ca4 1002 }
mluis 0:45c4f0364ca4 1003
mluis 0:45c4f0364ca4 1004 void SX1272::OnDio0Irq( void )
mluis 0:45c4f0364ca4 1005 {
mluis 0:45c4f0364ca4 1006 volatile uint8_t irqFlags = 0;
mluis 0:45c4f0364ca4 1007
mluis 0:45c4f0364ca4 1008 switch( this->settings.State )
mluis 7:b988b60083a1 1009 {
mluis 0:45c4f0364ca4 1010 case RF_RX_RUNNING:
mluis 0:45c4f0364ca4 1011 //TimerStop( &RxTimeoutTimer );
mluis 0:45c4f0364ca4 1012 // RxDone interrupt
mluis 0:45c4f0364ca4 1013 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1014 {
mluis 0:45c4f0364ca4 1015 case MODEM_FSK:
mluis 0:45c4f0364ca4 1016 if( this->settings.Fsk.CrcOn == true )
mluis 0:45c4f0364ca4 1017 {
mluis 0:45c4f0364ca4 1018 irqFlags = Read( REG_IRQFLAGS2 );
mluis 0:45c4f0364ca4 1019 if( ( irqFlags & RF_IRQFLAGS2_CRCOK ) != RF_IRQFLAGS2_CRCOK )
mluis 0:45c4f0364ca4 1020 {
mluis 0:45c4f0364ca4 1021 // Clear Irqs
mluis 7:b988b60083a1 1022 Write( REG_IRQFLAGS1, RF_IRQFLAGS1_RSSI |
mluis 0:45c4f0364ca4 1023 RF_IRQFLAGS1_PREAMBLEDETECT |
mluis 0:45c4f0364ca4 1024 RF_IRQFLAGS1_SYNCADDRESSMATCH );
mluis 0:45c4f0364ca4 1025 Write( REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN );
mluis 7:b988b60083a1 1026
mluis 7:b988b60083a1 1027 rxTimeoutTimer.detach( );
mluis 7:b988b60083a1 1028
mluis 0:45c4f0364ca4 1029 if( this->settings.Fsk.RxContinuous == false )
mluis 0:45c4f0364ca4 1030 {
mluis 7:b988b60083a1 1031 rxTimeoutSyncWord.detach( );
mluis 0:45c4f0364ca4 1032 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 1033 }
mluis 0:45c4f0364ca4 1034 else
mluis 0:45c4f0364ca4 1035 {
mluis 0:45c4f0364ca4 1036 // Continuous mode restart Rx chain
mluis 0:45c4f0364ca4 1037 Write( REG_RXCONFIG, Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
Lorenzo Maiorfi 8:1002d3025eaa 1038 rxTimeoutSyncWord.attach_us( mbed::callback( this, &SX1272::enqueueOnTimeoutIrq /*&SX1272::OnTimeoutIrq*/ ),
mluis 7:b988b60083a1 1039 this->settings.Fsk.RxSingleTimeout * 1e3 );
mluis 0:45c4f0364ca4 1040 }
mluis 7:b988b60083a1 1041
mluis 0:45c4f0364ca4 1042 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxError != NULL ) )
mluis 0:45c4f0364ca4 1043 {
Lorenzo Maiorfi 8:1002d3025eaa 1044 /*this->RadioEvents->RxError( );*/
Lorenzo Maiorfi 8:1002d3025eaa 1045 enqueueRadioEvent_RxError();
mluis 0:45c4f0364ca4 1046 }
mluis 0:45c4f0364ca4 1047 this->settings.FskPacketHandler.PreambleDetected = false;
mluis 0:45c4f0364ca4 1048 this->settings.FskPacketHandler.SyncWordDetected = false;
mluis 0:45c4f0364ca4 1049 this->settings.FskPacketHandler.NbBytes = 0;
mluis 0:45c4f0364ca4 1050 this->settings.FskPacketHandler.Size = 0;
mluis 0:45c4f0364ca4 1051 break;
mluis 0:45c4f0364ca4 1052 }
mluis 0:45c4f0364ca4 1053 }
mluis 0:45c4f0364ca4 1054
mluis 0:45c4f0364ca4 1055 // Read received packet size
mluis 0:45c4f0364ca4 1056 if( ( this->settings.FskPacketHandler.Size == 0 ) && ( this->settings.FskPacketHandler.NbBytes == 0 ) )
mluis 0:45c4f0364ca4 1057 {
mluis 0:45c4f0364ca4 1058 if( this->settings.Fsk.FixLen == false )
mluis 0:45c4f0364ca4 1059 {
mluis 0:45c4f0364ca4 1060 ReadFifo( ( uint8_t* )&this->settings.FskPacketHandler.Size, 1 );
mluis 0:45c4f0364ca4 1061 }
mluis 0:45c4f0364ca4 1062 else
mluis 0:45c4f0364ca4 1063 {
mluis 0:45c4f0364ca4 1064 this->settings.FskPacketHandler.Size = Read( REG_PAYLOADLENGTH );
mluis 0:45c4f0364ca4 1065 }
mluis 7:b988b60083a1 1066 ReadFifo( rxtxBuffer + this->settings.FskPacketHandler.NbBytes, this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
mluis 0:45c4f0364ca4 1067 this->settings.FskPacketHandler.NbBytes += ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
mluis 0:45c4f0364ca4 1068 }
mluis 0:45c4f0364ca4 1069 else
mluis 0:45c4f0364ca4 1070 {
mluis 7:b988b60083a1 1071 ReadFifo( rxtxBuffer + this->settings.FskPacketHandler.NbBytes, this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
mluis 0:45c4f0364ca4 1072 this->settings.FskPacketHandler.NbBytes += ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
mluis 0:45c4f0364ca4 1073 }
mluis 0:45c4f0364ca4 1074
mluis 7:b988b60083a1 1075 rxTimeoutTimer.detach( );
mluis 7:b988b60083a1 1076
mluis 0:45c4f0364ca4 1077 if( this->settings.Fsk.RxContinuous == false )
mluis 0:45c4f0364ca4 1078 {
mluis 0:45c4f0364ca4 1079 this->settings.State = RF_IDLE;
mluis 7:b988b60083a1 1080 rxTimeoutSyncWord.detach( );
mluis 0:45c4f0364ca4 1081 }
mluis 0:45c4f0364ca4 1082 else
mluis 0:45c4f0364ca4 1083 {
mluis 0:45c4f0364ca4 1084 // Continuous mode restart Rx chain
mluis 0:45c4f0364ca4 1085 Write( REG_RXCONFIG, Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
Lorenzo Maiorfi 8:1002d3025eaa 1086 rxTimeoutSyncWord.attach_us( mbed::callback( this, &SX1272::enqueueOnTimeoutIrq /*&SX1272::OnTimeoutIrq*/ ),
mluis 7:b988b60083a1 1087 this->settings.Fsk.RxSingleTimeout * 1e3 );
mluis 0:45c4f0364ca4 1088 }
mluis 0:45c4f0364ca4 1089
mluis 0:45c4f0364ca4 1090 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxDone != NULL ) )
mluis 0:45c4f0364ca4 1091 {
Lorenzo Maiorfi 8:1002d3025eaa 1092 /*this->RadioEvents->RxDone( rxtxBuffer, this->settings.FskPacketHandler.Size, this->settings.FskPacketHandler.RssiValue, 0 );*/
Lorenzo Maiorfi 8:1002d3025eaa 1093 enqueueRadioEvent_RxDone(rxtxBuffer, this->settings.FskPacketHandler.Size, this->settings.FskPacketHandler.RssiValue, 0);
mluis 7:b988b60083a1 1094 }
mluis 0:45c4f0364ca4 1095 this->settings.FskPacketHandler.PreambleDetected = false;
mluis 0:45c4f0364ca4 1096 this->settings.FskPacketHandler.SyncWordDetected = false;
mluis 0:45c4f0364ca4 1097 this->settings.FskPacketHandler.NbBytes = 0;
mluis 0:45c4f0364ca4 1098 this->settings.FskPacketHandler.Size = 0;
mluis 0:45c4f0364ca4 1099 break;
mluis 0:45c4f0364ca4 1100 case MODEM_LORA:
mluis 0:45c4f0364ca4 1101 {
mluis 0:45c4f0364ca4 1102 int8_t snr = 0;
mluis 0:45c4f0364ca4 1103
mluis 0:45c4f0364ca4 1104 // Clear Irq
mluis 0:45c4f0364ca4 1105 Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_RXDONE );
mluis 0:45c4f0364ca4 1106
mluis 0:45c4f0364ca4 1107 irqFlags = Read( REG_LR_IRQFLAGS );
mluis 0:45c4f0364ca4 1108 if( ( irqFlags & RFLR_IRQFLAGS_PAYLOADCRCERROR_MASK ) == RFLR_IRQFLAGS_PAYLOADCRCERROR )
mluis 0:45c4f0364ca4 1109 {
mluis 0:45c4f0364ca4 1110 // Clear Irq
mluis 0:45c4f0364ca4 1111 Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_PAYLOADCRCERROR );
mluis 0:45c4f0364ca4 1112
mluis 0:45c4f0364ca4 1113 if( this->settings.LoRa.RxContinuous == false )
mluis 0:45c4f0364ca4 1114 {
mluis 0:45c4f0364ca4 1115 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 1116 }
mluis 0:45c4f0364ca4 1117 rxTimeoutTimer.detach( );
mluis 0:45c4f0364ca4 1118
mluis 0:45c4f0364ca4 1119 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxError != NULL ) )
mluis 0:45c4f0364ca4 1120 {
Lorenzo Maiorfi 8:1002d3025eaa 1121 /*this->RadioEvents->RxError( );*/
Lorenzo Maiorfi 8:1002d3025eaa 1122 enqueueRadioEvent_RxError();
mluis 0:45c4f0364ca4 1123 }
mluis 0:45c4f0364ca4 1124 break;
mluis 0:45c4f0364ca4 1125 }
mluis 0:45c4f0364ca4 1126
mluis 0:45c4f0364ca4 1127 this->settings.LoRaPacketHandler.SnrValue = Read( REG_LR_PKTSNRVALUE );
mluis 0:45c4f0364ca4 1128 if( this->settings.LoRaPacketHandler.SnrValue & 0x80 ) // The SNR sign bit is 1
mluis 0:45c4f0364ca4 1129 {
mluis 0:45c4f0364ca4 1130 // Invert and divide by 4
mluis 0:45c4f0364ca4 1131 snr = ( ( ~this->settings.LoRaPacketHandler.SnrValue + 1 ) & 0xFF ) >> 2;
mluis 0:45c4f0364ca4 1132 snr = -snr;
mluis 0:45c4f0364ca4 1133 }
mluis 0:45c4f0364ca4 1134 else
mluis 0:45c4f0364ca4 1135 {
mluis 0:45c4f0364ca4 1136 // Divide by 4
mluis 0:45c4f0364ca4 1137 snr = ( this->settings.LoRaPacketHandler.SnrValue & 0xFF ) >> 2;
mluis 0:45c4f0364ca4 1138 }
mluis 0:45c4f0364ca4 1139
mluis 0:45c4f0364ca4 1140 int16_t rssi = Read( REG_LR_PKTRSSIVALUE );
mluis 0:45c4f0364ca4 1141 if( snr < 0 )
mluis 0:45c4f0364ca4 1142 {
mluis 0:45c4f0364ca4 1143 this->settings.LoRaPacketHandler.RssiValue = RSSI_OFFSET + rssi + ( rssi >> 4 ) +
mluis 0:45c4f0364ca4 1144 snr;
mluis 0:45c4f0364ca4 1145 }
mluis 0:45c4f0364ca4 1146 else
mluis 7:b988b60083a1 1147 {
mluis 0:45c4f0364ca4 1148 this->settings.LoRaPacketHandler.RssiValue = RSSI_OFFSET + rssi + ( rssi >> 4 );
mluis 0:45c4f0364ca4 1149 }
mluis 0:45c4f0364ca4 1150
mluis 0:45c4f0364ca4 1151 this->settings.LoRaPacketHandler.Size = Read( REG_LR_RXNBBYTES );
mluis 7:b988b60083a1 1152 ReadFifo( rxtxBuffer, this->settings.LoRaPacketHandler.Size );
mluis 7:b988b60083a1 1153
mluis 0:45c4f0364ca4 1154 if( this->settings.LoRa.RxContinuous == false )
mluis 0:45c4f0364ca4 1155 {
mluis 0:45c4f0364ca4 1156 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 1157 }
mluis 0:45c4f0364ca4 1158 rxTimeoutTimer.detach( );
mluis 0:45c4f0364ca4 1159
mluis 0:45c4f0364ca4 1160 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxDone != NULL ) )
mluis 0:45c4f0364ca4 1161 {
Lorenzo Maiorfi 8:1002d3025eaa 1162 /*this->RadioEvents->RxDone( rxtxBuffer, this->settings.LoRaPacketHandler.Size, this->settings.LoRaPacketHandler.RssiValue, this->settings.LoRaPacketHandler.SnrValue );*/
Lorenzo Maiorfi 8:1002d3025eaa 1163 enqueueRadioEvent_RxDone(rxtxBuffer, this->settings.LoRaPacketHandler.Size, this->settings.LoRaPacketHandler.RssiValue, this->settings.LoRaPacketHandler.SnrValue);
mluis 0:45c4f0364ca4 1164 }
mluis 0:45c4f0364ca4 1165 }
mluis 0:45c4f0364ca4 1166 break;
mluis 0:45c4f0364ca4 1167 default:
mluis 0:45c4f0364ca4 1168 break;
mluis 0:45c4f0364ca4 1169 }
mluis 0:45c4f0364ca4 1170 break;
mluis 0:45c4f0364ca4 1171 case RF_TX_RUNNING:
mluis 7:b988b60083a1 1172 txTimeoutTimer.detach( );
mluis 0:45c4f0364ca4 1173 // TxDone interrupt
mluis 0:45c4f0364ca4 1174 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1175 {
mluis 0:45c4f0364ca4 1176 case MODEM_LORA:
mluis 0:45c4f0364ca4 1177 // Clear Irq
mluis 0:45c4f0364ca4 1178 Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_TXDONE );
mluis 0:45c4f0364ca4 1179 // Intentional fall through
mluis 0:45c4f0364ca4 1180 case MODEM_FSK:
mluis 0:45c4f0364ca4 1181 default:
mluis 0:45c4f0364ca4 1182 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 1183 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->TxDone != NULL ) )
mluis 0:45c4f0364ca4 1184 {
Lorenzo Maiorfi 8:1002d3025eaa 1185 /*this->RadioEvents->TxDone( );*/
Lorenzo Maiorfi 8:1002d3025eaa 1186 enqueueRadioEvent_TxDone();
mluis 7:b988b60083a1 1187 }
mluis 0:45c4f0364ca4 1188 break;
mluis 0:45c4f0364ca4 1189 }
mluis 0:45c4f0364ca4 1190 break;
mluis 0:45c4f0364ca4 1191 default:
mluis 0:45c4f0364ca4 1192 break;
mluis 0:45c4f0364ca4 1193 }
mluis 0:45c4f0364ca4 1194 }
mluis 0:45c4f0364ca4 1195
mluis 0:45c4f0364ca4 1196 void SX1272::OnDio1Irq( void )
mluis 0:45c4f0364ca4 1197 {
mluis 0:45c4f0364ca4 1198 switch( this->settings.State )
mluis 7:b988b60083a1 1199 {
mluis 0:45c4f0364ca4 1200 case RF_RX_RUNNING:
mluis 0:45c4f0364ca4 1201 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1202 {
mluis 0:45c4f0364ca4 1203 case MODEM_FSK:
mluis 0:45c4f0364ca4 1204 // FifoLevel interrupt
mluis 0:45c4f0364ca4 1205 // Read received packet size
mluis 0:45c4f0364ca4 1206 if( ( this->settings.FskPacketHandler.Size == 0 ) && ( this->settings.FskPacketHandler.NbBytes == 0 ) )
mluis 0:45c4f0364ca4 1207 {
mluis 0:45c4f0364ca4 1208 if( this->settings.Fsk.FixLen == false )
mluis 0:45c4f0364ca4 1209 {
mluis 0:45c4f0364ca4 1210 ReadFifo( ( uint8_t* )&this->settings.FskPacketHandler.Size, 1 );
mluis 0:45c4f0364ca4 1211 }
mluis 0:45c4f0364ca4 1212 else
mluis 0:45c4f0364ca4 1213 {
mluis 0:45c4f0364ca4 1214 this->settings.FskPacketHandler.Size = Read( REG_PAYLOADLENGTH );
mluis 0:45c4f0364ca4 1215 }
mluis 0:45c4f0364ca4 1216 }
mluis 0:45c4f0364ca4 1217
mluis 0:45c4f0364ca4 1218 if( ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes ) > this->settings.FskPacketHandler.FifoThresh )
mluis 0:45c4f0364ca4 1219 {
mluis 7:b988b60083a1 1220 ReadFifo( ( rxtxBuffer + this->settings.FskPacketHandler.NbBytes ), this->settings.FskPacketHandler.FifoThresh );
mluis 0:45c4f0364ca4 1221 this->settings.FskPacketHandler.NbBytes += this->settings.FskPacketHandler.FifoThresh;
mluis 0:45c4f0364ca4 1222 }
mluis 0:45c4f0364ca4 1223 else
mluis 0:45c4f0364ca4 1224 {
mluis 7:b988b60083a1 1225 ReadFifo( ( rxtxBuffer + this->settings.FskPacketHandler.NbBytes ), this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
mluis 0:45c4f0364ca4 1226 this->settings.FskPacketHandler.NbBytes += ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
mluis 0:45c4f0364ca4 1227 }
mluis 0:45c4f0364ca4 1228 break;
mluis 0:45c4f0364ca4 1229 case MODEM_LORA:
mluis 0:45c4f0364ca4 1230 // Sync time out
mluis 0:45c4f0364ca4 1231 rxTimeoutTimer.detach( );
mluis 7:b988b60083a1 1232 // Clear Irq
mluis 7:b988b60083a1 1233 Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_RXTIMEOUT );
mluis 7:b988b60083a1 1234
mluis 0:45c4f0364ca4 1235 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 1236 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxTimeout != NULL ) )
mluis 0:45c4f0364ca4 1237 {
Lorenzo Maiorfi 8:1002d3025eaa 1238 /*this->RadioEvents->RxTimeout( );*/
Lorenzo Maiorfi 8:1002d3025eaa 1239 enqueueRadioEvent_RxTimeout();
mluis 0:45c4f0364ca4 1240 }
mluis 0:45c4f0364ca4 1241 break;
mluis 0:45c4f0364ca4 1242 default:
mluis 0:45c4f0364ca4 1243 break;
mluis 0:45c4f0364ca4 1244 }
mluis 0:45c4f0364ca4 1245 break;
mluis 0:45c4f0364ca4 1246 case RF_TX_RUNNING:
mluis 0:45c4f0364ca4 1247 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1248 {
mluis 0:45c4f0364ca4 1249 case MODEM_FSK:
mluis 7:b988b60083a1 1250 // FifoEmpty interrupt
mluis 0:45c4f0364ca4 1251 if( ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes ) > this->settings.FskPacketHandler.ChunkSize )
mluis 0:45c4f0364ca4 1252 {
mluis 7:b988b60083a1 1253 WriteFifo( ( rxtxBuffer + this->settings.FskPacketHandler.NbBytes ), this->settings.FskPacketHandler.ChunkSize );
mluis 0:45c4f0364ca4 1254 this->settings.FskPacketHandler.NbBytes += this->settings.FskPacketHandler.ChunkSize;
mluis 0:45c4f0364ca4 1255 }
mluis 7:b988b60083a1 1256 else
mluis 0:45c4f0364ca4 1257 {
mluis 0:45c4f0364ca4 1258 // Write the last chunk of data
mluis 7:b988b60083a1 1259 WriteFifo( rxtxBuffer + this->settings.FskPacketHandler.NbBytes, this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
mluis 0:45c4f0364ca4 1260 this->settings.FskPacketHandler.NbBytes += this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes;
mluis 0:45c4f0364ca4 1261 }
mluis 0:45c4f0364ca4 1262 break;
mluis 0:45c4f0364ca4 1263 case MODEM_LORA:
mluis 0:45c4f0364ca4 1264 break;
mluis 0:45c4f0364ca4 1265 default:
mluis 0:45c4f0364ca4 1266 break;
mluis 0:45c4f0364ca4 1267 }
mluis 0:45c4f0364ca4 1268 break;
mluis 0:45c4f0364ca4 1269 default:
mluis 0:45c4f0364ca4 1270 break;
mluis 0:45c4f0364ca4 1271 }
mluis 0:45c4f0364ca4 1272 }
mluis 0:45c4f0364ca4 1273
mluis 0:45c4f0364ca4 1274 void SX1272::OnDio2Irq( void )
mluis 0:45c4f0364ca4 1275 {
mluis 0:45c4f0364ca4 1276 switch( this->settings.State )
mluis 7:b988b60083a1 1277 {
mluis 0:45c4f0364ca4 1278 case RF_RX_RUNNING:
mluis 0:45c4f0364ca4 1279 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1280 {
mluis 0:45c4f0364ca4 1281 case MODEM_FSK:
mluis 7:b988b60083a1 1282 // Checks if DIO4 is connected. If it is not PreambleDtected is set to true.
mluis 7:b988b60083a1 1283 if( this->dioIrq[4] == NULL )
mluis 7:b988b60083a1 1284 {
mluis 7:b988b60083a1 1285 this->settings.FskPacketHandler.PreambleDetected = true;
mluis 7:b988b60083a1 1286 }
mluis 7:b988b60083a1 1287
mluis 0:45c4f0364ca4 1288 if( ( this->settings.FskPacketHandler.PreambleDetected == true ) && ( this->settings.FskPacketHandler.SyncWordDetected == false ) )
mluis 0:45c4f0364ca4 1289 {
mluis 0:45c4f0364ca4 1290 rxTimeoutSyncWord.detach( );
mluis 7:b988b60083a1 1291
mluis 0:45c4f0364ca4 1292 this->settings.FskPacketHandler.SyncWordDetected = true;
mluis 7:b988b60083a1 1293
mluis 0:45c4f0364ca4 1294 this->settings.FskPacketHandler.RssiValue = -( Read( REG_RSSIVALUE ) >> 1 );
mluis 0:45c4f0364ca4 1295
mluis 0:45c4f0364ca4 1296 this->settings.FskPacketHandler.AfcValue = ( int32_t )( double )( ( ( uint16_t )Read( REG_AFCMSB ) << 8 ) |
mluis 0:45c4f0364ca4 1297 ( uint16_t )Read( REG_AFCLSB ) ) *
mluis 0:45c4f0364ca4 1298 ( double )FREQ_STEP;
mluis 0:45c4f0364ca4 1299 this->settings.FskPacketHandler.RxGain = ( Read( REG_LNA ) >> 5 ) & 0x07;
mluis 0:45c4f0364ca4 1300 }
mluis 0:45c4f0364ca4 1301 break;
mluis 0:45c4f0364ca4 1302 case MODEM_LORA:
mluis 0:45c4f0364ca4 1303 if( this->settings.LoRa.FreqHopOn == true )
mluis 0:45c4f0364ca4 1304 {
mluis 0:45c4f0364ca4 1305 // Clear Irq
mluis 0:45c4f0364ca4 1306 Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL );
mluis 7:b988b60083a1 1307
mluis 0:45c4f0364ca4 1308 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->FhssChangeChannel != NULL ) )
mluis 0:45c4f0364ca4 1309 {
Lorenzo Maiorfi 8:1002d3025eaa 1310 /*this->RadioEvents->FhssChangeChannel( ( Read( REG_LR_HOPCHANNEL ) & RFLR_HOPCHANNEL_CHANNEL_MASK ) );*/
Lorenzo Maiorfi 8:1002d3025eaa 1311 enqueueRadioEvent_FhssChangeChannel(( Read( REG_LR_HOPCHANNEL ) & RFLR_HOPCHANNEL_CHANNEL_MASK ) );
mluis 0:45c4f0364ca4 1312 }
mluis 0:45c4f0364ca4 1313 }
mluis 0:45c4f0364ca4 1314 break;
mluis 0:45c4f0364ca4 1315 default:
mluis 0:45c4f0364ca4 1316 break;
mluis 0:45c4f0364ca4 1317 }
mluis 0:45c4f0364ca4 1318 break;
mluis 0:45c4f0364ca4 1319 case RF_TX_RUNNING:
mluis 0:45c4f0364ca4 1320 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1321 {
mluis 0:45c4f0364ca4 1322 case MODEM_FSK:
mluis 0:45c4f0364ca4 1323 break;
mluis 0:45c4f0364ca4 1324 case MODEM_LORA:
mluis 0:45c4f0364ca4 1325 if( this->settings.LoRa.FreqHopOn == true )
mluis 0:45c4f0364ca4 1326 {
mluis 0:45c4f0364ca4 1327 // Clear Irq
mluis 0:45c4f0364ca4 1328 Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL );
mluis 7:b988b60083a1 1329
mluis 0:45c4f0364ca4 1330 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->FhssChangeChannel != NULL ) )
mluis 0:45c4f0364ca4 1331 {
Lorenzo Maiorfi 8:1002d3025eaa 1332 /*this->RadioEvents->FhssChangeChannel( ( Read( REG_LR_HOPCHANNEL ) & RFLR_HOPCHANNEL_CHANNEL_MASK ) );*/
Lorenzo Maiorfi 8:1002d3025eaa 1333 enqueueRadioEvent_FhssChangeChannel(( Read( REG_LR_HOPCHANNEL ) & RFLR_HOPCHANNEL_CHANNEL_MASK ));
mluis 0:45c4f0364ca4 1334 }
mluis 0:45c4f0364ca4 1335 }
mluis 0:45c4f0364ca4 1336 break;
mluis 0:45c4f0364ca4 1337 default:
mluis 0:45c4f0364ca4 1338 break;
mluis 0:45c4f0364ca4 1339 }
mluis 0:45c4f0364ca4 1340 break;
mluis 0:45c4f0364ca4 1341 default:
mluis 0:45c4f0364ca4 1342 break;
mluis 0:45c4f0364ca4 1343 }
mluis 0:45c4f0364ca4 1344 }
mluis 0:45c4f0364ca4 1345
mluis 0:45c4f0364ca4 1346 void SX1272::OnDio3Irq( void )
mluis 0:45c4f0364ca4 1347 {
mluis 0:45c4f0364ca4 1348 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1349 {
mluis 0:45c4f0364ca4 1350 case MODEM_FSK:
mluis 0:45c4f0364ca4 1351 break;
mluis 0:45c4f0364ca4 1352 case MODEM_LORA:
mluis 0:45c4f0364ca4 1353 if( ( Read( REG_LR_IRQFLAGS ) & RFLR_IRQFLAGS_CADDETECTED ) == RFLR_IRQFLAGS_CADDETECTED )
mluis 0:45c4f0364ca4 1354 {
mluis 0:45c4f0364ca4 1355 // Clear Irq
mluis 0:45c4f0364ca4 1356 Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_CADDETECTED | RFLR_IRQFLAGS_CADDONE );
mluis 0:45c4f0364ca4 1357 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->CadDone != NULL ) )
mluis 0:45c4f0364ca4 1358 {
Lorenzo Maiorfi 8:1002d3025eaa 1359 /*this->RadioEvents->CadDone( true );*/
Lorenzo Maiorfi 8:1002d3025eaa 1360 enqueueRadioEvent_CadDone(true);
mluis 0:45c4f0364ca4 1361 }
mluis 0:45c4f0364ca4 1362 }
mluis 0:45c4f0364ca4 1363 else
mluis 7:b988b60083a1 1364 {
mluis 0:45c4f0364ca4 1365 // Clear Irq
mluis 0:45c4f0364ca4 1366 Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_CADDONE );
mluis 0:45c4f0364ca4 1367 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->CadDone != NULL ) )
mluis 0:45c4f0364ca4 1368 {
Lorenzo Maiorfi 8:1002d3025eaa 1369 /*this->RadioEvents->CadDone( false );*/
Lorenzo Maiorfi 8:1002d3025eaa 1370 enqueueRadioEvent_CadDone(false);
mluis 0:45c4f0364ca4 1371 }
mluis 0:45c4f0364ca4 1372 }
mluis 0:45c4f0364ca4 1373 break;
mluis 0:45c4f0364ca4 1374 default:
mluis 0:45c4f0364ca4 1375 break;
mluis 0:45c4f0364ca4 1376 }
mluis 0:45c4f0364ca4 1377 }
mluis 0:45c4f0364ca4 1378
mluis 0:45c4f0364ca4 1379 void SX1272::OnDio4Irq( void )
mluis 0:45c4f0364ca4 1380 {
mluis 0:45c4f0364ca4 1381 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1382 {
mluis 0:45c4f0364ca4 1383 case MODEM_FSK:
mluis 0:45c4f0364ca4 1384 {
mluis 0:45c4f0364ca4 1385 if( this->settings.FskPacketHandler.PreambleDetected == false )
mluis 0:45c4f0364ca4 1386 {
mluis 0:45c4f0364ca4 1387 this->settings.FskPacketHandler.PreambleDetected = true;
mluis 7:b988b60083a1 1388 }
mluis 0:45c4f0364ca4 1389 }
mluis 0:45c4f0364ca4 1390 break;
mluis 0:45c4f0364ca4 1391 case MODEM_LORA:
mluis 0:45c4f0364ca4 1392 break;
mluis 0:45c4f0364ca4 1393 default:
mluis 0:45c4f0364ca4 1394 break;
mluis 0:45c4f0364ca4 1395 }
mluis 0:45c4f0364ca4 1396 }
mluis 0:45c4f0364ca4 1397
mluis 0:45c4f0364ca4 1398 void SX1272::OnDio5Irq( void )
mluis 0:45c4f0364ca4 1399 {
mluis 0:45c4f0364ca4 1400 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1401 {
mluis 0:45c4f0364ca4 1402 case MODEM_FSK:
mluis 0:45c4f0364ca4 1403 break;
mluis 0:45c4f0364ca4 1404 case MODEM_LORA:
mluis 0:45c4f0364ca4 1405 break;
mluis 0:45c4f0364ca4 1406 default:
mluis 0:45c4f0364ca4 1407 break;
mluis 0:45c4f0364ca4 1408 }
mluis 0:45c4f0364ca4 1409 }
Lorenzo Maiorfi 8:1002d3025eaa 1410
Lorenzo Maiorfi 8:1002d3025eaa 1411 // Inizio nuova parte per RTOS
Lorenzo Maiorfi 8:1002d3025eaa 1412
Lorenzo Maiorfi 8:1002d3025eaa 1413 void SX1272::enqueueOnTimeoutIrq()
Lorenzo Maiorfi 8:1002d3025eaa 1414 {
Lorenzo Maiorfi 10:bd29cdff8f3e 1415 _eq_events->call(this, &SX1272::OnTimeoutIrq);
Lorenzo Maiorfi 8:1002d3025eaa 1416 }
Lorenzo Maiorfi 8:1002d3025eaa 1417
Lorenzo Maiorfi 8:1002d3025eaa 1418 void SX1272::radioEvent_RxTimeout()
Lorenzo Maiorfi 8:1002d3025eaa 1419 {
Lorenzo Maiorfi 8:1002d3025eaa 1420 this->RadioEvents->RxTimeout( );
Lorenzo Maiorfi 8:1002d3025eaa 1421 }
Lorenzo Maiorfi 8:1002d3025eaa 1422
Lorenzo Maiorfi 8:1002d3025eaa 1423 void SX1272::enqueueRadioEvent_RxTimeout()
Lorenzo Maiorfi 8:1002d3025eaa 1424 {
Lorenzo Maiorfi 10:bd29cdff8f3e 1425 _eq_events->call(this, &SX1272::radioEvent_RxTimeout);
Lorenzo Maiorfi 8:1002d3025eaa 1426 }
Lorenzo Maiorfi 8:1002d3025eaa 1427
Lorenzo Maiorfi 8:1002d3025eaa 1428 void SX1272::radioEvent_TxTimeout()
Lorenzo Maiorfi 8:1002d3025eaa 1429 {
Lorenzo Maiorfi 8:1002d3025eaa 1430 this->RadioEvents->TxTimeout( );
Lorenzo Maiorfi 8:1002d3025eaa 1431 }
Lorenzo Maiorfi 8:1002d3025eaa 1432
Lorenzo Maiorfi 8:1002d3025eaa 1433 void SX1272::enqueueRadioEvent_TxTimeout()
Lorenzo Maiorfi 8:1002d3025eaa 1434 {
Lorenzo Maiorfi 10:bd29cdff8f3e 1435 _eq_events->call(this, &SX1272::radioEvent_TxTimeout);
Lorenzo Maiorfi 8:1002d3025eaa 1436 }
Lorenzo Maiorfi 8:1002d3025eaa 1437
Lorenzo Maiorfi 8:1002d3025eaa 1438 void SX1272::radioEvent_RxError()
Lorenzo Maiorfi 8:1002d3025eaa 1439 {
Lorenzo Maiorfi 8:1002d3025eaa 1440 this->RadioEvents->RxError( );
Lorenzo Maiorfi 8:1002d3025eaa 1441 }
Lorenzo Maiorfi 8:1002d3025eaa 1442
Lorenzo Maiorfi 8:1002d3025eaa 1443 void SX1272::enqueueRadioEvent_RxError()
Lorenzo Maiorfi 8:1002d3025eaa 1444 {
Lorenzo Maiorfi 10:bd29cdff8f3e 1445 _eq_events->call(this, &SX1272::radioEvent_RxError);
Lorenzo Maiorfi 8:1002d3025eaa 1446 }
Lorenzo Maiorfi 8:1002d3025eaa 1447
Lorenzo Maiorfi 8:1002d3025eaa 1448 void SX1272::radioEvent_RxDone(uint8_t *payload, uint16_t size, int16_t rssi, int8_t snr)
Lorenzo Maiorfi 8:1002d3025eaa 1449 {
Lorenzo Maiorfi 8:1002d3025eaa 1450 this->RadioEvents->RxDone(payload, size, rssi, snr);
Lorenzo Maiorfi 8:1002d3025eaa 1451 }
Lorenzo Maiorfi 8:1002d3025eaa 1452
Lorenzo Maiorfi 8:1002d3025eaa 1453 void SX1272::enqueueRadioEvent_RxDone(uint8_t *payload, uint16_t size, int16_t rssi, int8_t snr)
Lorenzo Maiorfi 8:1002d3025eaa 1454 {
Lorenzo Maiorfi 10:bd29cdff8f3e 1455 _eq_events->call(this, &SX1272::radioEvent_RxDone, payload, size, rssi, snr);
Lorenzo Maiorfi 8:1002d3025eaa 1456 }
Lorenzo Maiorfi 8:1002d3025eaa 1457
Lorenzo Maiorfi 8:1002d3025eaa 1458 void SX1272::radioEvent_TxDone()
Lorenzo Maiorfi 8:1002d3025eaa 1459 {
Lorenzo Maiorfi 8:1002d3025eaa 1460 this->RadioEvents->TxDone();
Lorenzo Maiorfi 8:1002d3025eaa 1461 }
Lorenzo Maiorfi 8:1002d3025eaa 1462
Lorenzo Maiorfi 8:1002d3025eaa 1463 void SX1272::enqueueRadioEvent_TxDone()
Lorenzo Maiorfi 8:1002d3025eaa 1464 {
Lorenzo Maiorfi 10:bd29cdff8f3e 1465 _eq_events->call(this, &SX1272::radioEvent_TxDone);
Lorenzo Maiorfi 8:1002d3025eaa 1466 }
Lorenzo Maiorfi 8:1002d3025eaa 1467
Lorenzo Maiorfi 8:1002d3025eaa 1468 void SX1272::radioEvent_FhssChangeChannel(uint8_t currentChannel)
Lorenzo Maiorfi 8:1002d3025eaa 1469 {
Lorenzo Maiorfi 8:1002d3025eaa 1470 this->RadioEvents->FhssChangeChannel(currentChannel);
Lorenzo Maiorfi 8:1002d3025eaa 1471 }
Lorenzo Maiorfi 8:1002d3025eaa 1472
Lorenzo Maiorfi 8:1002d3025eaa 1473 void SX1272::enqueueRadioEvent_FhssChangeChannel(uint8_t currentChannel)
Lorenzo Maiorfi 8:1002d3025eaa 1474 {
Lorenzo Maiorfi 10:bd29cdff8f3e 1475 _eq_events->call(this, &SX1272::radioEvent_FhssChangeChannel, currentChannel);
Lorenzo Maiorfi 8:1002d3025eaa 1476 }
Lorenzo Maiorfi 8:1002d3025eaa 1477
Lorenzo Maiorfi 8:1002d3025eaa 1478 void SX1272::radioEvent_CadDone(bool channelActivityDetected)
Lorenzo Maiorfi 8:1002d3025eaa 1479 {
Lorenzo Maiorfi 8:1002d3025eaa 1480 this->RadioEvents->CadDone(channelActivityDetected);
Lorenzo Maiorfi 8:1002d3025eaa 1481 }
Lorenzo Maiorfi 8:1002d3025eaa 1482
Lorenzo Maiorfi 8:1002d3025eaa 1483 void SX1272::enqueueRadioEvent_CadDone(bool channelActivityDetected)
Lorenzo Maiorfi 8:1002d3025eaa 1484 {
Lorenzo Maiorfi 10:bd29cdff8f3e 1485 _eq_events->call(this, &SX1272::radioEvent_CadDone, channelActivityDetected);
Lorenzo Maiorfi 8:1002d3025eaa 1486 }
Lorenzo Maiorfi 8:1002d3025eaa 1487
Lorenzo Maiorfi 8:1002d3025eaa 1488 void SX1272::enqueueOnDio0Irq()
Lorenzo Maiorfi 8:1002d3025eaa 1489 {
Lorenzo Maiorfi 10:bd29cdff8f3e 1490 _eq_events->call(this, &SX1272::OnDio0Irq);
Lorenzo Maiorfi 8:1002d3025eaa 1491 }
Lorenzo Maiorfi 8:1002d3025eaa 1492
Lorenzo Maiorfi 8:1002d3025eaa 1493 void SX1272::enqueueOnDio1Irq()
Lorenzo Maiorfi 8:1002d3025eaa 1494 {
Lorenzo Maiorfi 10:bd29cdff8f3e 1495 _eq_events->call(this, &SX1272::OnDio1Irq);
Lorenzo Maiorfi 8:1002d3025eaa 1496 }
Lorenzo Maiorfi 8:1002d3025eaa 1497
Lorenzo Maiorfi 8:1002d3025eaa 1498 void SX1272::enqueueOnDio2Irq()
Lorenzo Maiorfi 8:1002d3025eaa 1499 {
Lorenzo Maiorfi 10:bd29cdff8f3e 1500 _eq_events->call(this, &SX1272::OnDio2Irq);
Lorenzo Maiorfi 8:1002d3025eaa 1501 }
Lorenzo Maiorfi 8:1002d3025eaa 1502
Lorenzo Maiorfi 8:1002d3025eaa 1503 void SX1272::enqueueOnDio3Irq()
Lorenzo Maiorfi 8:1002d3025eaa 1504 {
Lorenzo Maiorfi 10:bd29cdff8f3e 1505 _eq_events->call(this, &SX1272::OnDio3Irq);
Lorenzo Maiorfi 8:1002d3025eaa 1506 }
Lorenzo Maiorfi 8:1002d3025eaa 1507
Lorenzo Maiorfi 8:1002d3025eaa 1508 void SX1272::enqueueOnDio4Irq()
Lorenzo Maiorfi 8:1002d3025eaa 1509 {
Lorenzo Maiorfi 10:bd29cdff8f3e 1510 _eq_events->call(this, &SX1272::OnDio4Irq);
Lorenzo Maiorfi 8:1002d3025eaa 1511 }
Lorenzo Maiorfi 8:1002d3025eaa 1512
Lorenzo Maiorfi 8:1002d3025eaa 1513 void SX1272::enqueueOnDio5Irq()
Lorenzo Maiorfi 8:1002d3025eaa 1514 {
Lorenzo Maiorfi 8:1002d3025eaa 1515 /* NULL */
Lorenzo Maiorfi 8:1002d3025eaa 1516 }
Lorenzo Maiorfi 8:1002d3025eaa 1517
Lorenzo Maiorfi 8:1002d3025eaa 1518 // Fine nuova parte per RTOS