Oskar Weigl / Kalman

Kalman filter for Eurobot

RFSRF05/RF_defs.h@0:a0285293f6a6, 2012-03-20 (annotated)

Committer:
madcowswe
Date:
Tue Mar 20 12:43:16 2012 +0000
Revision:
0:a0285293f6a6
Algo done, vars not done

Who changed what in which revision?

UserRevisionLine numberNew contents of line
madcowswe 0:a0285293f6a6 1 /*
madcowswe 0:a0285293f6a6 2 * Open HR20
madcowswe 0:a0285293f6a6 3 *
madcowswe 0:a0285293f6a6 4 * target: ATmega169 @ 4 MHz in Honnywell Rondostat HR20E
madcowswe 0:a0285293f6a6 5 *
madcowswe 0:a0285293f6a6 6 * compiler: WinAVR-20071221
madcowswe 0:a0285293f6a6 7 * avr-libc 1.6.0
madcowswe 0:a0285293f6a6 8 * GCC 4.2.2
madcowswe 0:a0285293f6a6 9 *
madcowswe 0:a0285293f6a6 10 * copyright: 2008 Dario Carluccio (hr20-at-carluccio-dot-de)
madcowswe 0:a0285293f6a6 11 * 2008 Jiri Dobry (jdobry-at-centrum-dot-cz)
madcowswe 0:a0285293f6a6 12 * 2008 Mario Fischer (MarioFischer-at-gmx-dot-net)
madcowswe 0:a0285293f6a6 13 * 2007 Michael Smola (Michael-dot-Smola-at-gmx-dot-net)
madcowswe 0:a0285293f6a6 14 *
madcowswe 0:a0285293f6a6 15 * license: This program is free software; you can redistribute it and/or
madcowswe 0:a0285293f6a6 16 * modify it under the terms of the GNU Library General Public
madcowswe 0:a0285293f6a6 17 * License as published by the Free Software Foundation; either
madcowswe 0:a0285293f6a6 18 * version 2 of the License, or (at your option) any later version.
madcowswe 0:a0285293f6a6 19 *
madcowswe 0:a0285293f6a6 20 * This program is distributed in the hope that it will be useful,
madcowswe 0:a0285293f6a6 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
madcowswe 0:a0285293f6a6 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
madcowswe 0:a0285293f6a6 23 * GNU General Public License for more details.
madcowswe 0:a0285293f6a6 24 *
madcowswe 0:a0285293f6a6 25 * You should have received a copy of the GNU General Public License
madcowswe 0:a0285293f6a6 26 * along with this program. If not, see http:*www.gnu.org/licenses
madcowswe 0:a0285293f6a6 27 */
madcowswe 0:a0285293f6a6 28
madcowswe 0:a0285293f6a6 29 /*
madcowswe 0:a0285293f6a6 30 * \file rfm.h
madcowswe 0:a0285293f6a6 31 * \brief functions to control the RFM12 Radio Transceiver Module
madcowswe 0:a0285293f6a6 32 * \author Mario Fischer <MarioFischer-at-gmx-dot-net>; Michael Smola <Michael-dot-Smola-at-gmx-dot-net>
madcowswe 0:a0285293f6a6 33 * \date $Date: 2010/04/17 17:57:02 $
madcowswe 0:a0285293f6a6 34 * $Rev: 260 $
madcowswe 0:a0285293f6a6 35 */
madcowswe 0:a0285293f6a6 36
madcowswe 0:a0285293f6a6 37
madcowswe 0:a0285293f6a6 38 //#pragma once // multi-iclude prevention. gcc knows this pragma
madcowswe 0:a0285293f6a6 39 #ifndef rfm_H
madcowswe 0:a0285293f6a6 40 #define rfm_H
madcowswe 0:a0285293f6a6 41
madcowswe 0:a0285293f6a6 42
madcowswe 0:a0285293f6a6 43 #define RFM_SPI_16(OUTVAL) rfm_spi16(OUTVAL) //<! a function that gets a uint16_t (clocked out value) and returns a uint16_t (clocked in value)
madcowswe 0:a0285293f6a6 44
madcowswe 0:a0285293f6a6 45 #define RFM_CLK_OUTPUT 0
madcowswe 0:a0285293f6a6 46
madcowswe 0:a0285293f6a6 47 /*
madcowswe 0:a0285293f6a6 48 #define RFM_TESTPIN_INIT
madcowswe 0:a0285293f6a6 49 #define RFM_TESTPIN_ON
madcowswe 0:a0285293f6a6 50 #define RFM_TESTPIN_OFF
madcowswe 0:a0285293f6a6 51 #define RFM_TESTPIN_TOG
madcowswe 0:a0285293f6a6 52
madcowswe 0:a0285293f6a6 53 #define RFM_CONFIG_DISABLE 0x00 //<! RFM_CONFIG_*** are combinable flags, what the RFM shold do
madcowswe 0:a0285293f6a6 54 #define RFM_CONFIG_BROADCASTSTATUS 0x01 //<! Flag that enables the HR20's status broadcast every minute
madcowswe 0:a0285293f6a6 55
madcowswe 0:a0285293f6a6 56 #define RFM_CONFIG_ENABLEALL 0xff
madcowswe 0:a0285293f6a6 57 */
madcowswe 0:a0285293f6a6 58
madcowswe 0:a0285293f6a6 59
madcowswe 0:a0285293f6a6 60 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 61 //
madcowswe 0:a0285293f6a6 62 // RFM status bits
madcowswe 0:a0285293f6a6 63 //
madcowswe 0:a0285293f6a6 64 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 65
madcowswe 0:a0285293f6a6 66 // Interrupt bits, latched ////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 67
madcowswe 0:a0285293f6a6 68 #define RFM_STATUS_FFIT 0x8000 // RX FIFO reached the progr. number of bits
madcowswe 0:a0285293f6a6 69 // Cleared by any FIFO read method
madcowswe 0:a0285293f6a6 70
madcowswe 0:a0285293f6a6 71 #define RFM_STATUS_RGIT 0x8000 // TX register is ready to receive
madcowswe 0:a0285293f6a6 72 // Cleared by TX write
madcowswe 0:a0285293f6a6 73
madcowswe 0:a0285293f6a6 74 #define RFM_STATUS_POR 0x4000 // Power On reset
madcowswe 0:a0285293f6a6 75 // Cleared by read status
madcowswe 0:a0285293f6a6 76
madcowswe 0:a0285293f6a6 77 #define RFM_STATUS_RGUR 0x2000 // TX register underrun, register over write
madcowswe 0:a0285293f6a6 78 // Cleared by read status
madcowswe 0:a0285293f6a6 79
madcowswe 0:a0285293f6a6 80 #define RFM_STATUS_FFOV 0x2000 // RX FIFO overflow
madcowswe 0:a0285293f6a6 81 // Cleared by read status
madcowswe 0:a0285293f6a6 82
madcowswe 0:a0285293f6a6 83 #define RFM_STATUS_WKUP 0x1000 // Wake up timer overflow
madcowswe 0:a0285293f6a6 84 // Cleared by read status
madcowswe 0:a0285293f6a6 85
madcowswe 0:a0285293f6a6 86 #define RFM_STATUS_EXT 0x0800 // Interupt changed to low
madcowswe 0:a0285293f6a6 87 // Cleared by read status
madcowswe 0:a0285293f6a6 88
madcowswe 0:a0285293f6a6 89 #define RFM_STATUS_LBD 0x0400 // Low battery detect
madcowswe 0:a0285293f6a6 90
madcowswe 0:a0285293f6a6 91 // Status bits ////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 92
madcowswe 0:a0285293f6a6 93 #define RFM_STATUS_FFEM 0x0200 // FIFO is empty
madcowswe 0:a0285293f6a6 94 #define RFM_STATUS_ATS 0x0100 // TX mode: Strong enough RF signal
madcowswe 0:a0285293f6a6 95 #define RFM_STATUS_RSSI 0x0100 // RX mode: signal strength above programmed limit
madcowswe 0:a0285293f6a6 96 #define RFM_STATUS_DQD 0x0080 // Data Quality detector output
madcowswe 0:a0285293f6a6 97 #define RFM_STATUS_CRL 0x0040 // Clock recovery lock
madcowswe 0:a0285293f6a6 98 #define RFM_STATUS_ATGL 0x0020 // Toggling in each AFC cycle
madcowswe 0:a0285293f6a6 99
madcowswe 0:a0285293f6a6 100 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 101 //
madcowswe 0:a0285293f6a6 102 // 1. Configuration Setting Command
madcowswe 0:a0285293f6a6 103 //
madcowswe 0:a0285293f6a6 104 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 105
madcowswe 0:a0285293f6a6 106 #define RFM_CONFIG 0x8000
madcowswe 0:a0285293f6a6 107
madcowswe 0:a0285293f6a6 108 #define RFM_CONFIG_EL 0x8080 // Enable TX Register
madcowswe 0:a0285293f6a6 109 #define RFM_CONFIG_EF 0x8040 // Enable RX FIFO buffer
madcowswe 0:a0285293f6a6 110 #define RFM_CONFIG_BAND_315 0x8000 // Frequency band
madcowswe 0:a0285293f6a6 111 #define RFM_CONFIG_BAND_433 0x8010
madcowswe 0:a0285293f6a6 112 #define RFM_CONFIG_BAND_868 0x8020
madcowswe 0:a0285293f6a6 113 #define RFM_CONFIG_BAND_915 0x8030
madcowswe 0:a0285293f6a6 114 #define RFM_CONFIG_X_8_5pf 0x8000 // Crystal Load Capacitor
madcowswe 0:a0285293f6a6 115 #define RFM_CONFIG_X_9_0pf 0x8001
madcowswe 0:a0285293f6a6 116 #define RFM_CONFIG_X_9_5pf 0x8002
madcowswe 0:a0285293f6a6 117 #define RFM_CONFIG_X_10_0pf 0x8003
madcowswe 0:a0285293f6a6 118 #define RFM_CONFIG_X_10_5pf 0x8004
madcowswe 0:a0285293f6a6 119 #define RFM_CONFIG_X_11_0pf 0x8005
madcowswe 0:a0285293f6a6 120 #define RFM_CONFIG_X_11_5pf 0x8006
madcowswe 0:a0285293f6a6 121 #define RFM_CONFIG_X_12_0pf 0x8007
madcowswe 0:a0285293f6a6 122 #define RFM_CONFIG_X_12_5pf 0x8008
madcowswe 0:a0285293f6a6 123 #define RFM_CONFIG_X_13_0pf 0x8009
madcowswe 0:a0285293f6a6 124 #define RFM_CONFIG_X_13_5pf 0x800A
madcowswe 0:a0285293f6a6 125 #define RFM_CONFIG_X_14_0pf 0x800B
madcowswe 0:a0285293f6a6 126 #define RFM_CONFIG_X_14_5pf 0x800C
madcowswe 0:a0285293f6a6 127 #define RFM_CONFIG_X_15_0pf 0x800D
madcowswe 0:a0285293f6a6 128 #define RFM_CONFIG_X_15_5pf 0x800E
madcowswe 0:a0285293f6a6 129 #define RFM_CONFIG_X_16_0pf 0x800F
madcowswe 0:a0285293f6a6 130
madcowswe 0:a0285293f6a6 131 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 132 //
madcowswe 0:a0285293f6a6 133 // 2. Power Management Command
madcowswe 0:a0285293f6a6 134 //
madcowswe 0:a0285293f6a6 135 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 136
madcowswe 0:a0285293f6a6 137 #define RFM_POWER_MANAGEMENT 0x8200
madcowswe 0:a0285293f6a6 138
madcowswe 0:a0285293f6a6 139 #define RFM_POWER_MANAGEMENT_ER 0x8280 // Enable receiver
madcowswe 0:a0285293f6a6 140 #define RFM_POWER_MANAGEMENT_EBB 0x8240 // Enable base band block
madcowswe 0:a0285293f6a6 141 #define RFM_POWER_MANAGEMENT_ET 0x8220 // Enable transmitter
madcowswe 0:a0285293f6a6 142 #define RFM_POWER_MANAGEMENT_ES 0x8210 // Enable synthesizer
madcowswe 0:a0285293f6a6 143 #define RFM_POWER_MANAGEMENT_EX 0x8208 // Enable crystal oscillator
madcowswe 0:a0285293f6a6 144 #define RFM_POWER_MANAGEMENT_EB 0x8204 // Enable low battery detector
madcowswe 0:a0285293f6a6 145 #define RFM_POWER_MANAGEMENT_EW 0x8202 // Enable wake-up timer
madcowswe 0:a0285293f6a6 146 #define RFM_POWER_MANAGEMENT_DC 0x8201 // Disable clock output of CLK pin
madcowswe 0:a0285293f6a6 147
madcowswe 0:a0285293f6a6 148 #ifndef RFM_CLK_OUTPUT
madcowswe 0:a0285293f6a6 149 #error RFM_CLK_OUTPUT must be defined to 0 or 1
madcowswe 0:a0285293f6a6 150 #endif
madcowswe 0:a0285293f6a6 151 #if RFM_CLK_OUTPUT
madcowswe 0:a0285293f6a6 152 #define RFM_TX_ON_PRE() RFM_SPI_16( \
madcowswe 0:a0285293f6a6 153 RFM_POWER_MANAGEMENT_ES | \
madcowswe 0:a0285293f6a6 154 RFM_POWER_MANAGEMENT_EX )
madcowswe 0:a0285293f6a6 155 #define RFM_TX_ON() RFM_SPI_16( \
madcowswe 0:a0285293f6a6 156 RFM_POWER_MANAGEMENT_ET | \
madcowswe 0:a0285293f6a6 157 RFM_POWER_MANAGEMENT_ES | \
madcowswe 0:a0285293f6a6 158 RFM_POWER_MANAGEMENT_EX )
madcowswe 0:a0285293f6a6 159 #define RFM_RX_ON() RFM_SPI_16( \
madcowswe 0:a0285293f6a6 160 RFM_POWER_MANAGEMENT_ER | \
madcowswe 0:a0285293f6a6 161 RFM_POWER_MANAGEMENT_EBB | \
madcowswe 0:a0285293f6a6 162 RFM_POWER_MANAGEMENT_ES | \
madcowswe 0:a0285293f6a6 163 RFM_POWER_MANAGEMENT_EX )
madcowswe 0:a0285293f6a6 164 #define RFM_OFF() RFM_SPI_16( \
madcowswe 0:a0285293f6a6 165 RFM_POWER_MANAGEMENT_EX )
madcowswe 0:a0285293f6a6 166 #else
madcowswe 0:a0285293f6a6 167 #define RFM_TX_ON_PRE() RFM_SPI_16( \
madcowswe 0:a0285293f6a6 168 RFM_POWER_MANAGEMENT_DC | \
madcowswe 0:a0285293f6a6 169 RFM_POWER_MANAGEMENT_ES | \
madcowswe 0:a0285293f6a6 170 RFM_POWER_MANAGEMENT_EX )
madcowswe 0:a0285293f6a6 171 #define RFM_TX_ON() RFM_SPI_16( \
madcowswe 0:a0285293f6a6 172 RFM_POWER_MANAGEMENT_DC | \
madcowswe 0:a0285293f6a6 173 RFM_POWER_MANAGEMENT_ET | \
madcowswe 0:a0285293f6a6 174 RFM_POWER_MANAGEMENT_ES | \
madcowswe 0:a0285293f6a6 175 RFM_POWER_MANAGEMENT_EX )
madcowswe 0:a0285293f6a6 176 #define RFM_RX_ON() RFM_SPI_16( \
madcowswe 0:a0285293f6a6 177 RFM_POWER_MANAGEMENT_DC | \
madcowswe 0:a0285293f6a6 178 RFM_POWER_MANAGEMENT_ER | \
madcowswe 0:a0285293f6a6 179 RFM_POWER_MANAGEMENT_EBB | \
madcowswe 0:a0285293f6a6 180 RFM_POWER_MANAGEMENT_ES | \
madcowswe 0:a0285293f6a6 181 RFM_POWER_MANAGEMENT_EX )
madcowswe 0:a0285293f6a6 182 #define RFM_OFF() RFM_SPI_16(RFM_POWER_MANAGEMENT_DC)
madcowswe 0:a0285293f6a6 183 #endif
madcowswe 0:a0285293f6a6 184 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 185 //
madcowswe 0:a0285293f6a6 186 // 3. Frequency Setting Command
madcowswe 0:a0285293f6a6 187 //
madcowswe 0:a0285293f6a6 188 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 189
madcowswe 0:a0285293f6a6 190 #define RFM_FREQUENCY 0xA000
madcowswe 0:a0285293f6a6 191
madcowswe 0:a0285293f6a6 192 #define RFM_FREQ_315Band(v) (uint16_t)((v/10.0-31)*4000)
madcowswe 0:a0285293f6a6 193 #define RFM_FREQ_433Band(v) (uint16_t)((v/10.0-43)*4000)
madcowswe 0:a0285293f6a6 194 #define RFM_FREQ_868Band(v) (uint16_t)((v/20.0-43)*4000)
madcowswe 0:a0285293f6a6 195 #define RFM_FREQ_915Band(v) (uint16_t)((v/30.0-30)*4000)
madcowswe 0:a0285293f6a6 196
madcowswe 0:a0285293f6a6 197 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 198 //
madcowswe 0:a0285293f6a6 199 // 4. Data Rate Command
madcowswe 0:a0285293f6a6 200 //
madcowswe 0:a0285293f6a6 201 /////////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 202
madcowswe 0:a0285293f6a6 203 #define RFM_BAUD_RATE 9600
madcowswe 0:a0285293f6a6 204
madcowswe 0:a0285293f6a6 205 #define RFM_DATA_RATE 0xC600
madcowswe 0:a0285293f6a6 206
madcowswe 0:a0285293f6a6 207 #define RFM_DATA_RATE_CS 0xC680
madcowswe 0:a0285293f6a6 208 #define RFM_DATA_RATE_4800 0xC647
madcowswe 0:a0285293f6a6 209 #define RFM_DATA_RATE_9600 0xC623
madcowswe 0:a0285293f6a6 210 #define RFM_DATA_RATE_19200 0xC611
madcowswe 0:a0285293f6a6 211 #define RFM_DATA_RATE_38400 0xC608
madcowswe 0:a0285293f6a6 212 #define RFM_DATA_RATE_57600 0xC605
madcowswe 0:a0285293f6a6 213
madcowswe 0:a0285293f6a6 214 #define RFM_SET_DATARATE(baud) ( ((baud)<5400) ? (RFM_DATA_RATE_CS|((43104/(baud))-1)) : (RFM_DATA_RATE|((344828UL/(baud))-1)) )
madcowswe 0:a0285293f6a6 215
madcowswe 0:a0285293f6a6 216 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 217 //
madcowswe 0:a0285293f6a6 218 // 5. Receiver Control Command
madcowswe 0:a0285293f6a6 219 //
madcowswe 0:a0285293f6a6 220 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 221
madcowswe 0:a0285293f6a6 222 #define RFM_RX_CONTROL 0x9000
madcowswe 0:a0285293f6a6 223
madcowswe 0:a0285293f6a6 224 #define RFM_RX_CONTROL_P20_INT 0x9000 // Pin20 = ExternalInt
madcowswe 0:a0285293f6a6 225 #define RFM_RX_CONTROL_P20_VDI 0x9400 // Pin20 = VDI out
madcowswe 0:a0285293f6a6 226
madcowswe 0:a0285293f6a6 227 #define RFM_RX_CONTROL_VDI_FAST 0x9000 // fast VDI Response time
madcowswe 0:a0285293f6a6 228 #define RFM_RX_CONTROL_VDI_MED 0x9100 // medium
madcowswe 0:a0285293f6a6 229 #define RFM_RX_CONTROL_VDI_SLOW 0x9200 // slow
madcowswe 0:a0285293f6a6 230 #define RFM_RX_CONTROL_VDI_ON 0x9300 // Always on
madcowswe 0:a0285293f6a6 231
madcowswe 0:a0285293f6a6 232 #define RFM_RX_CONTROL_BW_400 0x9020 // bandwidth 400kHz
madcowswe 0:a0285293f6a6 233 #define RFM_RX_CONTROL_BW_340 0x9040 // bandwidth 340kHz
madcowswe 0:a0285293f6a6 234 #define RFM_RX_CONTROL_BW_270 0x9060 // bandwidth 270kHz
madcowswe 0:a0285293f6a6 235 #define RFM_RX_CONTROL_BW_200 0x9080 // bandwidth 200kHz
madcowswe 0:a0285293f6a6 236 #define RFM_RX_CONTROL_BW_134 0x90A0 // bandwidth 134kHz
madcowswe 0:a0285293f6a6 237 #define RFM_RX_CONTROL_BW_67 0x90C0 // bandwidth 67kHz
madcowswe 0:a0285293f6a6 238
madcowswe 0:a0285293f6a6 239 #define RFM_RX_CONTROL_GAIN_0 0x9000 // LNA gain 0db
madcowswe 0:a0285293f6a6 240 #define RFM_RX_CONTROL_GAIN_6 0x9008 // LNA gain -6db
madcowswe 0:a0285293f6a6 241 #define RFM_RX_CONTROL_GAIN_14 0x9010 // LNA gain -14db
madcowswe 0:a0285293f6a6 242 #define RFM_RX_CONTROL_GAIN_20 0x9018 // LNA gain -20db
madcowswe 0:a0285293f6a6 243
madcowswe 0:a0285293f6a6 244 #define RFM_RX_CONTROL_RSSI_103 0x9000 // DRSSI threshold -103dbm
madcowswe 0:a0285293f6a6 245 #define RFM_RX_CONTROL_RSSI_97 0x9001 // DRSSI threshold -97dbm
madcowswe 0:a0285293f6a6 246 #define RFM_RX_CONTROL_RSSI_91 0x9002 // DRSSI threshold -91dbm
madcowswe 0:a0285293f6a6 247 #define RFM_RX_CONTROL_RSSI_85 0x9003 // DRSSI threshold -85dbm
madcowswe 0:a0285293f6a6 248 #define RFM_RX_CONTROL_RSSI_79 0x9004 // DRSSI threshold -79dbm
madcowswe 0:a0285293f6a6 249 #define RFM_RX_CONTROL_RSSI_73 0x9005 // DRSSI threshold -73dbm
madcowswe 0:a0285293f6a6 250 //#define RFM_RX_CONTROL_RSSI_67 0x9006 // DRSSI threshold -67dbm // RF12B reserved
madcowswe 0:a0285293f6a6 251 //#define RFM_RX_CONTROL_RSSI_61 0x9007 // DRSSI threshold -61dbm // RF12B reserved
madcowswe 0:a0285293f6a6 252
madcowswe 0:a0285293f6a6 253 #define RFM_RX_CONTROL_BW(baud) (((baud)<8000) ? \
madcowswe 0:a0285293f6a6 254 RFM_RX_CONTROL_BW_67 : \
madcowswe 0:a0285293f6a6 255 ( \
madcowswe 0:a0285293f6a6 256 ((baud)<30000) ? \
madcowswe 0:a0285293f6a6 257 RFM_RX_CONTROL_BW_134 : \
madcowswe 0:a0285293f6a6 258 RFM_RX_CONTROL_BW_200 \
madcowswe 0:a0285293f6a6 259 ))
madcowswe 0:a0285293f6a6 260
madcowswe 0:a0285293f6a6 261 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 262 //
madcowswe 0:a0285293f6a6 263 // 6. Data Filter Command
madcowswe 0:a0285293f6a6 264 //
madcowswe 0:a0285293f6a6 265 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 266
madcowswe 0:a0285293f6a6 267 #define RFM_DATA_FILTER 0xC228
madcowswe 0:a0285293f6a6 268
madcowswe 0:a0285293f6a6 269 #define RFM_DATA_FILTER_AL 0xC2A8 // clock recovery auto-lock
madcowswe 0:a0285293f6a6 270 #define RFM_DATA_FILTER_ML 0xC268 // clock recovery fast mode
madcowswe 0:a0285293f6a6 271 #define RFM_DATA_FILTER_DIG 0xC228 // data filter type digital
madcowswe 0:a0285293f6a6 272 #define RFM_DATA_FILTER_ANALOG 0xC238 // data filter type analog
madcowswe 0:a0285293f6a6 273 #define RFM_DATA_FILTER_DQD(level) (RFM_DATA_FILTER | (level & 0x7))
madcowswe 0:a0285293f6a6 274
madcowswe 0:a0285293f6a6 275 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 276 //
madcowswe 0:a0285293f6a6 277 // 7. FIFO and Reset Mode Command
madcowswe 0:a0285293f6a6 278 //
madcowswe 0:a0285293f6a6 279 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 280
madcowswe 0:a0285293f6a6 281 #define RFM_FIFO 0xCA00
madcowswe 0:a0285293f6a6 282
madcowswe 0:a0285293f6a6 283 #define RFM_FIFO_AL 0xCA04 // FIFO Start condition sync-word/always
madcowswe 0:a0285293f6a6 284 #define RFM_FIFO_FF 0xCA02 // Enable FIFO fill
madcowswe 0:a0285293f6a6 285 #define RFM_FIFO_DR 0xCA01 // Disable hi sens reset mode
madcowswe 0:a0285293f6a6 286 #define RFM_FIFO_IT(level) (RFM_FIFO | (( (level) & 0xF)<<4))
madcowswe 0:a0285293f6a6 287
madcowswe 0:a0285293f6a6 288 #define RFM_FIFO_OFF() RFM_SPI_16(RFM_FIFO_IT(8) | RFM_FIFO_DR)
madcowswe 0:a0285293f6a6 289 #define RFM_FIFO_ON() RFM_SPI_16(RFM_FIFO_IT(8) | RFM_FIFO_FF | RFM_FIFO_DR)
madcowswe 0:a0285293f6a6 290
madcowswe 0:a0285293f6a6 291 /////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 292 //
madcowswe 0:a0285293f6a6 293 // 8. Receiver FIFO Read
madcowswe 0:a0285293f6a6 294 //
madcowswe 0:a0285293f6a6 295 /////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 296
madcowswe 0:a0285293f6a6 297 #define RFM_READ_FIFO() (RFM_SPI_16(0xB000) & 0xFF)
madcowswe 0:a0285293f6a6 298
madcowswe 0:a0285293f6a6 299 /////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 300 //
madcowswe 0:a0285293f6a6 301 // 9. AFC Command
madcowswe 0:a0285293f6a6 302 //
madcowswe 0:a0285293f6a6 303 /////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 304
madcowswe 0:a0285293f6a6 305 #define RFM_AFC 0xC400
madcowswe 0:a0285293f6a6 306
madcowswe 0:a0285293f6a6 307 #define RFM_AFC_EN 0xC401
madcowswe 0:a0285293f6a6 308 #define RFM_AFC_OE 0xC402
madcowswe 0:a0285293f6a6 309 #define RFM_AFC_FI 0xC404
madcowswe 0:a0285293f6a6 310 #define RFM_AFC_ST 0xC408
madcowswe 0:a0285293f6a6 311
madcowswe 0:a0285293f6a6 312 // Limits the value of the frequency offset register to the next values:
madcowswe 0:a0285293f6a6 313
madcowswe 0:a0285293f6a6 314 #define RFM_AFC_RANGE_LIMIT_NO 0xC400 // 0: No restriction
madcowswe 0:a0285293f6a6 315 #define RFM_AFC_RANGE_LIMIT_15_16 0xC410 // 1: +15 fres to -16 fres
madcowswe 0:a0285293f6a6 316 #define RFM_AFC_RANGE_LIMIT_7_8 0xC420 // 2: +7 fres to -8 fres
madcowswe 0:a0285293f6a6 317 #define RFM_AFC_RANGE_LIMIT_3_4 0xC430 // 3: +3 fres to -4 fres
madcowswe 0:a0285293f6a6 318
madcowswe 0:a0285293f6a6 319 // fres=2.5 kHz in 315MHz and 433MHz Bands
madcowswe 0:a0285293f6a6 320 // fres=5.0 kHz in 868MHz Band
madcowswe 0:a0285293f6a6 321 // fres=7.5 kHz in 915MHz Band
madcowswe 0:a0285293f6a6 322
madcowswe 0:a0285293f6a6 323 #define RFM_AFC_AUTO_OFF 0xC400 // 0: Auto mode off (Strobe is controlled by microcontroller)
madcowswe 0:a0285293f6a6 324 #define RFM_AFC_AUTO_ONCE 0xC440 // 1: Runs only once after each power-up
madcowswe 0:a0285293f6a6 325 #define RFM_AFC_AUTO_VDI 0xC480 // 2: Keep the foffset only during receiving(VDI=high)
madcowswe 0:a0285293f6a6 326 #define RFM_AFC_AUTO_INDEPENDENT 0xC4C0 // 3: Keep the foffset value independently trom the state of the VDI signal
madcowswe 0:a0285293f6a6 327
madcowswe 0:a0285293f6a6 328 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 329 //
madcowswe 0:a0285293f6a6 330 // 10. TX Configuration Control Command
madcowswe 0:a0285293f6a6 331 //
madcowswe 0:a0285293f6a6 332 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 333
madcowswe 0:a0285293f6a6 334 #define RFM_TX_CONTROL 0x9800
madcowswe 0:a0285293f6a6 335
madcowswe 0:a0285293f6a6 336 #define RFM_TX_CONTROL_POW_0 0x9800
madcowswe 0:a0285293f6a6 337 #define RFM_TX_CONTROL_POW_3 0x9801
madcowswe 0:a0285293f6a6 338 #define RFM_TX_CONTROL_POW_6 0x9802
madcowswe 0:a0285293f6a6 339 #define RFM_TX_CONTROL_POW_9 0x9803
madcowswe 0:a0285293f6a6 340 #define RFM_TX_CONTROL_POW_12 0x9804
madcowswe 0:a0285293f6a6 341 #define RFM_TX_CONTROL_POW_15 0x9805
madcowswe 0:a0285293f6a6 342 #define RFM_TX_CONTROL_POW_18 0x9806
madcowswe 0:a0285293f6a6 343 #define RFM_TX_CONTROL_POW_21 0x9807
madcowswe 0:a0285293f6a6 344 #define RFM_TX_CONTROL_MOD_15 0x9800
madcowswe 0:a0285293f6a6 345 #define RFM_TX_CONTROL_MOD_30 0x9810
madcowswe 0:a0285293f6a6 346 #define RFM_TX_CONTROL_MOD_45 0x9820
madcowswe 0:a0285293f6a6 347 #define RFM_TX_CONTROL_MOD_60 0x9830
madcowswe 0:a0285293f6a6 348 #define RFM_TX_CONTROL_MOD_75 0x9840
madcowswe 0:a0285293f6a6 349 #define RFM_TX_CONTROL_MOD_90 0x9850
madcowswe 0:a0285293f6a6 350 #define RFM_TX_CONTROL_MOD_105 0x9860
madcowswe 0:a0285293f6a6 351 #define RFM_TX_CONTROL_MOD_120 0x9870
madcowswe 0:a0285293f6a6 352 #define RFM_TX_CONTROL_MOD_135 0x9880
madcowswe 0:a0285293f6a6 353 #define RFM_TX_CONTROL_MOD_150 0x9890
madcowswe 0:a0285293f6a6 354 #define RFM_TX_CONTROL_MOD_165 0x98A0
madcowswe 0:a0285293f6a6 355 #define RFM_TX_CONTROL_MOD_180 0x98B0
madcowswe 0:a0285293f6a6 356 #define RFM_TX_CONTROL_MOD_195 0x98C0
madcowswe 0:a0285293f6a6 357 #define RFM_TX_CONTROL_MOD_210 0x98D0
madcowswe 0:a0285293f6a6 358 #define RFM_TX_CONTROL_MOD_225 0x98E0
madcowswe 0:a0285293f6a6 359 #define RFM_TX_CONTROL_MOD_240 0x98F0
madcowswe 0:a0285293f6a6 360 #define RFM_TX_CONTROL_MP 0x9900
madcowswe 0:a0285293f6a6 361
madcowswe 0:a0285293f6a6 362 #define RFM_TX_CONTROL_MOD(baud) (((baud)<8000) ? \
madcowswe 0:a0285293f6a6 363 RFM_TX_CONTROL_MOD_45 : \
madcowswe 0:a0285293f6a6 364 ( \
madcowswe 0:a0285293f6a6 365 ((baud)<20000) ? \
madcowswe 0:a0285293f6a6 366 RFM_TX_CONTROL_MOD_60 : \
madcowswe 0:a0285293f6a6 367 ( \
madcowswe 0:a0285293f6a6 368 ((baud)<30000) ? \
madcowswe 0:a0285293f6a6 369 RFM_TX_CONTROL_MOD_75 : \
madcowswe 0:a0285293f6a6 370 ( \
madcowswe 0:a0285293f6a6 371 ((baud)<40000) ? \
madcowswe 0:a0285293f6a6 372 RFM_TX_CONTROL_MOD_90 : \
madcowswe 0:a0285293f6a6 373 RFM_TX_CONTROL_MOD_120 \
madcowswe 0:a0285293f6a6 374 ) \
madcowswe 0:a0285293f6a6 375 ) \
madcowswe 0:a0285293f6a6 376 ))
madcowswe 0:a0285293f6a6 377
madcowswe 0:a0285293f6a6 378 /////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 379 //
madcowswe 0:a0285293f6a6 380 // 11. Transmitter Register Write Command
madcowswe 0:a0285293f6a6 381 //
madcowswe 0:a0285293f6a6 382 /////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 383
madcowswe 0:a0285293f6a6 384 //#define RFM_WRITE(byte) RFM_SPI_16(0xB800 | ((byte) & 0xFF))
madcowswe 0:a0285293f6a6 385 #define RFM_WRITE(byte) RFM_SPI_16(0xB800 | (byte) )
madcowswe 0:a0285293f6a6 386
madcowswe 0:a0285293f6a6 387 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 388 //
madcowswe 0:a0285293f6a6 389 // 12. Wake-up Timer Command
madcowswe 0:a0285293f6a6 390 //
madcowswe 0:a0285293f6a6 391 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 392
madcowswe 0:a0285293f6a6 393 #define RFM_WAKEUP_TIMER 0xE000
madcowswe 0:a0285293f6a6 394 #define RFM_WAKEUP_SET(time) RFM_SPI_16(RFM_WAKEUP_TIMER | (time))
madcowswe 0:a0285293f6a6 395
madcowswe 0:a0285293f6a6 396 #define RFM_WAKEUP_480s (RFM_WAKEUP_TIMER |(11 << 8)| 234)
madcowswe 0:a0285293f6a6 397 #define RFM_WAKEUP_240s (RFM_WAKEUP_TIMER |(10 << 8)| 234)
madcowswe 0:a0285293f6a6 398 #define RFM_WAKEUP_120s (RFM_WAKEUP_TIMER |(9 << 8)| 234)
madcowswe 0:a0285293f6a6 399 #define RFM_WAKEUP_119s (RFM_WAKEUP_TIMER |(9 << 8)| 232)
madcowswe 0:a0285293f6a6 400
madcowswe 0:a0285293f6a6 401 #define RFM_WAKEUP_60s (RFM_WAKEUP_TIMER |(8 << 8) | 235)
madcowswe 0:a0285293f6a6 402 #define RFM_WAKEUP_59s (RFM_WAKEUP_TIMER |(8 << 8) | 230)
madcowswe 0:a0285293f6a6 403
madcowswe 0:a0285293f6a6 404 #define RFM_WAKEUP_30s (RFM_WAKEUP_TIMER |(7 << 8) | 235)
madcowswe 0:a0285293f6a6 405 #define RFM_WAKEUP_29s (RFM_WAKEUP_TIMER |(7 << 8) | 227)
madcowswe 0:a0285293f6a6 406
madcowswe 0:a0285293f6a6 407 #define RFM_WAKEUP_8s (RFM_WAKEUP_TIMER |(5 << 8) | 250)
madcowswe 0:a0285293f6a6 408 #define RFM_WAKEUP_7s (RFM_WAKEUP_TIMER |(5 << 8) | 219)
madcowswe 0:a0285293f6a6 409 #define RFM_WAKEUP_6s (RFM_WAKEUP_TIMER |(6 << 8) | 94)
madcowswe 0:a0285293f6a6 410 #define RFM_WAKEUP_5s (RFM_WAKEUP_TIMER |(5 << 8) | 156)
madcowswe 0:a0285293f6a6 411 #define RFM_WAKEUP_4s (RFM_WAKEUP_TIMER |(5 << 8) | 125)
madcowswe 0:a0285293f6a6 412 #define RFM_WAKEUP_1s (RFM_WAKEUP_TIMER |(2 << 8) | 250)
madcowswe 0:a0285293f6a6 413 #define RFM_WAKEUP_900ms (RFM_WAKEUP_TIMER |(2 << 8) | 225)
madcowswe 0:a0285293f6a6 414 #define RFM_WAKEUP_800ms (RFM_WAKEUP_TIMER |(2 << 8) | 200)
madcowswe 0:a0285293f6a6 415 #define RFM_WAKEUP_700ms (RFM_WAKEUP_TIMER |(2 << 8) | 175)
madcowswe 0:a0285293f6a6 416 #define RFM_WAKEUP_600ms (RFM_WAKEUP_TIMER |(2 << 8) | 150)
madcowswe 0:a0285293f6a6 417 #define RFM_WAKEUP_500ms (RFM_WAKEUP_TIMER |(2 << 8) | 125)
madcowswe 0:a0285293f6a6 418 #define RFM_WAKEUP_400ms (RFM_WAKEUP_TIMER |(2 << 8) | 100)
madcowswe 0:a0285293f6a6 419 #define RFM_WAKEUP_300ms (RFM_WAKEUP_TIMER |(2 << 8) | 75)
madcowswe 0:a0285293f6a6 420 #define RFM_WAKEUP_200ms (RFM_WAKEUP_TIMER |(2 << 8) | 50)
madcowswe 0:a0285293f6a6 421 #define RFM_WAKEUP_100ms (RFM_WAKEUP_TIMER |(2 << 8) | 25)
madcowswe 0:a0285293f6a6 422
madcowswe 0:a0285293f6a6 423 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 424 //
madcowswe 0:a0285293f6a6 425 // 13. Low Duty-Cycle Command
madcowswe 0:a0285293f6a6 426 //
madcowswe 0:a0285293f6a6 427 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 428
madcowswe 0:a0285293f6a6 429 #define RFM_LOW_DUTY_CYCLE 0xC800
madcowswe 0:a0285293f6a6 430
madcowswe 0:a0285293f6a6 431 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 432 //
madcowswe 0:a0285293f6a6 433 // 14. Low Battery Detector Command
madcowswe 0:a0285293f6a6 434 //
madcowswe 0:a0285293f6a6 435 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 436
madcowswe 0:a0285293f6a6 437 #define RFM_LOW_BATT_DETECT 0xC000
madcowswe 0:a0285293f6a6 438 #define RFM_LOW_BATT_DETECT_D_1MHZ 0xC000
madcowswe 0:a0285293f6a6 439 #define RFM_LOW_BATT_DETECT_D_1_25MHZ 0xC020
madcowswe 0:a0285293f6a6 440 #define RFM_LOW_BATT_DETECT_D_1_66MHZ 0xC040
madcowswe 0:a0285293f6a6 441 #define RFM_LOW_BATT_DETECT_D_2MHZ 0xC060
madcowswe 0:a0285293f6a6 442 #define RFM_LOW_BATT_DETECT_D_2_5MHZ 0xC080
madcowswe 0:a0285293f6a6 443 #define RFM_LOW_BATT_DETECT_D_3_33MHZ 0xC0A0
madcowswe 0:a0285293f6a6 444 #define RFM_LOW_BATT_DETECT_D_5MHZ 0xC0C0
madcowswe 0:a0285293f6a6 445 #define RFM_LOW_BATT_DETECT_D_10MHZ 0xC0E0
madcowswe 0:a0285293f6a6 446
madcowswe 0:a0285293f6a6 447 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 448 //
madcowswe 0:a0285293f6a6 449 // 15. Status Read Command
madcowswe 0:a0285293f6a6 450 //
madcowswe 0:a0285293f6a6 451 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 452
madcowswe 0:a0285293f6a6 453 #define RFM_READ_STATUS() RFM_SPI_16(0x0000)
madcowswe 0:a0285293f6a6 454 #define RFM_READ_STATUS_FFIT() SPI_1 (0x00)
madcowswe 0:a0285293f6a6 455 #define RFM_READ_STATUS_RGIT RFM_READ_STATUS_FFIT
madcowswe 0:a0285293f6a6 456
madcowswe 0:a0285293f6a6 457 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 458
madcowswe 0:a0285293f6a6 459 // RFM air protocol flags:
madcowswe 0:a0285293f6a6 460
madcowswe 0:a0285293f6a6 461 #define RFMPROTO_FLAGS_BITASK_PACKETTYPE 0b11000000 //!< the uppermost 2 bits of the flags field encode the packettype
madcowswe 0:a0285293f6a6 462 #define RFMPROTO_FLAGS_PACKETTYPE_BROADCAST 0b00000000 //!< broadcast packettype (message from hr20, protocol; step 1)
madcowswe 0:a0285293f6a6 463 #define RFMPROTO_FLAGS_PACKETTYPE_COMMAND 0b01000000 //!< command packettype (message to hr20, protocol; step 2)
madcowswe 0:a0285293f6a6 464 #define RFMPROTO_FLAGS_PACKETTYPE_REPLY 0b10000000 //!< reply packettype (message from hr20, protocol; step 3)
madcowswe 0:a0285293f6a6 465 #define RFMPROTO_FLAGS_PACKETTYPE_SPECIAL 0b11000000 //!< currently unused packettype
madcowswe 0:a0285293f6a6 466
madcowswe 0:a0285293f6a6 467 #define RFMPROTO_FLAGS_BITASK_DEVICETYPE 0b00011111 //!< the lowermost 5 bytes denote the device type. this way other sensors and actors may coexist
madcowswe 0:a0285293f6a6 468 #define RFMPROTO_FLAGS_DEVICETYPE_OPENHR20 0b00010100 //!< topen HR20 device type. 10100 is for decimal 20
madcowswe 0:a0285293f6a6 469
madcowswe 0:a0285293f6a6 470 #define RFMPROTO_IS_PACKETTYPE_BROADCAST(FLAGS) ( RFMPROTO_FLAGS_PACKETTYPE_BROADCAST == ((FLAGS) & RFMPROTO_FLAGS_BITASK_PACKETTYPE) )
madcowswe 0:a0285293f6a6 471 #define RFMPROTO_IS_PACKETTYPE_COMMAND(FLAGS) ( RFMPROTO_FLAGS_PACKETTYPE_COMMAND == ((FLAGS) & RFMPROTO_FLAGS_BITASK_PACKETTYPE) )
madcowswe 0:a0285293f6a6 472 #define RFMPROTO_IS_PACKETTYPE_REPLY(FLAGS) ( RFMPROTO_FLAGS_PACKETTYPE_REPLY == ((FLAGS) & RFMPROTO_FLAGS_BITASK_PACKETTYPE) )
madcowswe 0:a0285293f6a6 473 #define RFMPROTO_IS_PACKETTYPE_SPECIAL(FLAGS) ( RFMPROTO_FLAGS_PACKETTYPE_SPECIAL == ((FLAGS) & RFMPROTO_FLAGS_BITASK_PACKETTYPE) )
madcowswe 0:a0285293f6a6 474 #define RFMPROTO_IS_DEVICETYPE_OPENHR20(FLAGS) ( RFMPROTO_FLAGS_DEVICETYPE_OPENHR20 == ((FLAGS) & RFMPROTO_FLAGS_BITASK_DEVICETYPE) )
madcowswe 0:a0285293f6a6 475
madcowswe 0:a0285293f6a6 476 ///////////////////////////////////////////////////////////////////////////////
madcowswe 0:a0285293f6a6 477
madcowswe 0:a0285293f6a6 478 #endif