Zhen Liu / Mbed 2 deprecated HW1_extraD

Extra problem 4 for HW 1

Dependencies:   mbed

PowerControl/PowerControl.h@0:febabd1da7f4, 2015-02-18 (annotated)

Committer:
lzzcd001
Date:
Wed Feb 18 14:49:06 2015 +0000
Revision:
0:febabd1da7f4
Extra problem 4 for HW 1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lzzcd001 0:febabd1da7f4 1 /* mbed PowerControl Library
lzzcd001 0:febabd1da7f4 2 * Copyright (c) 2010 Michael Wei
lzzcd001 0:febabd1da7f4 3 */
lzzcd001 0:febabd1da7f4 4
lzzcd001 0:febabd1da7f4 5 #ifndef MBED_POWERCONTROL_H
lzzcd001 0:febabd1da7f4 6 #define MBED_POWERCONTROL_H
lzzcd001 0:febabd1da7f4 7
lzzcd001 0:febabd1da7f4 8 //shouldn't have to include, but fixes weird problems with defines
lzzcd001 0:febabd1da7f4 9 //#include "LPC1768/LPC17xx.h"
lzzcd001 0:febabd1da7f4 10
lzzcd001 0:febabd1da7f4 11 //System Control Register
lzzcd001 0:febabd1da7f4 12 // bit 0: Reserved
lzzcd001 0:febabd1da7f4 13 // bit 1: Sleep on Exit
lzzcd001 0:febabd1da7f4 14 #define LPC1768_SCR_SLEEPONEXIT 0x2
lzzcd001 0:febabd1da7f4 15 // bit 2: Deep Sleep
lzzcd001 0:febabd1da7f4 16 #define LPC1768_SCR_SLEEPDEEP 0x4
lzzcd001 0:febabd1da7f4 17 // bit 3: Resereved
lzzcd001 0:febabd1da7f4 18 // bit 4: Send on Pending
lzzcd001 0:febabd1da7f4 19 #define LPC1768_SCR_SEVONPEND 0x10
lzzcd001 0:febabd1da7f4 20 // bit 5-31: Reserved
lzzcd001 0:febabd1da7f4 21
lzzcd001 0:febabd1da7f4 22 //Power Control Register
lzzcd001 0:febabd1da7f4 23 // bit 0: Power mode control bit 0 (power-down mode)
lzzcd001 0:febabd1da7f4 24 #define LPC1768_PCON_PM0 0x1
lzzcd001 0:febabd1da7f4 25 // bit 1: Power mode control bit 1 (deep power-down mode)
lzzcd001 0:febabd1da7f4 26 #define LPC1768_PCON_PM1 0x2
lzzcd001 0:febabd1da7f4 27 // bit 2: Brown-out reduced power mode
lzzcd001 0:febabd1da7f4 28 #define LPC1768_PCON_BODRPM 0x4
lzzcd001 0:febabd1da7f4 29 // bit 3: Brown-out global disable
lzzcd001 0:febabd1da7f4 30 #define LPC1768_PCON_BOGD 0x8
lzzcd001 0:febabd1da7f4 31 // bit 4: Brown-out reset disable
lzzcd001 0:febabd1da7f4 32 #define LPC1768_PCON_BORD 0x10
lzzcd001 0:febabd1da7f4 33 // bit 5-7 : Reserved
lzzcd001 0:febabd1da7f4 34 // bit 8: Sleep Mode Entry Flag
lzzcd001 0:febabd1da7f4 35 #define LPC1768_PCON_SMFLAG 0x100
lzzcd001 0:febabd1da7f4 36 // bit 9: Deep Sleep Entry Flag
lzzcd001 0:febabd1da7f4 37 #define LPC1768_PCON_DSFLAG 0x200
lzzcd001 0:febabd1da7f4 38 // bit 10: Power Down Entry Flag
lzzcd001 0:febabd1da7f4 39 #define LPC1768_PCON_PDFLAG 0x400
lzzcd001 0:febabd1da7f4 40 // bit 11: Deep Power Down Entry Flag
lzzcd001 0:febabd1da7f4 41 #define LPC1768_PCON_DPDFLAG 0x800
lzzcd001 0:febabd1da7f4 42 // bit 12-31: Reserved
lzzcd001 0:febabd1da7f4 43
lzzcd001 0:febabd1da7f4 44 //"Sleep Mode" (WFI).
lzzcd001 0:febabd1da7f4 45 inline void Sleep(void)
lzzcd001 0:febabd1da7f4 46 {
lzzcd001 0:febabd1da7f4 47 __WFI();
lzzcd001 0:febabd1da7f4 48 }
lzzcd001 0:febabd1da7f4 49
lzzcd001 0:febabd1da7f4 50 //"Deep Sleep" Mode
lzzcd001 0:febabd1da7f4 51 inline void DeepSleep(void)
lzzcd001 0:febabd1da7f4 52 {
lzzcd001 0:febabd1da7f4 53 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
lzzcd001 0:febabd1da7f4 54 __WFI();
lzzcd001 0:febabd1da7f4 55 }
lzzcd001 0:febabd1da7f4 56
lzzcd001 0:febabd1da7f4 57 //"Power-Down" Mode
lzzcd001 0:febabd1da7f4 58 inline void PowerDown(void)
lzzcd001 0:febabd1da7f4 59 {
lzzcd001 0:febabd1da7f4 60 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
lzzcd001 0:febabd1da7f4 61 LPC_SC->PCON &= ~LPC1768_PCON_PM1;
lzzcd001 0:febabd1da7f4 62 LPC_SC->PCON |= LPC1768_PCON_PM0;
lzzcd001 0:febabd1da7f4 63 __WFI();
lzzcd001 0:febabd1da7f4 64 //reset back to normal
lzzcd001 0:febabd1da7f4 65 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
lzzcd001 0:febabd1da7f4 66 }
lzzcd001 0:febabd1da7f4 67
lzzcd001 0:febabd1da7f4 68 //"Deep Power-Down" Mode
lzzcd001 0:febabd1da7f4 69 inline void DeepPowerDown(void)
lzzcd001 0:febabd1da7f4 70 {
lzzcd001 0:febabd1da7f4 71 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
lzzcd001 0:febabd1da7f4 72 LPC_SC->PCON |= LPC1768_PCON_PM1 | LPC1768_PCON_PM0;
lzzcd001 0:febabd1da7f4 73 __WFI();
lzzcd001 0:febabd1da7f4 74 //reset back to normal
lzzcd001 0:febabd1da7f4 75 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
lzzcd001 0:febabd1da7f4 76 }
lzzcd001 0:febabd1da7f4 77
lzzcd001 0:febabd1da7f4 78 //shut down BOD during power-down/deep sleep
lzzcd001 0:febabd1da7f4 79 inline void BrownOut_ReducedPowerMode_Enable(void)
lzzcd001 0:febabd1da7f4 80 {
lzzcd001 0:febabd1da7f4 81 LPC_SC->PCON |= LPC1768_PCON_BODRPM;
lzzcd001 0:febabd1da7f4 82 }
lzzcd001 0:febabd1da7f4 83
lzzcd001 0:febabd1da7f4 84 //turn on BOD during power-down/deep sleep
lzzcd001 0:febabd1da7f4 85 inline void BrownOut_ReducedPowerMode_Disable(void)
lzzcd001 0:febabd1da7f4 86 {
lzzcd001 0:febabd1da7f4 87 LPC_SC->PCON &= ~LPC1768_PCON_BODRPM;
lzzcd001 0:febabd1da7f4 88 }
lzzcd001 0:febabd1da7f4 89
lzzcd001 0:febabd1da7f4 90 //turn off brown out circutry
lzzcd001 0:febabd1da7f4 91 inline void BrownOut_Global_Disable(void)
lzzcd001 0:febabd1da7f4 92 {
lzzcd001 0:febabd1da7f4 93 LPC_SC->PCON |= LPC1768_PCON_BOGD;
lzzcd001 0:febabd1da7f4 94 }
lzzcd001 0:febabd1da7f4 95
lzzcd001 0:febabd1da7f4 96 //turn on brown out circutry
lzzcd001 0:febabd1da7f4 97 inline void BrownOut_Global_Enable(void)
lzzcd001 0:febabd1da7f4 98 {
lzzcd001 0:febabd1da7f4 99 LPC_SC->PCON &= !LPC1768_PCON_BOGD;
lzzcd001 0:febabd1da7f4 100 }
lzzcd001 0:febabd1da7f4 101
lzzcd001 0:febabd1da7f4 102 //turn off brown out reset circutry
lzzcd001 0:febabd1da7f4 103 inline void BrownOut_Reset_Disable(void)
lzzcd001 0:febabd1da7f4 104 {
lzzcd001 0:febabd1da7f4 105 LPC_SC->PCON |= LPC1768_PCON_BORD;
lzzcd001 0:febabd1da7f4 106 }
lzzcd001 0:febabd1da7f4 107
lzzcd001 0:febabd1da7f4 108 //turn on brown outreset circutry
lzzcd001 0:febabd1da7f4 109 inline void BrownOut_Reset_Enable(void)
lzzcd001 0:febabd1da7f4 110 {
lzzcd001 0:febabd1da7f4 111 LPC_SC->PCON &= ~LPC1768_PCON_BORD;
lzzcd001 0:febabd1da7f4 112 }
lzzcd001 0:febabd1da7f4 113 //Peripheral Control Register
lzzcd001 0:febabd1da7f4 114 // bit 0: Reserved
lzzcd001 0:febabd1da7f4 115 // bit 1: PCTIM0: Timer/Counter 0 power/clock enable
lzzcd001 0:febabd1da7f4 116 #define LPC1768_PCONP_PCTIM0 0x2
lzzcd001 0:febabd1da7f4 117 // bit 2: PCTIM1: Timer/Counter 1 power/clock enable
lzzcd001 0:febabd1da7f4 118 #define LPC1768_PCONP_PCTIM1 0x4
lzzcd001 0:febabd1da7f4 119 // bit 3: PCUART0: UART 0 power/clock enable
lzzcd001 0:febabd1da7f4 120 #define LPC1768_PCONP_PCUART0 0x8
lzzcd001 0:febabd1da7f4 121 // bit 4: PCUART1: UART 1 power/clock enable
lzzcd001 0:febabd1da7f4 122 #define LPC1768_PCONP_PCUART1 0x10
lzzcd001 0:febabd1da7f4 123 // bit 5: Reserved
lzzcd001 0:febabd1da7f4 124 // bit 6: PCPWM1: PWM 1 power/clock enable
lzzcd001 0:febabd1da7f4 125 #define LPC1768_PCONP_PCPWM1 0x40
lzzcd001 0:febabd1da7f4 126 // bit 7: PCI2C0: I2C interface 0 power/clock enable
lzzcd001 0:febabd1da7f4 127 #define LPC1768_PCONP_PCI2C0 0x80
lzzcd001 0:febabd1da7f4 128 // bit 8: PCSPI: SPI interface power/clock enable
lzzcd001 0:febabd1da7f4 129 #define LPC1768_PCONP_PCSPI 0x100
lzzcd001 0:febabd1da7f4 130 // bit 9: PCRTC: RTC power/clock enable
lzzcd001 0:febabd1da7f4 131 #define LPC1768_PCONP_PCRTC 0x200
lzzcd001 0:febabd1da7f4 132 // bit 10: PCSSP1: SSP interface 1 power/clock enable
lzzcd001 0:febabd1da7f4 133 #define LPC1768_PCONP_PCSSP1 0x400
lzzcd001 0:febabd1da7f4 134 // bit 11: Reserved
lzzcd001 0:febabd1da7f4 135 // bit 12: PCADC: A/D converter power/clock enable
lzzcd001 0:febabd1da7f4 136 #define LPC1768_PCONP_PCADC 0x1000
lzzcd001 0:febabd1da7f4 137 // bit 13: PCCAN1: CAN controller 1 power/clock enable
lzzcd001 0:febabd1da7f4 138 #define LPC1768_PCONP_PCCAN1 0x2000
lzzcd001 0:febabd1da7f4 139 // bit 14: PCCAN2: CAN controller 2 power/clock enable
lzzcd001 0:febabd1da7f4 140 #define LPC1768_PCONP_PCCAN2 0x4000
lzzcd001 0:febabd1da7f4 141 // bit 15: PCGPIO: GPIOs power/clock enable
lzzcd001 0:febabd1da7f4 142 #define LPC1768_PCONP_PCGPIO 0x8000
lzzcd001 0:febabd1da7f4 143 // bit 16: PCRIT: Repetitive interrupt timer power/clock enable
lzzcd001 0:febabd1da7f4 144 #define LPC1768_PCONP_PCRIT 0x10000
lzzcd001 0:febabd1da7f4 145 // bit 17: PCMCPWM: Motor control PWM power/clock enable
lzzcd001 0:febabd1da7f4 146 #define LPC1768_PCONP_PCMCPWM 0x20000
lzzcd001 0:febabd1da7f4 147 // bit 18: PCQEI: Quadrature encoder interface power/clock enable
lzzcd001 0:febabd1da7f4 148 #define LPC1768_PCONP_PCQEI 0x40000
lzzcd001 0:febabd1da7f4 149 // bit 19: PCI2C1: I2C interface 1 power/clock enable
lzzcd001 0:febabd1da7f4 150 #define LPC1768_PCONP_PCI2C1 0x80000
lzzcd001 0:febabd1da7f4 151 // bit 20: Reserved
lzzcd001 0:febabd1da7f4 152 // bit 21: PCSSP0: SSP interface 0 power/clock enable
lzzcd001 0:febabd1da7f4 153 #define LPC1768_PCONP_PCSSP0 0x200000
lzzcd001 0:febabd1da7f4 154 // bit 22: PCTIM2: Timer 2 power/clock enable
lzzcd001 0:febabd1da7f4 155 #define LPC1768_PCONP_PCTIM2 0x400000
lzzcd001 0:febabd1da7f4 156 // bit 23: PCTIM3: Timer 3 power/clock enable
lzzcd001 0:febabd1da7f4 157 #define LPC1768_PCONP_PCQTIM3 0x800000
lzzcd001 0:febabd1da7f4 158 // bit 24: PCUART2: UART 2 power/clock enable
lzzcd001 0:febabd1da7f4 159 #define LPC1768_PCONP_PCUART2 0x1000000
lzzcd001 0:febabd1da7f4 160 // bit 25: PCUART3: UART 3 power/clock enable
lzzcd001 0:febabd1da7f4 161 #define LPC1768_PCONP_PCUART3 0x2000000
lzzcd001 0:febabd1da7f4 162 // bit 26: PCI2C2: I2C interface 2 power/clock enable
lzzcd001 0:febabd1da7f4 163 #define LPC1768_PCONP_PCI2C2 0x4000000
lzzcd001 0:febabd1da7f4 164 // bit 27: PCI2S: I2S interface power/clock enable
lzzcd001 0:febabd1da7f4 165 #define LPC1768_PCONP_PCI2S 0x8000000
lzzcd001 0:febabd1da7f4 166 // bit 28: Reserved
lzzcd001 0:febabd1da7f4 167 // bit 29: PCGPDMA: GP DMA function power/clock enable
lzzcd001 0:febabd1da7f4 168 #define LPC1768_PCONP_PCGPDMA 0x20000000
lzzcd001 0:febabd1da7f4 169 // bit 30: PCENET: Ethernet block power/clock enable
lzzcd001 0:febabd1da7f4 170 #define LPC1768_PCONP_PCENET 0x40000000
lzzcd001 0:febabd1da7f4 171 // bit 31: PCUSB: USB interface power/clock enable
lzzcd001 0:febabd1da7f4 172 #define LPC1768_PCONP_PCUSB 0x80000000
lzzcd001 0:febabd1da7f4 173
lzzcd001 0:febabd1da7f4 174 //Powers Up specified Peripheral(s)
lzzcd001 0:febabd1da7f4 175 inline unsigned int Peripheral_PowerUp(unsigned int bitMask)
lzzcd001 0:febabd1da7f4 176 {
lzzcd001 0:febabd1da7f4 177 return LPC_SC->PCONP |= bitMask;
lzzcd001 0:febabd1da7f4 178 }
lzzcd001 0:febabd1da7f4 179
lzzcd001 0:febabd1da7f4 180 //Powers Down specified Peripheral(s)
lzzcd001 0:febabd1da7f4 181 inline unsigned int Peripheral_PowerDown(unsigned int bitMask)
lzzcd001 0:febabd1da7f4 182 {
lzzcd001 0:febabd1da7f4 183 return LPC_SC->PCONP &= ~bitMask;
lzzcd001 0:febabd1da7f4 184 }
lzzcd001 0:febabd1da7f4 185
lzzcd001 0:febabd1da7f4 186 //returns if the peripheral is on or off
lzzcd001 0:febabd1da7f4 187 inline bool Peripheral_GetStatus(unsigned int peripheral)
lzzcd001 0:febabd1da7f4 188 {
lzzcd001 0:febabd1da7f4 189 return (LPC_SC->PCONP & peripheral) ? true : false;
lzzcd001 0:febabd1da7f4 190 }
lzzcd001 0:febabd1da7f4 191
lzzcd001 0:febabd1da7f4 192 #endif