Watchdog.cpp

00001 /// @file Watchdog.cpp provides the interface to the Watchdog module
00002 ///
00003 /// This provides basic Watchdog service for the mbed. You can configure
00004 /// various timeout intervals that meet your system needs. Additionally,
00005 /// it is possible to identify if the Watchdog was the cause of any 
00006 /// system restart.
00007 /// 
00008 /// Adapted from Simon's Watchdog code from http://mbed.org/forum/mbed/topic/508/
00009 ///
00010 /// @note Copyright © 2011 by Smartware Computing, all rights reserved.
00011 ///     This software may be used to derive new software, as long as
00012 ///     this copyright statement remains in the source file.
00013 /// @author David Smart
00014 ///
00015 #include "mbed.h"
00016 #include "Watchdog.h"
00017 
00018 #if defined( TARGET_LPC1768 )
00019 /// Watchdog gets instantiated at the module level
00020 Watchdog::Watchdog() {
00021     wdreset = (LPC_WDT->WDMOD >> 2) & 1;    // capture the cause of the previous reset
00022 }
00023 
00024 /// Load timeout value in watchdog timer and enable
00025 void Watchdog::Configure(float s) {
00026     LPC_WDT->WDCLKSEL = 0x1;                // Set CLK src to PCLK
00027     uint32_t clk = SystemCoreClock / 16;    // WD has a fixed /4 prescaler, PCLK default is /4
00028     LPC_WDT->WDTC = (uint32_t)(s * (float)clk);
00029     LPC_WDT->WDMOD = 0x3;                   // Enabled and Reset
00030     Service();
00031 }
00032 
00033 /// "Service", "kick" or "feed" the dog - reset the watchdog timer
00034 /// by writing this required bit pattern
00035 void Watchdog::Service() {
00036     LPC_WDT->WDFEED = 0xAA;
00037     LPC_WDT->WDFEED = 0x55;
00038 }
00039 
00040 /// get the flag to indicate if the watchdog causes the reset
00041 bool Watchdog::WatchdogCausedReset() {
00042     return wdreset;
00043 }
00044 #elif defined( TARGET_LPC4088 )
00045 // from Gesotec Gesotec
00046 /// Watchdog gets instantiated at the module level
00047 Watchdog::Watchdog() {
00048     wdreset = (LPC_WDT->MOD >> 2) & 1;    // capture the cause of the previous reset
00049 }
00050  
00051 /// Load timeout value in watchdog timer and enable
00052 void Watchdog::Configure(float s) {
00053     //LPC_WDT->CLKSEL = 0x1;                // Set CLK src to PCLK
00054     uint32_t clk = 500000 / 4;    // WD has a fixed /4 prescaler, and a 500khz oscillator
00055     LPC_WDT->TC = (uint32_t)(s * (float)clk);
00056     LPC_WDT->MOD = 0x3;                   // Enabled and Reset
00057     Service();
00058 }
00059  
00060 /// "Service", "kick" or "feed" the dog - reset the watchdog timer
00061 /// by writing this required bit pattern
00062 void Watchdog::Service() {
00063     LPC_WDT->FEED = 0xAA;
00064     LPC_WDT->FEED = 0x55;
00065 }
00066  
00067 /// get the flag to indicate if the watchdog causes the reset
00068 bool Watchdog::WatchdogCausedReset() {
00069     return wdreset;
00070 }
00071 #elif defined( TARGET_STM )
00072 // Derived from Chau Vo
00073 /// Watchdog gets instantiated at the module level
00074 Watchdog::Watchdog() {
00075     wdreset = (RCC->CSR & (1<<29)) ? true : false;  // read the IWDGRSTF (Independent WD, not the windows WD)
00076 }
00077 
00078 /// Load timeout value in watchdog timer and enable
00079 void Watchdog::Configure(float timeout) {
00080     // http://www.st.com/web/en/resource/technical/document/reference_manual/CD00171190.pdf
00081     IWDG->KR  = 0x5555;         // enable write to PR, RLR
00082     IWDG->PR  = timeout;             // Init prescaler, page 486 Reference Manual
00083     IWDG->RLR = 0xFFF;          // Init RLR
00084     IWDG->KR  = 0xAAAA;         // Reload the watchdog
00085     IWDG->KR  = 0xCCCC;         // Starts the WD
00086 }
00087 
00088 /// "Service", "kick" or "feed" the dog - reset the watchdog timer
00089 void Watchdog::Service() {
00090     IWDG->KR  = 0xAAAA;
00091 }
00092 
00093 /// get the flag to indicate if the watchdog causes the reset
00094 bool Watchdog::WatchdogCausedReset() {
00095     if (wdreset) {
00096         RCC->CSR |= (1<<24); // clear reset flag
00097     }
00098     return wdreset;
00099 }
00100 #endif