Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_nand.c@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file stm32f4xx_hal_nand.c
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief NAND HAL module driver.
lypinator 0:bb348c97df44 6 * This file provides a generic firmware to drive NAND memories mounted
lypinator 0:bb348c97df44 7 * as external device.
lypinator 0:bb348c97df44 8 *
lypinator 0:bb348c97df44 9 @verbatim
lypinator 0:bb348c97df44 10 ==============================================================================
lypinator 0:bb348c97df44 11 ##### How to use this driver #####
lypinator 0:bb348c97df44 12 ==============================================================================
lypinator 0:bb348c97df44 13 [..]
lypinator 0:bb348c97df44 14 This driver is a generic layered driver which contains a set of APIs used to
lypinator 0:bb348c97df44 15 control NAND flash memories. It uses the FMC/FSMC layer functions to interface
lypinator 0:bb348c97df44 16 with NAND devices. This driver is used as follows:
lypinator 0:bb348c97df44 17
lypinator 0:bb348c97df44 18 (+) NAND flash memory configuration sequence using the function HAL_NAND_Init()
lypinator 0:bb348c97df44 19 with control and timing parameters for both common and attribute spaces.
lypinator 0:bb348c97df44 20
lypinator 0:bb348c97df44 21 (+) Read NAND flash memory maker and device IDs using the function
lypinator 0:bb348c97df44 22 HAL_NAND_Read_ID(). The read information is stored in the NAND_ID_TypeDef
lypinator 0:bb348c97df44 23 structure declared by the function caller.
lypinator 0:bb348c97df44 24
lypinator 0:bb348c97df44 25 (+) Access NAND flash memory by read/write operations using the functions
lypinator 0:bb348c97df44 26 HAL_NAND_Read_Page_8b()/HAL_NAND_Read_SpareArea_8b(),
lypinator 0:bb348c97df44 27 HAL_NAND_Write_Page_8b()/HAL_NAND_Write_SpareArea_8b(),
lypinator 0:bb348c97df44 28 HAL_NAND_Read_Page_16b()/HAL_NAND_Read_SpareArea_16b(),
lypinator 0:bb348c97df44 29 HAL_NAND_Write_Page_16b()/HAL_NAND_Write_SpareArea_16b()
lypinator 0:bb348c97df44 30 to read/write page(s)/spare area(s). These functions use specific device
lypinator 0:bb348c97df44 31 information (Block, page size..) predefined by the user in the HAL_NAND_Info_TypeDef
lypinator 0:bb348c97df44 32 structure. The read/write address information is contained by the Nand_Address_Typedef
lypinator 0:bb348c97df44 33 structure passed as parameter.
lypinator 0:bb348c97df44 34
lypinator 0:bb348c97df44 35 (+) Perform NAND flash Reset chip operation using the function HAL_NAND_Reset().
lypinator 0:bb348c97df44 36
lypinator 0:bb348c97df44 37 (+) Perform NAND flash erase block operation using the function HAL_NAND_Erase_Block().
lypinator 0:bb348c97df44 38 The erase block address information is contained in the Nand_Address_Typedef
lypinator 0:bb348c97df44 39 structure passed as parameter.
lypinator 0:bb348c97df44 40
lypinator 0:bb348c97df44 41 (+) Read the NAND flash status operation using the function HAL_NAND_Read_Status().
lypinator 0:bb348c97df44 42
lypinator 0:bb348c97df44 43 (+) You can also control the NAND device by calling the control APIs HAL_NAND_ECC_Enable()/
lypinator 0:bb348c97df44 44 HAL_NAND_ECC_Disable() to respectively enable/disable the ECC code correction
lypinator 0:bb348c97df44 45 feature or the function HAL_NAND_GetECC() to get the ECC correction code.
lypinator 0:bb348c97df44 46
lypinator 0:bb348c97df44 47 (+) You can monitor the NAND device HAL state by calling the function
lypinator 0:bb348c97df44 48 HAL_NAND_GetState()
lypinator 0:bb348c97df44 49
lypinator 0:bb348c97df44 50 [..]
lypinator 0:bb348c97df44 51 (@) This driver is a set of generic APIs which handle standard NAND flash operations.
lypinator 0:bb348c97df44 52 If a NAND flash device contains different operations and/or implementations,
lypinator 0:bb348c97df44 53 it should be implemented separately.
lypinator 0:bb348c97df44 54
lypinator 0:bb348c97df44 55 @endverbatim
lypinator 0:bb348c97df44 56 ******************************************************************************
lypinator 0:bb348c97df44 57 * @attention
lypinator 0:bb348c97df44 58 *
lypinator 0:bb348c97df44 59 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 60 *
lypinator 0:bb348c97df44 61 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 62 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 63 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 64 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 65 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 66 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 67 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 68 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 69 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 70 * without specific prior written permission.
lypinator 0:bb348c97df44 71 *
lypinator 0:bb348c97df44 72 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 73 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 74 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 75 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 76 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 77 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 78 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 79 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 80 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 81 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 82 *
lypinator 0:bb348c97df44 83 ******************************************************************************
lypinator 0:bb348c97df44 84 */
lypinator 0:bb348c97df44 85
lypinator 0:bb348c97df44 86 /* Includes ------------------------------------------------------------------*/
lypinator 0:bb348c97df44 87 #include "stm32f4xx_hal.h"
lypinator 0:bb348c97df44 88
lypinator 0:bb348c97df44 89 /** @addtogroup STM32F4xx_HAL_Driver
lypinator 0:bb348c97df44 90 * @{
lypinator 0:bb348c97df44 91 */
lypinator 0:bb348c97df44 92
lypinator 0:bb348c97df44 93
lypinator 0:bb348c97df44 94 #ifdef HAL_NAND_MODULE_ENABLED
lypinator 0:bb348c97df44 95
lypinator 0:bb348c97df44 96 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
lypinator 0:bb348c97df44 97 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
lypinator 0:bb348c97df44 98 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
lypinator 0:bb348c97df44 99
lypinator 0:bb348c97df44 100 /** @defgroup NAND NAND
lypinator 0:bb348c97df44 101 * @brief NAND HAL module driver
lypinator 0:bb348c97df44 102 * @{
lypinator 0:bb348c97df44 103 */
lypinator 0:bb348c97df44 104
lypinator 0:bb348c97df44 105 /* Private typedef -----------------------------------------------------------*/
lypinator 0:bb348c97df44 106 /* Private define ------------------------------------------------------------*/
lypinator 0:bb348c97df44 107 /** @defgroup NAND_Private_Constants NAND Private Constants
lypinator 0:bb348c97df44 108 * @{
lypinator 0:bb348c97df44 109 */
lypinator 0:bb348c97df44 110
lypinator 0:bb348c97df44 111 /**
lypinator 0:bb348c97df44 112 * @}
lypinator 0:bb348c97df44 113 */
lypinator 0:bb348c97df44 114
lypinator 0:bb348c97df44 115 /* Private macro -------------------------------------------------------------*/
lypinator 0:bb348c97df44 116 /** @defgroup NAND_Private_Macros NAND Private Macros
lypinator 0:bb348c97df44 117 * @{
lypinator 0:bb348c97df44 118 */
lypinator 0:bb348c97df44 119
lypinator 0:bb348c97df44 120 /**
lypinator 0:bb348c97df44 121 * @}
lypinator 0:bb348c97df44 122 */
lypinator 0:bb348c97df44 123 /* Private variables ---------------------------------------------------------*/
lypinator 0:bb348c97df44 124 /* Private function prototypes -----------------------------------------------*/
lypinator 0:bb348c97df44 125 /* Exported functions --------------------------------------------------------*/
lypinator 0:bb348c97df44 126 /** @defgroup NAND_Exported_Functions NAND Exported Functions
lypinator 0:bb348c97df44 127 * @{
lypinator 0:bb348c97df44 128 */
lypinator 0:bb348c97df44 129
lypinator 0:bb348c97df44 130 /** @defgroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
lypinator 0:bb348c97df44 131 * @brief Initialization and Configuration functions
lypinator 0:bb348c97df44 132 *
lypinator 0:bb348c97df44 133 @verbatim
lypinator 0:bb348c97df44 134 ==============================================================================
lypinator 0:bb348c97df44 135 ##### NAND Initialization and de-initialization functions #####
lypinator 0:bb348c97df44 136 ==============================================================================
lypinator 0:bb348c97df44 137 [..]
lypinator 0:bb348c97df44 138 This section provides functions allowing to initialize/de-initialize
lypinator 0:bb348c97df44 139 the NAND memory
lypinator 0:bb348c97df44 140
lypinator 0:bb348c97df44 141 @endverbatim
lypinator 0:bb348c97df44 142 * @{
lypinator 0:bb348c97df44 143 */
lypinator 0:bb348c97df44 144
lypinator 0:bb348c97df44 145 /**
lypinator 0:bb348c97df44 146 * @brief Perform NAND memory Initialization sequence
lypinator 0:bb348c97df44 147 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 148 * the configuration information for NAND module.
lypinator 0:bb348c97df44 149 * @param ComSpace_Timing pointer to Common space timing structure
lypinator 0:bb348c97df44 150 * @param AttSpace_Timing pointer to Attribute space timing structure
lypinator 0:bb348c97df44 151 * @retval HAL status
lypinator 0:bb348c97df44 152 */
lypinator 0:bb348c97df44 153 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing)
lypinator 0:bb348c97df44 154 {
lypinator 0:bb348c97df44 155 /* Check the NAND handle state */
lypinator 0:bb348c97df44 156 if(hnand == NULL)
lypinator 0:bb348c97df44 157 {
lypinator 0:bb348c97df44 158 return HAL_ERROR;
lypinator 0:bb348c97df44 159 }
lypinator 0:bb348c97df44 160
lypinator 0:bb348c97df44 161 if(hnand->State == HAL_NAND_STATE_RESET)
lypinator 0:bb348c97df44 162 {
lypinator 0:bb348c97df44 163 /* Allocate lock resource and initialize it */
lypinator 0:bb348c97df44 164 hnand->Lock = HAL_UNLOCKED;
lypinator 0:bb348c97df44 165 /* Initialize the low level hardware (MSP) */
lypinator 0:bb348c97df44 166 HAL_NAND_MspInit(hnand);
lypinator 0:bb348c97df44 167 }
lypinator 0:bb348c97df44 168
lypinator 0:bb348c97df44 169 /* Initialize NAND control Interface */
lypinator 0:bb348c97df44 170 FMC_NAND_Init(hnand->Instance, &(hnand->Init));
lypinator 0:bb348c97df44 171
lypinator 0:bb348c97df44 172 /* Initialize NAND common space timing Interface */
lypinator 0:bb348c97df44 173 FMC_NAND_CommonSpace_Timing_Init(hnand->Instance, ComSpace_Timing, hnand->Init.NandBank);
lypinator 0:bb348c97df44 174
lypinator 0:bb348c97df44 175 /* Initialize NAND attribute space timing Interface */
lypinator 0:bb348c97df44 176 FMC_NAND_AttributeSpace_Timing_Init(hnand->Instance, AttSpace_Timing, hnand->Init.NandBank);
lypinator 0:bb348c97df44 177
lypinator 0:bb348c97df44 178 /* Enable the NAND device */
lypinator 0:bb348c97df44 179 __FMC_NAND_ENABLE(hnand->Instance, hnand->Init.NandBank);
lypinator 0:bb348c97df44 180
lypinator 0:bb348c97df44 181 /* Update the NAND controller state */
lypinator 0:bb348c97df44 182 hnand->State = HAL_NAND_STATE_READY;
lypinator 0:bb348c97df44 183
lypinator 0:bb348c97df44 184 return HAL_OK;
lypinator 0:bb348c97df44 185 }
lypinator 0:bb348c97df44 186
lypinator 0:bb348c97df44 187 /**
lypinator 0:bb348c97df44 188 * @brief Perform NAND memory De-Initialization sequence
lypinator 0:bb348c97df44 189 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 190 * the configuration information for NAND module.
lypinator 0:bb348c97df44 191 * @retval HAL status
lypinator 0:bb348c97df44 192 */
lypinator 0:bb348c97df44 193 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand)
lypinator 0:bb348c97df44 194 {
lypinator 0:bb348c97df44 195 /* Initialize the low level hardware (MSP) */
lypinator 0:bb348c97df44 196 HAL_NAND_MspDeInit(hnand);
lypinator 0:bb348c97df44 197
lypinator 0:bb348c97df44 198 /* Configure the NAND registers with their reset values */
lypinator 0:bb348c97df44 199 FMC_NAND_DeInit(hnand->Instance, hnand->Init.NandBank);
lypinator 0:bb348c97df44 200
lypinator 0:bb348c97df44 201 /* Reset the NAND controller state */
lypinator 0:bb348c97df44 202 hnand->State = HAL_NAND_STATE_RESET;
lypinator 0:bb348c97df44 203
lypinator 0:bb348c97df44 204 /* Release Lock */
lypinator 0:bb348c97df44 205 __HAL_UNLOCK(hnand);
lypinator 0:bb348c97df44 206
lypinator 0:bb348c97df44 207 return HAL_OK;
lypinator 0:bb348c97df44 208 }
lypinator 0:bb348c97df44 209
lypinator 0:bb348c97df44 210 /**
lypinator 0:bb348c97df44 211 * @brief NAND MSP Init
lypinator 0:bb348c97df44 212 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 213 * the configuration information for NAND module.
lypinator 0:bb348c97df44 214 * @retval None
lypinator 0:bb348c97df44 215 */
lypinator 0:bb348c97df44 216 __weak void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand)
lypinator 0:bb348c97df44 217 {
lypinator 0:bb348c97df44 218 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 219 UNUSED(hnand);
lypinator 0:bb348c97df44 220 /* NOTE : This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 221 the HAL_NAND_MspInit could be implemented in the user file
lypinator 0:bb348c97df44 222 */
lypinator 0:bb348c97df44 223 }
lypinator 0:bb348c97df44 224
lypinator 0:bb348c97df44 225 /**
lypinator 0:bb348c97df44 226 * @brief NAND MSP DeInit
lypinator 0:bb348c97df44 227 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 228 * the configuration information for NAND module.
lypinator 0:bb348c97df44 229 * @retval None
lypinator 0:bb348c97df44 230 */
lypinator 0:bb348c97df44 231 __weak void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand)
lypinator 0:bb348c97df44 232 {
lypinator 0:bb348c97df44 233 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 234 UNUSED(hnand);
lypinator 0:bb348c97df44 235 /* NOTE : This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 236 the HAL_NAND_MspDeInit could be implemented in the user file
lypinator 0:bb348c97df44 237 */
lypinator 0:bb348c97df44 238 }
lypinator 0:bb348c97df44 239
lypinator 0:bb348c97df44 240
lypinator 0:bb348c97df44 241 /**
lypinator 0:bb348c97df44 242 * @brief This function handles NAND device interrupt request.
lypinator 0:bb348c97df44 243 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 244 * the configuration information for NAND module.
lypinator 0:bb348c97df44 245 * @retval HAL status
lypinator 0:bb348c97df44 246 */
lypinator 0:bb348c97df44 247 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand)
lypinator 0:bb348c97df44 248 {
lypinator 0:bb348c97df44 249 /* Check NAND interrupt Rising edge flag */
lypinator 0:bb348c97df44 250 if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_RISING_EDGE))
lypinator 0:bb348c97df44 251 {
lypinator 0:bb348c97df44 252 /* NAND interrupt callback*/
lypinator 0:bb348c97df44 253 HAL_NAND_ITCallback(hnand);
lypinator 0:bb348c97df44 254
lypinator 0:bb348c97df44 255 /* Clear NAND interrupt Rising edge pending bit */
lypinator 0:bb348c97df44 256 __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_RISING_EDGE);
lypinator 0:bb348c97df44 257 }
lypinator 0:bb348c97df44 258
lypinator 0:bb348c97df44 259 /* Check NAND interrupt Level flag */
lypinator 0:bb348c97df44 260 if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_LEVEL))
lypinator 0:bb348c97df44 261 {
lypinator 0:bb348c97df44 262 /* NAND interrupt callback*/
lypinator 0:bb348c97df44 263 HAL_NAND_ITCallback(hnand);
lypinator 0:bb348c97df44 264
lypinator 0:bb348c97df44 265 /* Clear NAND interrupt Level pending bit */
lypinator 0:bb348c97df44 266 __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_LEVEL);
lypinator 0:bb348c97df44 267 }
lypinator 0:bb348c97df44 268
lypinator 0:bb348c97df44 269 /* Check NAND interrupt Falling edge flag */
lypinator 0:bb348c97df44 270 if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FALLING_EDGE))
lypinator 0:bb348c97df44 271 {
lypinator 0:bb348c97df44 272 /* NAND interrupt callback*/
lypinator 0:bb348c97df44 273 HAL_NAND_ITCallback(hnand);
lypinator 0:bb348c97df44 274
lypinator 0:bb348c97df44 275 /* Clear NAND interrupt Falling edge pending bit */
lypinator 0:bb348c97df44 276 __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FALLING_EDGE);
lypinator 0:bb348c97df44 277 }
lypinator 0:bb348c97df44 278
lypinator 0:bb348c97df44 279 /* Check NAND interrupt FIFO empty flag */
lypinator 0:bb348c97df44 280 if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FEMPT))
lypinator 0:bb348c97df44 281 {
lypinator 0:bb348c97df44 282 /* NAND interrupt callback*/
lypinator 0:bb348c97df44 283 HAL_NAND_ITCallback(hnand);
lypinator 0:bb348c97df44 284
lypinator 0:bb348c97df44 285 /* Clear NAND interrupt FIFO empty pending bit */
lypinator 0:bb348c97df44 286 __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FEMPT);
lypinator 0:bb348c97df44 287 }
lypinator 0:bb348c97df44 288 }
lypinator 0:bb348c97df44 289
lypinator 0:bb348c97df44 290 /**
lypinator 0:bb348c97df44 291 * @brief NAND interrupt feature callback
lypinator 0:bb348c97df44 292 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 293 * the configuration information for NAND module.
lypinator 0:bb348c97df44 294 * @retval None
lypinator 0:bb348c97df44 295 */
lypinator 0:bb348c97df44 296 __weak void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand)
lypinator 0:bb348c97df44 297 {
lypinator 0:bb348c97df44 298 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 299 UNUSED(hnand);
lypinator 0:bb348c97df44 300 /* NOTE : This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 301 the HAL_NAND_ITCallback could be implemented in the user file
lypinator 0:bb348c97df44 302 */
lypinator 0:bb348c97df44 303 }
lypinator 0:bb348c97df44 304
lypinator 0:bb348c97df44 305 /**
lypinator 0:bb348c97df44 306 * @}
lypinator 0:bb348c97df44 307 */
lypinator 0:bb348c97df44 308
lypinator 0:bb348c97df44 309 /** @defgroup NAND_Exported_Functions_Group2 Input and Output functions
lypinator 0:bb348c97df44 310 * @brief Input Output and memory control functions
lypinator 0:bb348c97df44 311 *
lypinator 0:bb348c97df44 312 @verbatim
lypinator 0:bb348c97df44 313 ==============================================================================
lypinator 0:bb348c97df44 314 ##### NAND Input and Output functions #####
lypinator 0:bb348c97df44 315 ==============================================================================
lypinator 0:bb348c97df44 316 [..]
lypinator 0:bb348c97df44 317 This section provides functions allowing to use and control the NAND
lypinator 0:bb348c97df44 318 memory
lypinator 0:bb348c97df44 319
lypinator 0:bb348c97df44 320 @endverbatim
lypinator 0:bb348c97df44 321 * @{
lypinator 0:bb348c97df44 322 */
lypinator 0:bb348c97df44 323
lypinator 0:bb348c97df44 324 /**
lypinator 0:bb348c97df44 325 * @brief Read the NAND memory electronic signature
lypinator 0:bb348c97df44 326 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 327 * the configuration information for NAND module.
lypinator 0:bb348c97df44 328 * @param pNAND_ID NAND ID structure
lypinator 0:bb348c97df44 329 * @retval HAL status
lypinator 0:bb348c97df44 330 */
lypinator 0:bb348c97df44 331 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID)
lypinator 0:bb348c97df44 332 {
lypinator 0:bb348c97df44 333 __IO uint32_t data = 0U;
lypinator 0:bb348c97df44 334 __IO uint32_t data1 = 0U;
lypinator 0:bb348c97df44 335 uint32_t deviceaddress = 0U;
lypinator 0:bb348c97df44 336
lypinator 0:bb348c97df44 337 /* Process Locked */
lypinator 0:bb348c97df44 338 __HAL_LOCK(hnand);
lypinator 0:bb348c97df44 339
lypinator 0:bb348c97df44 340 /* Check the NAND controller state */
lypinator 0:bb348c97df44 341 if(hnand->State == HAL_NAND_STATE_BUSY)
lypinator 0:bb348c97df44 342 {
lypinator 0:bb348c97df44 343 return HAL_BUSY;
lypinator 0:bb348c97df44 344 }
lypinator 0:bb348c97df44 345
lypinator 0:bb348c97df44 346 /* Identify the device address */
lypinator 0:bb348c97df44 347 if(hnand->Init.NandBank == FMC_NAND_BANK2)
lypinator 0:bb348c97df44 348 {
lypinator 0:bb348c97df44 349 deviceaddress = NAND_DEVICE1;
lypinator 0:bb348c97df44 350 }
lypinator 0:bb348c97df44 351 else
lypinator 0:bb348c97df44 352 {
lypinator 0:bb348c97df44 353 deviceaddress = NAND_DEVICE2;
lypinator 0:bb348c97df44 354 }
lypinator 0:bb348c97df44 355
lypinator 0:bb348c97df44 356 /* Update the NAND controller state */
lypinator 0:bb348c97df44 357 hnand->State = HAL_NAND_STATE_BUSY;
lypinator 0:bb348c97df44 358
lypinator 0:bb348c97df44 359 /* Send Read ID command sequence */
lypinator 0:bb348c97df44 360 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_READID;
lypinator 0:bb348c97df44 361 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 362
lypinator 0:bb348c97df44 363 /* Read the electronic signature from NAND flash */
lypinator 0:bb348c97df44 364 #ifdef FSMC_PCR2_PWID
lypinator 0:bb348c97df44 365 if (hnand->Init.MemoryDataWidth == FSMC_NAND_PCC_MEM_BUS_WIDTH_8)
lypinator 0:bb348c97df44 366 #else /* FMC_PCR2_PWID is defined */
lypinator 0:bb348c97df44 367 if (hnand->Init.MemoryDataWidth == FMC_NAND_PCC_MEM_BUS_WIDTH_8)
lypinator 0:bb348c97df44 368 #endif
lypinator 0:bb348c97df44 369 {
lypinator 0:bb348c97df44 370 data = *(__IO uint32_t *)deviceaddress;
lypinator 0:bb348c97df44 371
lypinator 0:bb348c97df44 372 /* Return the data read */
lypinator 0:bb348c97df44 373 pNAND_ID->Maker_Id = ADDR_1ST_CYCLE(data);
lypinator 0:bb348c97df44 374 pNAND_ID->Device_Id = ADDR_2ND_CYCLE(data);
lypinator 0:bb348c97df44 375 pNAND_ID->Third_Id = ADDR_3RD_CYCLE(data);
lypinator 0:bb348c97df44 376 pNAND_ID->Fourth_Id = ADDR_4TH_CYCLE(data);
lypinator 0:bb348c97df44 377 }
lypinator 0:bb348c97df44 378 else
lypinator 0:bb348c97df44 379 {
lypinator 0:bb348c97df44 380 data = *(__IO uint32_t *)deviceaddress;
lypinator 0:bb348c97df44 381 data1 = *((__IO uint32_t *)deviceaddress + 4U);
lypinator 0:bb348c97df44 382
lypinator 0:bb348c97df44 383 /* Return the data read */
lypinator 0:bb348c97df44 384 pNAND_ID->Maker_Id = ADDR_1ST_CYCLE(data);
lypinator 0:bb348c97df44 385 pNAND_ID->Device_Id = ADDR_3RD_CYCLE(data);
lypinator 0:bb348c97df44 386 pNAND_ID->Third_Id = ADDR_1ST_CYCLE(data1);
lypinator 0:bb348c97df44 387 pNAND_ID->Fourth_Id = ADDR_3RD_CYCLE(data1);
lypinator 0:bb348c97df44 388 }
lypinator 0:bb348c97df44 389
lypinator 0:bb348c97df44 390 /* Update the NAND controller state */
lypinator 0:bb348c97df44 391 hnand->State = HAL_NAND_STATE_READY;
lypinator 0:bb348c97df44 392
lypinator 0:bb348c97df44 393 /* Process unlocked */
lypinator 0:bb348c97df44 394 __HAL_UNLOCK(hnand);
lypinator 0:bb348c97df44 395
lypinator 0:bb348c97df44 396 return HAL_OK;
lypinator 0:bb348c97df44 397 }
lypinator 0:bb348c97df44 398
lypinator 0:bb348c97df44 399 /**
lypinator 0:bb348c97df44 400 * @brief NAND memory reset
lypinator 0:bb348c97df44 401 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 402 * the configuration information for NAND module.
lypinator 0:bb348c97df44 403 * @retval HAL status
lypinator 0:bb348c97df44 404 */
lypinator 0:bb348c97df44 405 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand)
lypinator 0:bb348c97df44 406 {
lypinator 0:bb348c97df44 407 uint32_t deviceaddress = 0U;
lypinator 0:bb348c97df44 408
lypinator 0:bb348c97df44 409 /* Process Locked */
lypinator 0:bb348c97df44 410 __HAL_LOCK(hnand);
lypinator 0:bb348c97df44 411
lypinator 0:bb348c97df44 412 /* Check the NAND controller state */
lypinator 0:bb348c97df44 413 if(hnand->State == HAL_NAND_STATE_BUSY)
lypinator 0:bb348c97df44 414 {
lypinator 0:bb348c97df44 415 return HAL_BUSY;
lypinator 0:bb348c97df44 416 }
lypinator 0:bb348c97df44 417
lypinator 0:bb348c97df44 418 /* Identify the device address */
lypinator 0:bb348c97df44 419 if(hnand->Init.NandBank == FMC_NAND_BANK2)
lypinator 0:bb348c97df44 420 {
lypinator 0:bb348c97df44 421 deviceaddress = NAND_DEVICE1;
lypinator 0:bb348c97df44 422 }
lypinator 0:bb348c97df44 423 else
lypinator 0:bb348c97df44 424 {
lypinator 0:bb348c97df44 425 deviceaddress = NAND_DEVICE2;
lypinator 0:bb348c97df44 426 }
lypinator 0:bb348c97df44 427
lypinator 0:bb348c97df44 428 /* Update the NAND controller state */
lypinator 0:bb348c97df44 429 hnand->State = HAL_NAND_STATE_BUSY;
lypinator 0:bb348c97df44 430
lypinator 0:bb348c97df44 431 /* Send NAND reset command */
lypinator 0:bb348c97df44 432 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = 0xFF;
lypinator 0:bb348c97df44 433
lypinator 0:bb348c97df44 434
lypinator 0:bb348c97df44 435 /* Update the NAND controller state */
lypinator 0:bb348c97df44 436 hnand->State = HAL_NAND_STATE_READY;
lypinator 0:bb348c97df44 437
lypinator 0:bb348c97df44 438 /* Process unlocked */
lypinator 0:bb348c97df44 439 __HAL_UNLOCK(hnand);
lypinator 0:bb348c97df44 440
lypinator 0:bb348c97df44 441 return HAL_OK;
lypinator 0:bb348c97df44 442
lypinator 0:bb348c97df44 443 }
lypinator 0:bb348c97df44 444
lypinator 0:bb348c97df44 445 /**
lypinator 0:bb348c97df44 446 * @brief Configure the device: Enter the physical parameters of the device
lypinator 0:bb348c97df44 447 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 448 * the configuration information for NAND module.
lypinator 0:bb348c97df44 449 * @param pDeviceConfig pointer to NAND_DeviceConfigTypeDef structure
lypinator 0:bb348c97df44 450 * @retval HAL status
lypinator 0:bb348c97df44 451 */
lypinator 0:bb348c97df44 452 HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig)
lypinator 0:bb348c97df44 453 {
lypinator 0:bb348c97df44 454 hnand->Config.PageSize = pDeviceConfig->PageSize;
lypinator 0:bb348c97df44 455 hnand->Config.SpareAreaSize = pDeviceConfig->SpareAreaSize;
lypinator 0:bb348c97df44 456 hnand->Config.BlockSize = pDeviceConfig->BlockSize;
lypinator 0:bb348c97df44 457 hnand->Config.BlockNbr = pDeviceConfig->BlockNbr;
lypinator 0:bb348c97df44 458 hnand->Config.PlaneSize = pDeviceConfig->PlaneSize;
lypinator 0:bb348c97df44 459 hnand->Config.PlaneNbr = pDeviceConfig->PlaneNbr;
lypinator 0:bb348c97df44 460 hnand->Config.ExtraCommandEnable = pDeviceConfig->ExtraCommandEnable;
lypinator 0:bb348c97df44 461
lypinator 0:bb348c97df44 462 return HAL_OK;
lypinator 0:bb348c97df44 463 }
lypinator 0:bb348c97df44 464
lypinator 0:bb348c97df44 465 /**
lypinator 0:bb348c97df44 466 * @brief Read Page(s) from NAND memory block (8-bits addressing)
lypinator 0:bb348c97df44 467 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 468 * the configuration information for NAND module.
lypinator 0:bb348c97df44 469 * @param pAddress pointer to NAND address structure
lypinator 0:bb348c97df44 470 * @param pBuffer pointer to destination read buffer
lypinator 0:bb348c97df44 471 * @param NumPageToRead number of pages to read from block
lypinator 0:bb348c97df44 472 * @retval HAL status
lypinator 0:bb348c97df44 473 */
lypinator 0:bb348c97df44 474 HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead)
lypinator 0:bb348c97df44 475 {
lypinator 0:bb348c97df44 476 __IO uint32_t index = 0U;
lypinator 0:bb348c97df44 477 uint32_t tickstart = 0U;
lypinator 0:bb348c97df44 478 uint32_t deviceaddress = 0U, size = 0U, numPagesRead = 0U, nandaddress = 0U;
lypinator 0:bb348c97df44 479
lypinator 0:bb348c97df44 480 /* Process Locked */
lypinator 0:bb348c97df44 481 __HAL_LOCK(hnand);
lypinator 0:bb348c97df44 482
lypinator 0:bb348c97df44 483 /* Check the NAND controller state */
lypinator 0:bb348c97df44 484 if(hnand->State == HAL_NAND_STATE_BUSY)
lypinator 0:bb348c97df44 485 {
lypinator 0:bb348c97df44 486 return HAL_BUSY;
lypinator 0:bb348c97df44 487 }
lypinator 0:bb348c97df44 488
lypinator 0:bb348c97df44 489 /* Identify the device address */
lypinator 0:bb348c97df44 490 if(hnand->Init.NandBank == FMC_NAND_BANK2)
lypinator 0:bb348c97df44 491 {
lypinator 0:bb348c97df44 492 deviceaddress = NAND_DEVICE1;
lypinator 0:bb348c97df44 493 }
lypinator 0:bb348c97df44 494 else
lypinator 0:bb348c97df44 495 {
lypinator 0:bb348c97df44 496 deviceaddress = NAND_DEVICE2;
lypinator 0:bb348c97df44 497 }
lypinator 0:bb348c97df44 498
lypinator 0:bb348c97df44 499 /* Update the NAND controller state */
lypinator 0:bb348c97df44 500 hnand->State = HAL_NAND_STATE_BUSY;
lypinator 0:bb348c97df44 501
lypinator 0:bb348c97df44 502 /* NAND raw address calculation */
lypinator 0:bb348c97df44 503 nandaddress = ARRAY_ADDRESS(pAddress, hnand);
lypinator 0:bb348c97df44 504
lypinator 0:bb348c97df44 505 /* Page(s) read loop */
lypinator 0:bb348c97df44 506 while((NumPageToRead != 0U) && (nandaddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr))))
lypinator 0:bb348c97df44 507 {
lypinator 0:bb348c97df44 508 /* update the buffer size */
lypinator 0:bb348c97df44 509 size = (hnand->Config.PageSize) + ((hnand->Config.PageSize) * numPagesRead);
lypinator 0:bb348c97df44 510
lypinator 0:bb348c97df44 511 /* Send read page command sequence */
lypinator 0:bb348c97df44 512 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_A;
lypinator 0:bb348c97df44 513
lypinator 0:bb348c97df44 514 /* Cards with page size <= 512 bytes */
lypinator 0:bb348c97df44 515 if((hnand->Config.PageSize) <= 512U)
lypinator 0:bb348c97df44 516 {
lypinator 0:bb348c97df44 517 if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535U)
lypinator 0:bb348c97df44 518 {
lypinator 0:bb348c97df44 519 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 520 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 521 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 522 }
lypinator 0:bb348c97df44 523 else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */
lypinator 0:bb348c97df44 524 {
lypinator 0:bb348c97df44 525 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 526 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 527 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 528 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandaddress);
lypinator 0:bb348c97df44 529 }
lypinator 0:bb348c97df44 530 }
lypinator 0:bb348c97df44 531 else /* (hnand->Config.PageSize) > 512 */
lypinator 0:bb348c97df44 532 {
lypinator 0:bb348c97df44 533 if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535U)
lypinator 0:bb348c97df44 534 {
lypinator 0:bb348c97df44 535 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 536 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 537 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 538 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 539 }
lypinator 0:bb348c97df44 540 else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */
lypinator 0:bb348c97df44 541 {
lypinator 0:bb348c97df44 542 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 543 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 544 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 545 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 546 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandaddress);
lypinator 0:bb348c97df44 547 }
lypinator 0:bb348c97df44 548 }
lypinator 0:bb348c97df44 549
lypinator 0:bb348c97df44 550 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_TRUE1;
lypinator 0:bb348c97df44 551
lypinator 0:bb348c97df44 552 /* Check if an extra command is needed for reading pages */
lypinator 0:bb348c97df44 553 if(hnand->Config.ExtraCommandEnable == ENABLE)
lypinator 0:bb348c97df44 554 {
lypinator 0:bb348c97df44 555 /* Get tick */
lypinator 0:bb348c97df44 556 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 557
lypinator 0:bb348c97df44 558 /* Read status until NAND is ready */
lypinator 0:bb348c97df44 559 while(HAL_NAND_Read_Status(hnand) != NAND_READY)
lypinator 0:bb348c97df44 560 {
lypinator 0:bb348c97df44 561 if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
lypinator 0:bb348c97df44 562 {
lypinator 0:bb348c97df44 563 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 564 }
lypinator 0:bb348c97df44 565 }
lypinator 0:bb348c97df44 566
lypinator 0:bb348c97df44 567 /* Go back to read mode */
lypinator 0:bb348c97df44 568 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = ((uint8_t)0x00);
lypinator 0:bb348c97df44 569 __DSB();
lypinator 0:bb348c97df44 570 }
lypinator 0:bb348c97df44 571
lypinator 0:bb348c97df44 572 /* Get Data into Buffer */
lypinator 0:bb348c97df44 573 for(; index < size; index++)
lypinator 0:bb348c97df44 574 {
lypinator 0:bb348c97df44 575 *(uint8_t *)pBuffer++ = *(uint8_t *)deviceaddress;
lypinator 0:bb348c97df44 576 }
lypinator 0:bb348c97df44 577
lypinator 0:bb348c97df44 578 /* Increment read pages number */
lypinator 0:bb348c97df44 579 numPagesRead++;
lypinator 0:bb348c97df44 580
lypinator 0:bb348c97df44 581 /* Decrement pages to read */
lypinator 0:bb348c97df44 582 NumPageToRead--;
lypinator 0:bb348c97df44 583
lypinator 0:bb348c97df44 584 /* Increment the NAND address */
lypinator 0:bb348c97df44 585 nandaddress = (uint32_t)(nandaddress + 1U);
lypinator 0:bb348c97df44 586 }
lypinator 0:bb348c97df44 587
lypinator 0:bb348c97df44 588 /* Update the NAND controller state */
lypinator 0:bb348c97df44 589 hnand->State = HAL_NAND_STATE_READY;
lypinator 0:bb348c97df44 590
lypinator 0:bb348c97df44 591 /* Process unlocked */
lypinator 0:bb348c97df44 592 __HAL_UNLOCK(hnand);
lypinator 0:bb348c97df44 593
lypinator 0:bb348c97df44 594 return HAL_OK;
lypinator 0:bb348c97df44 595 }
lypinator 0:bb348c97df44 596
lypinator 0:bb348c97df44 597 /**
lypinator 0:bb348c97df44 598 * @brief Read Page(s) from NAND memory block (16-bits addressing)
lypinator 0:bb348c97df44 599 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 600 * the configuration information for NAND module.
lypinator 0:bb348c97df44 601 * @param pAddress pointer to NAND address structure
lypinator 0:bb348c97df44 602 * @param pBuffer pointer to destination read buffer. pBuffer should be 16bits aligned
lypinator 0:bb348c97df44 603 * @param NumPageToRead number of pages to read from block
lypinator 0:bb348c97df44 604 * @retval HAL status
lypinator 0:bb348c97df44 605 */
lypinator 0:bb348c97df44 606 HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToRead)
lypinator 0:bb348c97df44 607 {
lypinator 0:bb348c97df44 608 __IO uint32_t index = 0U;
lypinator 0:bb348c97df44 609 uint32_t tickstart = 0U;
lypinator 0:bb348c97df44 610 uint32_t deviceaddress = 0U, size = 0U, numPagesRead = 0U, nandaddress = 0U;
lypinator 0:bb348c97df44 611
lypinator 0:bb348c97df44 612 /* Process Locked */
lypinator 0:bb348c97df44 613 __HAL_LOCK(hnand);
lypinator 0:bb348c97df44 614
lypinator 0:bb348c97df44 615 /* Check the NAND controller state */
lypinator 0:bb348c97df44 616 if(hnand->State == HAL_NAND_STATE_BUSY)
lypinator 0:bb348c97df44 617 {
lypinator 0:bb348c97df44 618 return HAL_BUSY;
lypinator 0:bb348c97df44 619 }
lypinator 0:bb348c97df44 620
lypinator 0:bb348c97df44 621 /* Identify the device address */
lypinator 0:bb348c97df44 622 if(hnand->Init.NandBank == FMC_NAND_BANK2)
lypinator 0:bb348c97df44 623 {
lypinator 0:bb348c97df44 624 deviceaddress = NAND_DEVICE1;
lypinator 0:bb348c97df44 625 }
lypinator 0:bb348c97df44 626 else
lypinator 0:bb348c97df44 627 {
lypinator 0:bb348c97df44 628 deviceaddress = NAND_DEVICE2;
lypinator 0:bb348c97df44 629 }
lypinator 0:bb348c97df44 630
lypinator 0:bb348c97df44 631 /* Update the NAND controller state */
lypinator 0:bb348c97df44 632 hnand->State = HAL_NAND_STATE_BUSY;
lypinator 0:bb348c97df44 633
lypinator 0:bb348c97df44 634 /* NAND raw address calculation */
lypinator 0:bb348c97df44 635 nandaddress = ARRAY_ADDRESS(pAddress, hnand);
lypinator 0:bb348c97df44 636
lypinator 0:bb348c97df44 637 /* Page(s) read loop */
lypinator 0:bb348c97df44 638 while((NumPageToRead != 0U) && (nandaddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr))))
lypinator 0:bb348c97df44 639 {
lypinator 0:bb348c97df44 640 /* update the buffer size */
lypinator 0:bb348c97df44 641 size = (hnand->Config.PageSize) + ((hnand->Config.PageSize) * numPagesRead);
lypinator 0:bb348c97df44 642
lypinator 0:bb348c97df44 643 /* Send read page command sequence */
lypinator 0:bb348c97df44 644 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_A;
lypinator 0:bb348c97df44 645 __DSB();
lypinator 0:bb348c97df44 646
lypinator 0:bb348c97df44 647 /* Cards with page size <= 512 bytes */
lypinator 0:bb348c97df44 648 if((hnand->Config.PageSize) <= 512U)
lypinator 0:bb348c97df44 649 {
lypinator 0:bb348c97df44 650 if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535U)
lypinator 0:bb348c97df44 651 {
lypinator 0:bb348c97df44 652 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 653 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 654 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 655 }
lypinator 0:bb348c97df44 656 else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */
lypinator 0:bb348c97df44 657 {
lypinator 0:bb348c97df44 658 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 659 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 660 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 661 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandaddress);
lypinator 0:bb348c97df44 662 }
lypinator 0:bb348c97df44 663 }
lypinator 0:bb348c97df44 664 else /* (hnand->Config.PageSize) > 512 */
lypinator 0:bb348c97df44 665 {
lypinator 0:bb348c97df44 666 if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535U)
lypinator 0:bb348c97df44 667 {
lypinator 0:bb348c97df44 668 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 669 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 670 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 671 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 672 }
lypinator 0:bb348c97df44 673 else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */
lypinator 0:bb348c97df44 674 {
lypinator 0:bb348c97df44 675 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 676 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 677 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 678 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 679 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandaddress);
lypinator 0:bb348c97df44 680 }
lypinator 0:bb348c97df44 681 }
lypinator 0:bb348c97df44 682
lypinator 0:bb348c97df44 683 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_TRUE1;
lypinator 0:bb348c97df44 684
lypinator 0:bb348c97df44 685 if(hnand->Config.ExtraCommandEnable == ENABLE)
lypinator 0:bb348c97df44 686 {
lypinator 0:bb348c97df44 687 /* Get tick */
lypinator 0:bb348c97df44 688 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 689
lypinator 0:bb348c97df44 690 /* Read status until NAND is ready */
lypinator 0:bb348c97df44 691 while(HAL_NAND_Read_Status(hnand) != NAND_READY)
lypinator 0:bb348c97df44 692 {
lypinator 0:bb348c97df44 693 if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
lypinator 0:bb348c97df44 694 {
lypinator 0:bb348c97df44 695 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 696 }
lypinator 0:bb348c97df44 697 }
lypinator 0:bb348c97df44 698
lypinator 0:bb348c97df44 699 /* Go back to read mode */
lypinator 0:bb348c97df44 700 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = ((uint8_t)0x00);
lypinator 0:bb348c97df44 701 }
lypinator 0:bb348c97df44 702
lypinator 0:bb348c97df44 703 /* Get Data into Buffer */
lypinator 0:bb348c97df44 704 for(; index < size; index++)
lypinator 0:bb348c97df44 705 {
lypinator 0:bb348c97df44 706 *(uint16_t *)pBuffer++ = *(uint16_t *)deviceaddress;
lypinator 0:bb348c97df44 707 }
lypinator 0:bb348c97df44 708
lypinator 0:bb348c97df44 709 /* Increment read pages number */
lypinator 0:bb348c97df44 710 numPagesRead++;
lypinator 0:bb348c97df44 711
lypinator 0:bb348c97df44 712 /* Decrement pages to read */
lypinator 0:bb348c97df44 713 NumPageToRead--;
lypinator 0:bb348c97df44 714
lypinator 0:bb348c97df44 715 /* Increment the NAND address */
lypinator 0:bb348c97df44 716 nandaddress = (uint32_t)(nandaddress + 1U);
lypinator 0:bb348c97df44 717 }
lypinator 0:bb348c97df44 718
lypinator 0:bb348c97df44 719 /* Update the NAND controller state */
lypinator 0:bb348c97df44 720 hnand->State = HAL_NAND_STATE_READY;
lypinator 0:bb348c97df44 721
lypinator 0:bb348c97df44 722 /* Process unlocked */
lypinator 0:bb348c97df44 723 __HAL_UNLOCK(hnand);
lypinator 0:bb348c97df44 724
lypinator 0:bb348c97df44 725 return HAL_OK;
lypinator 0:bb348c97df44 726 }
lypinator 0:bb348c97df44 727
lypinator 0:bb348c97df44 728 /**
lypinator 0:bb348c97df44 729 * @brief Write Page(s) to NAND memory block (8-bits addressing)
lypinator 0:bb348c97df44 730 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 731 * the configuration information for NAND module.
lypinator 0:bb348c97df44 732 * @param pAddress pointer to NAND address structure
lypinator 0:bb348c97df44 733 * @param pBuffer pointer to source buffer to write
lypinator 0:bb348c97df44 734 * @param NumPageToWrite number of pages to write to block
lypinator 0:bb348c97df44 735 * @retval HAL status
lypinator 0:bb348c97df44 736 */
lypinator 0:bb348c97df44 737 HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite)
lypinator 0:bb348c97df44 738 {
lypinator 0:bb348c97df44 739 __IO uint32_t index = 0U;
lypinator 0:bb348c97df44 740 uint32_t tickstart = 0U;
lypinator 0:bb348c97df44 741 uint32_t deviceaddress = 0U, size = 0U, numPagesWritten = 0U, nandaddress = 0U;
lypinator 0:bb348c97df44 742
lypinator 0:bb348c97df44 743 /* Process Locked */
lypinator 0:bb348c97df44 744 __HAL_LOCK(hnand);
lypinator 0:bb348c97df44 745
lypinator 0:bb348c97df44 746 /* Check the NAND controller state */
lypinator 0:bb348c97df44 747 if(hnand->State == HAL_NAND_STATE_BUSY)
lypinator 0:bb348c97df44 748 {
lypinator 0:bb348c97df44 749 return HAL_BUSY;
lypinator 0:bb348c97df44 750 }
lypinator 0:bb348c97df44 751
lypinator 0:bb348c97df44 752 /* Identify the device address */
lypinator 0:bb348c97df44 753 if(hnand->Init.NandBank == FMC_NAND_BANK2)
lypinator 0:bb348c97df44 754 {
lypinator 0:bb348c97df44 755 deviceaddress = NAND_DEVICE1;
lypinator 0:bb348c97df44 756 }
lypinator 0:bb348c97df44 757 else
lypinator 0:bb348c97df44 758 {
lypinator 0:bb348c97df44 759 deviceaddress = NAND_DEVICE2;
lypinator 0:bb348c97df44 760 }
lypinator 0:bb348c97df44 761
lypinator 0:bb348c97df44 762 /* Update the NAND controller state */
lypinator 0:bb348c97df44 763 hnand->State = HAL_NAND_STATE_BUSY;
lypinator 0:bb348c97df44 764
lypinator 0:bb348c97df44 765 /* NAND raw address calculation */
lypinator 0:bb348c97df44 766 nandaddress = ARRAY_ADDRESS(pAddress, hnand);
lypinator 0:bb348c97df44 767
lypinator 0:bb348c97df44 768 /* Page(s) write loop */
lypinator 0:bb348c97df44 769 while((NumPageToWrite != 0U) && (nandaddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr))))
lypinator 0:bb348c97df44 770 {
lypinator 0:bb348c97df44 771 /* update the buffer size */
lypinator 0:bb348c97df44 772 size = hnand->Config.PageSize + ((hnand->Config.PageSize) * numPagesWritten);
lypinator 0:bb348c97df44 773
lypinator 0:bb348c97df44 774 /* Send write page command sequence */
lypinator 0:bb348c97df44 775 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_A;
lypinator 0:bb348c97df44 776 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE0;
lypinator 0:bb348c97df44 777
lypinator 0:bb348c97df44 778 /* Cards with page size <= 512 bytes */
lypinator 0:bb348c97df44 779 if((hnand->Config.PageSize) <= 512U)
lypinator 0:bb348c97df44 780 {
lypinator 0:bb348c97df44 781 if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535U)
lypinator 0:bb348c97df44 782 {
lypinator 0:bb348c97df44 783 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 784 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 785 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 786 }
lypinator 0:bb348c97df44 787 else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */
lypinator 0:bb348c97df44 788 {
lypinator 0:bb348c97df44 789 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 790 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 791 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 792 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandaddress);
lypinator 0:bb348c97df44 793 }
lypinator 0:bb348c97df44 794 }
lypinator 0:bb348c97df44 795 else /* (hnand->Config.PageSize) > 512 */
lypinator 0:bb348c97df44 796 {
lypinator 0:bb348c97df44 797 if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535U)
lypinator 0:bb348c97df44 798 {
lypinator 0:bb348c97df44 799 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 800 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 801 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 802 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 803 }
lypinator 0:bb348c97df44 804 else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */
lypinator 0:bb348c97df44 805 {
lypinator 0:bb348c97df44 806 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 807 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 808 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 809 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 810 __DSB();
lypinator 0:bb348c97df44 811 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandaddress);
lypinator 0:bb348c97df44 812 __DSB();
lypinator 0:bb348c97df44 813 }
lypinator 0:bb348c97df44 814 }
lypinator 0:bb348c97df44 815
lypinator 0:bb348c97df44 816
lypinator 0:bb348c97df44 817 /* Write data to memory */
lypinator 0:bb348c97df44 818 for(; index < size; index++)
lypinator 0:bb348c97df44 819 {
lypinator 0:bb348c97df44 820 *(__IO uint8_t *)deviceaddress = *(uint8_t *)pBuffer++;
lypinator 0:bb348c97df44 821 }
lypinator 0:bb348c97df44 822
lypinator 0:bb348c97df44 823 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE_TRUE1;
lypinator 0:bb348c97df44 824
lypinator 0:bb348c97df44 825 /* Read status until NAND is ready */
lypinator 0:bb348c97df44 826 while(HAL_NAND_Read_Status(hnand) != NAND_READY)
lypinator 0:bb348c97df44 827 {
lypinator 0:bb348c97df44 828 /* Get tick */
lypinator 0:bb348c97df44 829 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 830
lypinator 0:bb348c97df44 831 if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
lypinator 0:bb348c97df44 832 {
lypinator 0:bb348c97df44 833 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 834 }
lypinator 0:bb348c97df44 835 }
lypinator 0:bb348c97df44 836
lypinator 0:bb348c97df44 837 /* Increment written pages number */
lypinator 0:bb348c97df44 838 numPagesWritten++;
lypinator 0:bb348c97df44 839
lypinator 0:bb348c97df44 840 /* Decrement pages to write */
lypinator 0:bb348c97df44 841 NumPageToWrite--;
lypinator 0:bb348c97df44 842
lypinator 0:bb348c97df44 843 /* Increment the NAND address */
lypinator 0:bb348c97df44 844 nandaddress = (uint32_t)(nandaddress + 1U);
lypinator 0:bb348c97df44 845 }
lypinator 0:bb348c97df44 846
lypinator 0:bb348c97df44 847 /* Update the NAND controller state */
lypinator 0:bb348c97df44 848 hnand->State = HAL_NAND_STATE_READY;
lypinator 0:bb348c97df44 849
lypinator 0:bb348c97df44 850 /* Process unlocked */
lypinator 0:bb348c97df44 851 __HAL_UNLOCK(hnand);
lypinator 0:bb348c97df44 852
lypinator 0:bb348c97df44 853 return HAL_OK;
lypinator 0:bb348c97df44 854 }
lypinator 0:bb348c97df44 855
lypinator 0:bb348c97df44 856 /**
lypinator 0:bb348c97df44 857 * @brief Write Page(s) to NAND memory block (16-bits addressing)
lypinator 0:bb348c97df44 858 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 859 * the configuration information for NAND module.
lypinator 0:bb348c97df44 860 * @param pAddress pointer to NAND address structure
lypinator 0:bb348c97df44 861 * @param pBuffer pointer to source buffer to write. pBuffer should be 16bits aligned
lypinator 0:bb348c97df44 862 * @param NumPageToWrite number of pages to write to block
lypinator 0:bb348c97df44 863 * @retval HAL status
lypinator 0:bb348c97df44 864 */
lypinator 0:bb348c97df44 865 HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToWrite)
lypinator 0:bb348c97df44 866 {
lypinator 0:bb348c97df44 867 __IO uint32_t index = 0U;
lypinator 0:bb348c97df44 868 uint32_t tickstart = 0U;
lypinator 0:bb348c97df44 869 uint32_t deviceaddress = 0U, size = 0U, numPagesWritten = 0U, nandaddress = 0U;
lypinator 0:bb348c97df44 870
lypinator 0:bb348c97df44 871 /* Process Locked */
lypinator 0:bb348c97df44 872 __HAL_LOCK(hnand);
lypinator 0:bb348c97df44 873
lypinator 0:bb348c97df44 874 /* Check the NAND controller state */
lypinator 0:bb348c97df44 875 if(hnand->State == HAL_NAND_STATE_BUSY)
lypinator 0:bb348c97df44 876 {
lypinator 0:bb348c97df44 877 return HAL_BUSY;
lypinator 0:bb348c97df44 878 }
lypinator 0:bb348c97df44 879
lypinator 0:bb348c97df44 880 /* Identify the device address */
lypinator 0:bb348c97df44 881 if(hnand->Init.NandBank == FMC_NAND_BANK2)
lypinator 0:bb348c97df44 882 {
lypinator 0:bb348c97df44 883 deviceaddress = NAND_DEVICE1;
lypinator 0:bb348c97df44 884 }
lypinator 0:bb348c97df44 885 else
lypinator 0:bb348c97df44 886 {
lypinator 0:bb348c97df44 887 deviceaddress = NAND_DEVICE2;
lypinator 0:bb348c97df44 888 }
lypinator 0:bb348c97df44 889
lypinator 0:bb348c97df44 890 /* Update the NAND controller state */
lypinator 0:bb348c97df44 891 hnand->State = HAL_NAND_STATE_BUSY;
lypinator 0:bb348c97df44 892
lypinator 0:bb348c97df44 893 /* NAND raw address calculation */
lypinator 0:bb348c97df44 894 nandaddress = ARRAY_ADDRESS(pAddress, hnand);
lypinator 0:bb348c97df44 895
lypinator 0:bb348c97df44 896 /* Page(s) write loop */
lypinator 0:bb348c97df44 897 while((NumPageToWrite != 0U) && (nandaddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr))))
lypinator 0:bb348c97df44 898 {
lypinator 0:bb348c97df44 899 /* update the buffer size */
lypinator 0:bb348c97df44 900 size = (hnand->Config.PageSize) + ((hnand->Config.PageSize) * numPagesWritten);
lypinator 0:bb348c97df44 901
lypinator 0:bb348c97df44 902 /* Send write page command sequence */
lypinator 0:bb348c97df44 903 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_A;
lypinator 0:bb348c97df44 904 __DSB();
lypinator 0:bb348c97df44 905 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE0;
lypinator 0:bb348c97df44 906 __DSB();
lypinator 0:bb348c97df44 907
lypinator 0:bb348c97df44 908 /* Cards with page size <= 512 bytes */
lypinator 0:bb348c97df44 909 if((hnand->Config.PageSize) <= 512U)
lypinator 0:bb348c97df44 910 {
lypinator 0:bb348c97df44 911 if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535U)
lypinator 0:bb348c97df44 912 {
lypinator 0:bb348c97df44 913 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 914 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 915 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 916 }
lypinator 0:bb348c97df44 917 else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */
lypinator 0:bb348c97df44 918 {
lypinator 0:bb348c97df44 919 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 920 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 921 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 922 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandaddress);
lypinator 0:bb348c97df44 923 }
lypinator 0:bb348c97df44 924 }
lypinator 0:bb348c97df44 925 else /* (hnand->Config.PageSize) > 512 */
lypinator 0:bb348c97df44 926 {
lypinator 0:bb348c97df44 927 if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535U)
lypinator 0:bb348c97df44 928 {
lypinator 0:bb348c97df44 929 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 930 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 931 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 932 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 933 }
lypinator 0:bb348c97df44 934 else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */
lypinator 0:bb348c97df44 935 {
lypinator 0:bb348c97df44 936 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 937 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 938 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 939 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 940 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandaddress);
lypinator 0:bb348c97df44 941 }
lypinator 0:bb348c97df44 942 }
lypinator 0:bb348c97df44 943
lypinator 0:bb348c97df44 944 /* Write data to memory */
lypinator 0:bb348c97df44 945 for(; index < size; index++)
lypinator 0:bb348c97df44 946 {
lypinator 0:bb348c97df44 947 *(__IO uint16_t *)deviceaddress = *(uint16_t *)pBuffer++;
lypinator 0:bb348c97df44 948 }
lypinator 0:bb348c97df44 949
lypinator 0:bb348c97df44 950 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE_TRUE1;
lypinator 0:bb348c97df44 951
lypinator 0:bb348c97df44 952 /* Read status until NAND is ready */
lypinator 0:bb348c97df44 953 while(HAL_NAND_Read_Status(hnand) != NAND_READY)
lypinator 0:bb348c97df44 954 {
lypinator 0:bb348c97df44 955 /* Get tick */
lypinator 0:bb348c97df44 956 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 957
lypinator 0:bb348c97df44 958 if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
lypinator 0:bb348c97df44 959 {
lypinator 0:bb348c97df44 960 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 961 }
lypinator 0:bb348c97df44 962 }
lypinator 0:bb348c97df44 963
lypinator 0:bb348c97df44 964 /* Increment written pages number */
lypinator 0:bb348c97df44 965 numPagesWritten++;
lypinator 0:bb348c97df44 966
lypinator 0:bb348c97df44 967 /* Decrement pages to write */
lypinator 0:bb348c97df44 968 NumPageToWrite--;
lypinator 0:bb348c97df44 969
lypinator 0:bb348c97df44 970 /* Increment the NAND address */
lypinator 0:bb348c97df44 971 nandaddress = (uint32_t)(nandaddress + 1U);
lypinator 0:bb348c97df44 972 }
lypinator 0:bb348c97df44 973
lypinator 0:bb348c97df44 974 /* Update the NAND controller state */
lypinator 0:bb348c97df44 975 hnand->State = HAL_NAND_STATE_READY;
lypinator 0:bb348c97df44 976
lypinator 0:bb348c97df44 977 /* Process unlocked */
lypinator 0:bb348c97df44 978 __HAL_UNLOCK(hnand);
lypinator 0:bb348c97df44 979
lypinator 0:bb348c97df44 980 return HAL_OK;
lypinator 0:bb348c97df44 981 }
lypinator 0:bb348c97df44 982
lypinator 0:bb348c97df44 983 /**
lypinator 0:bb348c97df44 984 * @brief Read Spare area(s) from NAND memory
lypinator 0:bb348c97df44 985 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 986 * the configuration information for NAND module.
lypinator 0:bb348c97df44 987 * @param pAddress pointer to NAND address structure
lypinator 0:bb348c97df44 988 * @param pBuffer pointer to source buffer to write
lypinator 0:bb348c97df44 989 * @param NumSpareAreaToRead Number of spare area to read
lypinator 0:bb348c97df44 990 * @retval HAL status
lypinator 0:bb348c97df44 991 */
lypinator 0:bb348c97df44 992 HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead)
lypinator 0:bb348c97df44 993 {
lypinator 0:bb348c97df44 994 __IO uint32_t index = 0U;
lypinator 0:bb348c97df44 995 uint32_t tickstart = 0U;
lypinator 0:bb348c97df44 996 uint32_t deviceaddress = 0U, size = 0U, numSpareAreaRead = 0U, nandaddress = 0U, columnaddress = 0U;
lypinator 0:bb348c97df44 997
lypinator 0:bb348c97df44 998 /* Process Locked */
lypinator 0:bb348c97df44 999 __HAL_LOCK(hnand);
lypinator 0:bb348c97df44 1000
lypinator 0:bb348c97df44 1001 /* Check the NAND controller state */
lypinator 0:bb348c97df44 1002 if(hnand->State == HAL_NAND_STATE_BUSY)
lypinator 0:bb348c97df44 1003 {
lypinator 0:bb348c97df44 1004 return HAL_BUSY;
lypinator 0:bb348c97df44 1005 }
lypinator 0:bb348c97df44 1006
lypinator 0:bb348c97df44 1007 /* Identify the device address */
lypinator 0:bb348c97df44 1008 if(hnand->Init.NandBank == FMC_NAND_BANK2)
lypinator 0:bb348c97df44 1009 {
lypinator 0:bb348c97df44 1010 deviceaddress = NAND_DEVICE1;
lypinator 0:bb348c97df44 1011 }
lypinator 0:bb348c97df44 1012 else
lypinator 0:bb348c97df44 1013 {
lypinator 0:bb348c97df44 1014 deviceaddress = NAND_DEVICE2;
lypinator 0:bb348c97df44 1015 }
lypinator 0:bb348c97df44 1016
lypinator 0:bb348c97df44 1017 /* Update the NAND controller state */
lypinator 0:bb348c97df44 1018 hnand->State = HAL_NAND_STATE_BUSY;
lypinator 0:bb348c97df44 1019
lypinator 0:bb348c97df44 1020 /* NAND raw address calculation */
lypinator 0:bb348c97df44 1021 nandaddress = ARRAY_ADDRESS(pAddress, hnand);
lypinator 0:bb348c97df44 1022
lypinator 0:bb348c97df44 1023 /* Column in page address */
lypinator 0:bb348c97df44 1024 columnaddress = COLUMN_ADDRESS(hnand);
lypinator 0:bb348c97df44 1025
lypinator 0:bb348c97df44 1026 /* Spare area(s) read loop */
lypinator 0:bb348c97df44 1027 while((NumSpareAreaToRead != 0U) && (nandaddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr))))
lypinator 0:bb348c97df44 1028 {
lypinator 0:bb348c97df44 1029 /* update the buffer size */
lypinator 0:bb348c97df44 1030 size = (hnand->Config.SpareAreaSize) + ((hnand->Config.SpareAreaSize) * numSpareAreaRead);
lypinator 0:bb348c97df44 1031
lypinator 0:bb348c97df44 1032 /* Cards with page size <= 512 bytes */
lypinator 0:bb348c97df44 1033 if((hnand->Config.PageSize) <= 512U)
lypinator 0:bb348c97df44 1034 {
lypinator 0:bb348c97df44 1035 /* Send read spare area command sequence */
lypinator 0:bb348c97df44 1036 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_C;
lypinator 0:bb348c97df44 1037
lypinator 0:bb348c97df44 1038 if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535U)
lypinator 0:bb348c97df44 1039 {
lypinator 0:bb348c97df44 1040 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 1041 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1042 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1043 }
lypinator 0:bb348c97df44 1044 else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */
lypinator 0:bb348c97df44 1045 {
lypinator 0:bb348c97df44 1046 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 1047 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1048 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1049 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1050 }
lypinator 0:bb348c97df44 1051 }
lypinator 0:bb348c97df44 1052 else /* (hnand->Config.PageSize) > 512 */
lypinator 0:bb348c97df44 1053 {
lypinator 0:bb348c97df44 1054 /* Send read spare area command sequence */
lypinator 0:bb348c97df44 1055 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_A;
lypinator 0:bb348c97df44 1056
lypinator 0:bb348c97df44 1057 if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535U)
lypinator 0:bb348c97df44 1058 {
lypinator 0:bb348c97df44 1059 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = COLUMN_1ST_CYCLE(columnaddress);
lypinator 0:bb348c97df44 1060 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = COLUMN_2ND_CYCLE(columnaddress);
lypinator 0:bb348c97df44 1061 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1062 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1063 }
lypinator 0:bb348c97df44 1064 else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */
lypinator 0:bb348c97df44 1065 {
lypinator 0:bb348c97df44 1066 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = COLUMN_1ST_CYCLE(columnaddress);
lypinator 0:bb348c97df44 1067 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = COLUMN_2ND_CYCLE(columnaddress);
lypinator 0:bb348c97df44 1068 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1069 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1070 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1071 }
lypinator 0:bb348c97df44 1072 }
lypinator 0:bb348c97df44 1073
lypinator 0:bb348c97df44 1074 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_TRUE1;
lypinator 0:bb348c97df44 1075
lypinator 0:bb348c97df44 1076 if(hnand->Config.ExtraCommandEnable == ENABLE)
lypinator 0:bb348c97df44 1077 {
lypinator 0:bb348c97df44 1078 /* Get tick */
lypinator 0:bb348c97df44 1079 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 1080
lypinator 0:bb348c97df44 1081 /* Read status until NAND is ready */
lypinator 0:bb348c97df44 1082 while(HAL_NAND_Read_Status(hnand) != NAND_READY)
lypinator 0:bb348c97df44 1083 {
lypinator 0:bb348c97df44 1084 if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
lypinator 0:bb348c97df44 1085 {
lypinator 0:bb348c97df44 1086 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1087 }
lypinator 0:bb348c97df44 1088 }
lypinator 0:bb348c97df44 1089
lypinator 0:bb348c97df44 1090 /* Go back to read mode */
lypinator 0:bb348c97df44 1091 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = ((uint8_t)0x00);
lypinator 0:bb348c97df44 1092 }
lypinator 0:bb348c97df44 1093
lypinator 0:bb348c97df44 1094 /* Get Data into Buffer */
lypinator 0:bb348c97df44 1095 for(; index < size; index++)
lypinator 0:bb348c97df44 1096 {
lypinator 0:bb348c97df44 1097 *(uint8_t *)pBuffer++ = *(uint8_t *)deviceaddress;
lypinator 0:bb348c97df44 1098 }
lypinator 0:bb348c97df44 1099
lypinator 0:bb348c97df44 1100 /* Increment read spare areas number */
lypinator 0:bb348c97df44 1101 numSpareAreaRead++;
lypinator 0:bb348c97df44 1102
lypinator 0:bb348c97df44 1103 /* Decrement spare areas to read */
lypinator 0:bb348c97df44 1104 NumSpareAreaToRead--;
lypinator 0:bb348c97df44 1105
lypinator 0:bb348c97df44 1106 /* Increment the NAND address */
lypinator 0:bb348c97df44 1107 nandaddress = (uint32_t)(nandaddress + 1U);
lypinator 0:bb348c97df44 1108 }
lypinator 0:bb348c97df44 1109
lypinator 0:bb348c97df44 1110 /* Update the NAND controller state */
lypinator 0:bb348c97df44 1111 hnand->State = HAL_NAND_STATE_READY;
lypinator 0:bb348c97df44 1112
lypinator 0:bb348c97df44 1113 /* Process unlocked */
lypinator 0:bb348c97df44 1114 __HAL_UNLOCK(hnand);
lypinator 0:bb348c97df44 1115
lypinator 0:bb348c97df44 1116 return HAL_OK;
lypinator 0:bb348c97df44 1117 }
lypinator 0:bb348c97df44 1118
lypinator 0:bb348c97df44 1119 /**
lypinator 0:bb348c97df44 1120 * @brief Read Spare area(s) from NAND memory (16-bits addressing)
lypinator 0:bb348c97df44 1121 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1122 * the configuration information for NAND module.
lypinator 0:bb348c97df44 1123 * @param pAddress pointer to NAND address structure
lypinator 0:bb348c97df44 1124 * @param pBuffer pointer to source buffer to write. pBuffer should be 16bits aligned.
lypinator 0:bb348c97df44 1125 * @param NumSpareAreaToRead Number of spare area to read
lypinator 0:bb348c97df44 1126 * @retval HAL status
lypinator 0:bb348c97df44 1127 */
lypinator 0:bb348c97df44 1128 HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaToRead)
lypinator 0:bb348c97df44 1129 {
lypinator 0:bb348c97df44 1130 __IO uint32_t index = 0U;
lypinator 0:bb348c97df44 1131 uint32_t tickstart = 0U;
lypinator 0:bb348c97df44 1132 uint32_t deviceaddress = 0U, size = 0U, numSpareAreaRead = 0U, nandaddress = 0U, columnaddress = 0U;
lypinator 0:bb348c97df44 1133
lypinator 0:bb348c97df44 1134 /* Process Locked */
lypinator 0:bb348c97df44 1135 __HAL_LOCK(hnand);
lypinator 0:bb348c97df44 1136
lypinator 0:bb348c97df44 1137 /* Check the NAND controller state */
lypinator 0:bb348c97df44 1138 if(hnand->State == HAL_NAND_STATE_BUSY)
lypinator 0:bb348c97df44 1139 {
lypinator 0:bb348c97df44 1140 return HAL_BUSY;
lypinator 0:bb348c97df44 1141 }
lypinator 0:bb348c97df44 1142
lypinator 0:bb348c97df44 1143 /* Identify the device address */
lypinator 0:bb348c97df44 1144 if(hnand->Init.NandBank == FMC_NAND_BANK2)
lypinator 0:bb348c97df44 1145 {
lypinator 0:bb348c97df44 1146 deviceaddress = NAND_DEVICE1;
lypinator 0:bb348c97df44 1147 }
lypinator 0:bb348c97df44 1148 else
lypinator 0:bb348c97df44 1149 {
lypinator 0:bb348c97df44 1150 deviceaddress = NAND_DEVICE2;
lypinator 0:bb348c97df44 1151 }
lypinator 0:bb348c97df44 1152
lypinator 0:bb348c97df44 1153 /* Update the NAND controller state */
lypinator 0:bb348c97df44 1154 hnand->State = HAL_NAND_STATE_BUSY;
lypinator 0:bb348c97df44 1155
lypinator 0:bb348c97df44 1156 /* NAND raw address calculation */
lypinator 0:bb348c97df44 1157 nandaddress = ARRAY_ADDRESS(pAddress, hnand);
lypinator 0:bb348c97df44 1158
lypinator 0:bb348c97df44 1159 /* Column in page address */
lypinator 0:bb348c97df44 1160 columnaddress = (uint32_t)(COLUMN_ADDRESS(hnand) * 2U);
lypinator 0:bb348c97df44 1161
lypinator 0:bb348c97df44 1162 /* Spare area(s) read loop */
lypinator 0:bb348c97df44 1163 while((NumSpareAreaToRead != 0U) && (nandaddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr))))
lypinator 0:bb348c97df44 1164 {
lypinator 0:bb348c97df44 1165 /* update the buffer size */
lypinator 0:bb348c97df44 1166 size = (hnand->Config.SpareAreaSize) + ((hnand->Config.SpareAreaSize) * numSpareAreaRead);
lypinator 0:bb348c97df44 1167
lypinator 0:bb348c97df44 1168 /* Cards with page size <= 512 bytes */
lypinator 0:bb348c97df44 1169 if((hnand->Config.PageSize) <= 512U)
lypinator 0:bb348c97df44 1170 {
lypinator 0:bb348c97df44 1171 /* Send read spare area command sequence */
lypinator 0:bb348c97df44 1172 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_C;
lypinator 0:bb348c97df44 1173
lypinator 0:bb348c97df44 1174 if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535U)
lypinator 0:bb348c97df44 1175 {
lypinator 0:bb348c97df44 1176 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 1177 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1178 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1179 }
lypinator 0:bb348c97df44 1180 else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */
lypinator 0:bb348c97df44 1181 {
lypinator 0:bb348c97df44 1182 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 1183 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1184 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1185 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1186 }
lypinator 0:bb348c97df44 1187 }
lypinator 0:bb348c97df44 1188 else /* (hnand->Config.PageSize) > 512 */
lypinator 0:bb348c97df44 1189 {
lypinator 0:bb348c97df44 1190 /* Send read spare area command sequence */
lypinator 0:bb348c97df44 1191 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_A;
lypinator 0:bb348c97df44 1192
lypinator 0:bb348c97df44 1193 if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535U)
lypinator 0:bb348c97df44 1194 {
lypinator 0:bb348c97df44 1195 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = COLUMN_1ST_CYCLE(columnaddress);
lypinator 0:bb348c97df44 1196 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = COLUMN_2ND_CYCLE(columnaddress);
lypinator 0:bb348c97df44 1197 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1198 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1199 }
lypinator 0:bb348c97df44 1200 else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */
lypinator 0:bb348c97df44 1201 {
lypinator 0:bb348c97df44 1202 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = COLUMN_1ST_CYCLE(columnaddress);
lypinator 0:bb348c97df44 1203 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = COLUMN_2ND_CYCLE(columnaddress);
lypinator 0:bb348c97df44 1204 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1205 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1206 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1207 }
lypinator 0:bb348c97df44 1208 }
lypinator 0:bb348c97df44 1209
lypinator 0:bb348c97df44 1210 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_TRUE1;
lypinator 0:bb348c97df44 1211
lypinator 0:bb348c97df44 1212 if(hnand->Config.ExtraCommandEnable == ENABLE)
lypinator 0:bb348c97df44 1213 {
lypinator 0:bb348c97df44 1214 /* Get tick */
lypinator 0:bb348c97df44 1215 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 1216
lypinator 0:bb348c97df44 1217 /* Read status until NAND is ready */
lypinator 0:bb348c97df44 1218 while(HAL_NAND_Read_Status(hnand) != NAND_READY)
lypinator 0:bb348c97df44 1219 {
lypinator 0:bb348c97df44 1220 if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
lypinator 0:bb348c97df44 1221 {
lypinator 0:bb348c97df44 1222 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1223 }
lypinator 0:bb348c97df44 1224 }
lypinator 0:bb348c97df44 1225
lypinator 0:bb348c97df44 1226 /* Go back to read mode */
lypinator 0:bb348c97df44 1227 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = ((uint8_t)0x00);
lypinator 0:bb348c97df44 1228 }
lypinator 0:bb348c97df44 1229
lypinator 0:bb348c97df44 1230 /* Get Data into Buffer */
lypinator 0:bb348c97df44 1231 for(; index < size; index++)
lypinator 0:bb348c97df44 1232 {
lypinator 0:bb348c97df44 1233 *(uint16_t *)pBuffer++ = *(uint16_t *)deviceaddress;
lypinator 0:bb348c97df44 1234 }
lypinator 0:bb348c97df44 1235
lypinator 0:bb348c97df44 1236 /* Increment read spare areas number */
lypinator 0:bb348c97df44 1237 numSpareAreaRead++;
lypinator 0:bb348c97df44 1238
lypinator 0:bb348c97df44 1239 /* Decrement spare areas to read */
lypinator 0:bb348c97df44 1240 NumSpareAreaToRead--;
lypinator 0:bb348c97df44 1241
lypinator 0:bb348c97df44 1242 /* Increment the NAND address */
lypinator 0:bb348c97df44 1243 nandaddress = (uint32_t)(nandaddress + 1U);
lypinator 0:bb348c97df44 1244 }
lypinator 0:bb348c97df44 1245
lypinator 0:bb348c97df44 1246 /* Update the NAND controller state */
lypinator 0:bb348c97df44 1247 hnand->State = HAL_NAND_STATE_READY;
lypinator 0:bb348c97df44 1248
lypinator 0:bb348c97df44 1249 /* Process unlocked */
lypinator 0:bb348c97df44 1250 __HAL_UNLOCK(hnand);
lypinator 0:bb348c97df44 1251
lypinator 0:bb348c97df44 1252 return HAL_OK;
lypinator 0:bb348c97df44 1253 }
lypinator 0:bb348c97df44 1254
lypinator 0:bb348c97df44 1255 /**
lypinator 0:bb348c97df44 1256 * @brief Write Spare area(s) to NAND memory
lypinator 0:bb348c97df44 1257 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1258 * the configuration information for NAND module.
lypinator 0:bb348c97df44 1259 * @param pAddress pointer to NAND address structure
lypinator 0:bb348c97df44 1260 * @param pBuffer pointer to source buffer to write
lypinator 0:bb348c97df44 1261 * @param NumSpareAreaTowrite number of spare areas to write to block
lypinator 0:bb348c97df44 1262 * @retval HAL status
lypinator 0:bb348c97df44 1263 */
lypinator 0:bb348c97df44 1264 HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite)
lypinator 0:bb348c97df44 1265 {
lypinator 0:bb348c97df44 1266 __IO uint32_t index = 0U;
lypinator 0:bb348c97df44 1267 uint32_t tickstart = 0U;
lypinator 0:bb348c97df44 1268 uint32_t deviceaddress = 0U, size = 0U, numSpareAreaWritten = 0U, nandaddress = 0U, columnaddress = 0U;
lypinator 0:bb348c97df44 1269
lypinator 0:bb348c97df44 1270 /* Process Locked */
lypinator 0:bb348c97df44 1271 __HAL_LOCK(hnand);
lypinator 0:bb348c97df44 1272
lypinator 0:bb348c97df44 1273 /* Check the NAND controller state */
lypinator 0:bb348c97df44 1274 if(hnand->State == HAL_NAND_STATE_BUSY)
lypinator 0:bb348c97df44 1275 {
lypinator 0:bb348c97df44 1276 return HAL_BUSY;
lypinator 0:bb348c97df44 1277 }
lypinator 0:bb348c97df44 1278
lypinator 0:bb348c97df44 1279 /* Identify the device address */
lypinator 0:bb348c97df44 1280 if(hnand->Init.NandBank == FMC_NAND_BANK2)
lypinator 0:bb348c97df44 1281 {
lypinator 0:bb348c97df44 1282 deviceaddress = NAND_DEVICE1;
lypinator 0:bb348c97df44 1283 }
lypinator 0:bb348c97df44 1284 else
lypinator 0:bb348c97df44 1285 {
lypinator 0:bb348c97df44 1286 deviceaddress = NAND_DEVICE2;
lypinator 0:bb348c97df44 1287 }
lypinator 0:bb348c97df44 1288
lypinator 0:bb348c97df44 1289 /* Update the FMC_NAND controller state */
lypinator 0:bb348c97df44 1290 hnand->State = HAL_NAND_STATE_BUSY;
lypinator 0:bb348c97df44 1291
lypinator 0:bb348c97df44 1292 /* Page address calculation */
lypinator 0:bb348c97df44 1293 nandaddress = ARRAY_ADDRESS(pAddress, hnand);
lypinator 0:bb348c97df44 1294
lypinator 0:bb348c97df44 1295 /* Column in page address */
lypinator 0:bb348c97df44 1296 columnaddress = COLUMN_ADDRESS(hnand);
lypinator 0:bb348c97df44 1297
lypinator 0:bb348c97df44 1298 /* Spare area(s) write loop */
lypinator 0:bb348c97df44 1299 while((NumSpareAreaTowrite != 0U) && (nandaddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr))))
lypinator 0:bb348c97df44 1300 {
lypinator 0:bb348c97df44 1301 /* update the buffer size */
lypinator 0:bb348c97df44 1302 size = (hnand->Config.SpareAreaSize) + ((hnand->Config.SpareAreaSize) * numSpareAreaWritten);
lypinator 0:bb348c97df44 1303
lypinator 0:bb348c97df44 1304 /* Cards with page size <= 512 bytes */
lypinator 0:bb348c97df44 1305 if((hnand->Config.PageSize) <= 512U)
lypinator 0:bb348c97df44 1306 {
lypinator 0:bb348c97df44 1307 /* Send write Spare area command sequence */
lypinator 0:bb348c97df44 1308 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_C;
lypinator 0:bb348c97df44 1309 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE0;
lypinator 0:bb348c97df44 1310
lypinator 0:bb348c97df44 1311 if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535U)
lypinator 0:bb348c97df44 1312 {
lypinator 0:bb348c97df44 1313 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 1314 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1315 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1316 }
lypinator 0:bb348c97df44 1317 else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */
lypinator 0:bb348c97df44 1318 {
lypinator 0:bb348c97df44 1319 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 1320 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1321 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1322 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1323 }
lypinator 0:bb348c97df44 1324 }
lypinator 0:bb348c97df44 1325 else /* (hnand->Config.PageSize) > 512 */
lypinator 0:bb348c97df44 1326 {
lypinator 0:bb348c97df44 1327 /* Send write Spare area command sequence */
lypinator 0:bb348c97df44 1328 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_A;
lypinator 0:bb348c97df44 1329 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE0;
lypinator 0:bb348c97df44 1330
lypinator 0:bb348c97df44 1331 if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535U)
lypinator 0:bb348c97df44 1332 {
lypinator 0:bb348c97df44 1333 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = COLUMN_1ST_CYCLE(columnaddress);
lypinator 0:bb348c97df44 1334 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = COLUMN_2ND_CYCLE(columnaddress);
lypinator 0:bb348c97df44 1335 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1336 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1337 }
lypinator 0:bb348c97df44 1338 else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */
lypinator 0:bb348c97df44 1339 {
lypinator 0:bb348c97df44 1340 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = COLUMN_1ST_CYCLE(columnaddress);
lypinator 0:bb348c97df44 1341 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = COLUMN_2ND_CYCLE(columnaddress);
lypinator 0:bb348c97df44 1342 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1343 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1344 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1345 }
lypinator 0:bb348c97df44 1346 }
lypinator 0:bb348c97df44 1347
lypinator 0:bb348c97df44 1348 /* Write data to memory */
lypinator 0:bb348c97df44 1349 for(; index < size; index++)
lypinator 0:bb348c97df44 1350 {
lypinator 0:bb348c97df44 1351 *(__IO uint8_t *)deviceaddress = *(uint8_t *)pBuffer++;
lypinator 0:bb348c97df44 1352 }
lypinator 0:bb348c97df44 1353
lypinator 0:bb348c97df44 1354 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE_TRUE1;
lypinator 0:bb348c97df44 1355
lypinator 0:bb348c97df44 1356 /* Get tick */
lypinator 0:bb348c97df44 1357 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 1358
lypinator 0:bb348c97df44 1359 /* Read status until NAND is ready */
lypinator 0:bb348c97df44 1360 while(HAL_NAND_Read_Status(hnand) != NAND_READY)
lypinator 0:bb348c97df44 1361 {
lypinator 0:bb348c97df44 1362 if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
lypinator 0:bb348c97df44 1363 {
lypinator 0:bb348c97df44 1364 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1365 }
lypinator 0:bb348c97df44 1366 }
lypinator 0:bb348c97df44 1367
lypinator 0:bb348c97df44 1368 /* Increment written spare areas number */
lypinator 0:bb348c97df44 1369 numSpareAreaWritten++;
lypinator 0:bb348c97df44 1370
lypinator 0:bb348c97df44 1371 /* Decrement spare areas to write */
lypinator 0:bb348c97df44 1372 NumSpareAreaTowrite--;
lypinator 0:bb348c97df44 1373
lypinator 0:bb348c97df44 1374 /* Increment the NAND address */
lypinator 0:bb348c97df44 1375 nandaddress = (uint32_t)(nandaddress + 1U);
lypinator 0:bb348c97df44 1376 }
lypinator 0:bb348c97df44 1377
lypinator 0:bb348c97df44 1378 /* Update the NAND controller state */
lypinator 0:bb348c97df44 1379 hnand->State = HAL_NAND_STATE_READY;
lypinator 0:bb348c97df44 1380
lypinator 0:bb348c97df44 1381 /* Process unlocked */
lypinator 0:bb348c97df44 1382 __HAL_UNLOCK(hnand);
lypinator 0:bb348c97df44 1383
lypinator 0:bb348c97df44 1384 return HAL_OK;
lypinator 0:bb348c97df44 1385 }
lypinator 0:bb348c97df44 1386
lypinator 0:bb348c97df44 1387 /**
lypinator 0:bb348c97df44 1388 * @brief Write Spare area(s) to NAND memory (16-bits addressing)
lypinator 0:bb348c97df44 1389 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1390 * the configuration information for NAND module.
lypinator 0:bb348c97df44 1391 * @param pAddress pointer to NAND address structure
lypinator 0:bb348c97df44 1392 * @param pBuffer pointer to source buffer to write. pBuffer should be 16bits aligned.
lypinator 0:bb348c97df44 1393 * @param NumSpareAreaTowrite number of spare areas to write to block
lypinator 0:bb348c97df44 1394 * @retval HAL status
lypinator 0:bb348c97df44 1395 */
lypinator 0:bb348c97df44 1396 HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaTowrite)
lypinator 0:bb348c97df44 1397 {
lypinator 0:bb348c97df44 1398 __IO uint32_t index = 0U;
lypinator 0:bb348c97df44 1399 uint32_t tickstart = 0U;
lypinator 0:bb348c97df44 1400 uint32_t deviceaddress = 0U, size = 0U, numSpareAreaWritten = 0U, nandaddress = 0U, columnaddress = 0U;
lypinator 0:bb348c97df44 1401
lypinator 0:bb348c97df44 1402 /* Process Locked */
lypinator 0:bb348c97df44 1403 __HAL_LOCK(hnand);
lypinator 0:bb348c97df44 1404
lypinator 0:bb348c97df44 1405 /* Check the NAND controller state */
lypinator 0:bb348c97df44 1406 if(hnand->State == HAL_NAND_STATE_BUSY)
lypinator 0:bb348c97df44 1407 {
lypinator 0:bb348c97df44 1408 return HAL_BUSY;
lypinator 0:bb348c97df44 1409 }
lypinator 0:bb348c97df44 1410
lypinator 0:bb348c97df44 1411 /* Identify the device address */
lypinator 0:bb348c97df44 1412 if(hnand->Init.NandBank == FMC_NAND_BANK2)
lypinator 0:bb348c97df44 1413 {
lypinator 0:bb348c97df44 1414 deviceaddress = NAND_DEVICE1;
lypinator 0:bb348c97df44 1415 }
lypinator 0:bb348c97df44 1416 else
lypinator 0:bb348c97df44 1417 {
lypinator 0:bb348c97df44 1418 deviceaddress = NAND_DEVICE2;
lypinator 0:bb348c97df44 1419 }
lypinator 0:bb348c97df44 1420
lypinator 0:bb348c97df44 1421 /* Update the FMC_NAND controller state */
lypinator 0:bb348c97df44 1422 hnand->State = HAL_NAND_STATE_BUSY;
lypinator 0:bb348c97df44 1423
lypinator 0:bb348c97df44 1424 /* NAND raw address calculation */
lypinator 0:bb348c97df44 1425 nandaddress = ARRAY_ADDRESS(pAddress, hnand);
lypinator 0:bb348c97df44 1426
lypinator 0:bb348c97df44 1427 /* Column in page address */
lypinator 0:bb348c97df44 1428 columnaddress = (uint32_t)(COLUMN_ADDRESS(hnand) * 2U);
lypinator 0:bb348c97df44 1429
lypinator 0:bb348c97df44 1430 /* Spare area(s) write loop */
lypinator 0:bb348c97df44 1431 while((NumSpareAreaTowrite != 0U) && (nandaddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr))))
lypinator 0:bb348c97df44 1432 {
lypinator 0:bb348c97df44 1433 /* update the buffer size */
lypinator 0:bb348c97df44 1434 size = (hnand->Config.SpareAreaSize) + ((hnand->Config.SpareAreaSize) * numSpareAreaWritten);
lypinator 0:bb348c97df44 1435
lypinator 0:bb348c97df44 1436 /* Cards with page size <= 512 bytes */
lypinator 0:bb348c97df44 1437 if((hnand->Config.PageSize) <= 512U)
lypinator 0:bb348c97df44 1438 {
lypinator 0:bb348c97df44 1439 /* Send write Spare area command sequence */
lypinator 0:bb348c97df44 1440 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_C;
lypinator 0:bb348c97df44 1441 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE0;
lypinator 0:bb348c97df44 1442
lypinator 0:bb348c97df44 1443 if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535U)
lypinator 0:bb348c97df44 1444 {
lypinator 0:bb348c97df44 1445 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 1446 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1447 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1448 }
lypinator 0:bb348c97df44 1449 else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */
lypinator 0:bb348c97df44 1450 {
lypinator 0:bb348c97df44 1451 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
lypinator 0:bb348c97df44 1452 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1453 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1454 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1455 }
lypinator 0:bb348c97df44 1456 }
lypinator 0:bb348c97df44 1457 else /* (hnand->Config.PageSize) > 512 */
lypinator 0:bb348c97df44 1458 {
lypinator 0:bb348c97df44 1459 /* Send write Spare area command sequence */
lypinator 0:bb348c97df44 1460 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_A;
lypinator 0:bb348c97df44 1461 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE0;
lypinator 0:bb348c97df44 1462
lypinator 0:bb348c97df44 1463 if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535U)
lypinator 0:bb348c97df44 1464 {
lypinator 0:bb348c97df44 1465 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = COLUMN_1ST_CYCLE(columnaddress);
lypinator 0:bb348c97df44 1466 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = COLUMN_2ND_CYCLE(columnaddress);
lypinator 0:bb348c97df44 1467 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1468 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1469 }
lypinator 0:bb348c97df44 1470 else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */
lypinator 0:bb348c97df44 1471 {
lypinator 0:bb348c97df44 1472 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = COLUMN_1ST_CYCLE(columnaddress);
lypinator 0:bb348c97df44 1473 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = COLUMN_2ND_CYCLE(columnaddress);
lypinator 0:bb348c97df44 1474 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1475 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1476 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandaddress);
lypinator 0:bb348c97df44 1477 }
lypinator 0:bb348c97df44 1478 }
lypinator 0:bb348c97df44 1479
lypinator 0:bb348c97df44 1480 /* Write data to memory */
lypinator 0:bb348c97df44 1481 for(; index < size; index++)
lypinator 0:bb348c97df44 1482 {
lypinator 0:bb348c97df44 1483 *(__IO uint16_t *)deviceaddress = *(uint16_t *)pBuffer++;
lypinator 0:bb348c97df44 1484 }
lypinator 0:bb348c97df44 1485
lypinator 0:bb348c97df44 1486 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE_TRUE1;
lypinator 0:bb348c97df44 1487
lypinator 0:bb348c97df44 1488 /* Read status until NAND is ready */
lypinator 0:bb348c97df44 1489 while(HAL_NAND_Read_Status(hnand) != NAND_READY)
lypinator 0:bb348c97df44 1490 {
lypinator 0:bb348c97df44 1491 /* Get tick */
lypinator 0:bb348c97df44 1492 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 1493
lypinator 0:bb348c97df44 1494 if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
lypinator 0:bb348c97df44 1495 {
lypinator 0:bb348c97df44 1496 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1497 }
lypinator 0:bb348c97df44 1498 }
lypinator 0:bb348c97df44 1499
lypinator 0:bb348c97df44 1500 /* Increment written spare areas number */
lypinator 0:bb348c97df44 1501 numSpareAreaWritten++;
lypinator 0:bb348c97df44 1502
lypinator 0:bb348c97df44 1503 /* Decrement spare areas to write */
lypinator 0:bb348c97df44 1504 NumSpareAreaTowrite--;
lypinator 0:bb348c97df44 1505
lypinator 0:bb348c97df44 1506 /* Increment the NAND address */
lypinator 0:bb348c97df44 1507 nandaddress = (uint32_t)(nandaddress + 1U);
lypinator 0:bb348c97df44 1508 }
lypinator 0:bb348c97df44 1509
lypinator 0:bb348c97df44 1510 /* Update the NAND controller state */
lypinator 0:bb348c97df44 1511 hnand->State = HAL_NAND_STATE_READY;
lypinator 0:bb348c97df44 1512
lypinator 0:bb348c97df44 1513 /* Process unlocked */
lypinator 0:bb348c97df44 1514 __HAL_UNLOCK(hnand);
lypinator 0:bb348c97df44 1515
lypinator 0:bb348c97df44 1516 return HAL_OK;
lypinator 0:bb348c97df44 1517 }
lypinator 0:bb348c97df44 1518
lypinator 0:bb348c97df44 1519 /**
lypinator 0:bb348c97df44 1520 * @brief NAND memory Block erase
lypinator 0:bb348c97df44 1521 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1522 * the configuration information for NAND module.
lypinator 0:bb348c97df44 1523 * @param pAddress pointer to NAND address structure
lypinator 0:bb348c97df44 1524 * @retval HAL status
lypinator 0:bb348c97df44 1525 */
lypinator 0:bb348c97df44 1526 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress)
lypinator 0:bb348c97df44 1527 {
lypinator 0:bb348c97df44 1528 uint32_t deviceaddress = 0U;
lypinator 0:bb348c97df44 1529 uint32_t tickstart = 0U;
lypinator 0:bb348c97df44 1530
lypinator 0:bb348c97df44 1531 /* Process Locked */
lypinator 0:bb348c97df44 1532 __HAL_LOCK(hnand);
lypinator 0:bb348c97df44 1533
lypinator 0:bb348c97df44 1534 /* Check the NAND controller state */
lypinator 0:bb348c97df44 1535 if(hnand->State == HAL_NAND_STATE_BUSY)
lypinator 0:bb348c97df44 1536 {
lypinator 0:bb348c97df44 1537 return HAL_BUSY;
lypinator 0:bb348c97df44 1538 }
lypinator 0:bb348c97df44 1539
lypinator 0:bb348c97df44 1540 /* Identify the device address */
lypinator 0:bb348c97df44 1541 if(hnand->Init.NandBank == FMC_NAND_BANK2)
lypinator 0:bb348c97df44 1542 {
lypinator 0:bb348c97df44 1543 deviceaddress = NAND_DEVICE1;
lypinator 0:bb348c97df44 1544 }
lypinator 0:bb348c97df44 1545 else
lypinator 0:bb348c97df44 1546 {
lypinator 0:bb348c97df44 1547 deviceaddress = NAND_DEVICE2;
lypinator 0:bb348c97df44 1548 }
lypinator 0:bb348c97df44 1549
lypinator 0:bb348c97df44 1550 /* Update the NAND controller state */
lypinator 0:bb348c97df44 1551 hnand->State = HAL_NAND_STATE_BUSY;
lypinator 0:bb348c97df44 1552
lypinator 0:bb348c97df44 1553 /* Send Erase block command sequence */
lypinator 0:bb348c97df44 1554 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_ERASE0;
lypinator 0:bb348c97df44 1555
lypinator 0:bb348c97df44 1556 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
lypinator 0:bb348c97df44 1557 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
lypinator 0:bb348c97df44 1558 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
lypinator 0:bb348c97df44 1559
lypinator 0:bb348c97df44 1560 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_ERASE1;
lypinator 0:bb348c97df44 1561
lypinator 0:bb348c97df44 1562 /* Update the NAND controller state */
lypinator 0:bb348c97df44 1563 hnand->State = HAL_NAND_STATE_READY;
lypinator 0:bb348c97df44 1564
lypinator 0:bb348c97df44 1565 /* Get tick */
lypinator 0:bb348c97df44 1566 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 1567
lypinator 0:bb348c97df44 1568 /* Read status until NAND is ready */
lypinator 0:bb348c97df44 1569 while(HAL_NAND_Read_Status(hnand) != NAND_READY)
lypinator 0:bb348c97df44 1570 {
lypinator 0:bb348c97df44 1571 if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
lypinator 0:bb348c97df44 1572 {
lypinator 0:bb348c97df44 1573 /* Process unlocked */
lypinator 0:bb348c97df44 1574 __HAL_UNLOCK(hnand);
lypinator 0:bb348c97df44 1575
lypinator 0:bb348c97df44 1576 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1577 }
lypinator 0:bb348c97df44 1578 }
lypinator 0:bb348c97df44 1579
lypinator 0:bb348c97df44 1580 /* Process unlocked */
lypinator 0:bb348c97df44 1581 __HAL_UNLOCK(hnand);
lypinator 0:bb348c97df44 1582
lypinator 0:bb348c97df44 1583 return HAL_OK;
lypinator 0:bb348c97df44 1584 }
lypinator 0:bb348c97df44 1585
lypinator 0:bb348c97df44 1586 /**
lypinator 0:bb348c97df44 1587 * @brief NAND memory read status
lypinator 0:bb348c97df44 1588 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1589 * the configuration information for NAND module.
lypinator 0:bb348c97df44 1590 * @retval NAND status
lypinator 0:bb348c97df44 1591 */
lypinator 0:bb348c97df44 1592 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand)
lypinator 0:bb348c97df44 1593 {
lypinator 0:bb348c97df44 1594 uint32_t data = 0U;
lypinator 0:bb348c97df44 1595 uint32_t deviceaddress = 0U;
lypinator 0:bb348c97df44 1596
lypinator 0:bb348c97df44 1597 /* Identify the device address */
lypinator 0:bb348c97df44 1598 if(hnand->Init.NandBank == FMC_NAND_BANK2)
lypinator 0:bb348c97df44 1599 {
lypinator 0:bb348c97df44 1600 deviceaddress = NAND_DEVICE1;
lypinator 0:bb348c97df44 1601 }
lypinator 0:bb348c97df44 1602 else
lypinator 0:bb348c97df44 1603 {
lypinator 0:bb348c97df44 1604 deviceaddress = NAND_DEVICE2;
lypinator 0:bb348c97df44 1605 }
lypinator 0:bb348c97df44 1606
lypinator 0:bb348c97df44 1607 /* Send Read status operation command */
lypinator 0:bb348c97df44 1608 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_STATUS;
lypinator 0:bb348c97df44 1609
lypinator 0:bb348c97df44 1610 /* Read status register data */
lypinator 0:bb348c97df44 1611 data = *(__IO uint8_t *)deviceaddress;
lypinator 0:bb348c97df44 1612
lypinator 0:bb348c97df44 1613 /* Return the status */
lypinator 0:bb348c97df44 1614 if((data & NAND_ERROR) == NAND_ERROR)
lypinator 0:bb348c97df44 1615 {
lypinator 0:bb348c97df44 1616 return NAND_ERROR;
lypinator 0:bb348c97df44 1617 }
lypinator 0:bb348c97df44 1618 else if((data & NAND_READY) == NAND_READY)
lypinator 0:bb348c97df44 1619 {
lypinator 0:bb348c97df44 1620 return NAND_READY;
lypinator 0:bb348c97df44 1621 }
lypinator 0:bb348c97df44 1622
lypinator 0:bb348c97df44 1623 return NAND_BUSY;
lypinator 0:bb348c97df44 1624 }
lypinator 0:bb348c97df44 1625
lypinator 0:bb348c97df44 1626 /**
lypinator 0:bb348c97df44 1627 * @brief Increment the NAND memory address
lypinator 0:bb348c97df44 1628 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1629 * the configuration information for NAND module.
lypinator 0:bb348c97df44 1630 * @param pAddress pointer to NAND address structure
lypinator 0:bb348c97df44 1631 * @retval The new status of the increment address operation. It can be:
lypinator 0:bb348c97df44 1632 * - NAND_VALID_ADDRESS: When the new address is valid address
lypinator 0:bb348c97df44 1633 * - NAND_INVALID_ADDRESS: When the new address is invalid address
lypinator 0:bb348c97df44 1634 */
lypinator 0:bb348c97df44 1635 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress)
lypinator 0:bb348c97df44 1636 {
lypinator 0:bb348c97df44 1637 uint32_t status = NAND_VALID_ADDRESS;
lypinator 0:bb348c97df44 1638
lypinator 0:bb348c97df44 1639 /* Increment page address */
lypinator 0:bb348c97df44 1640 pAddress->Page++;
lypinator 0:bb348c97df44 1641
lypinator 0:bb348c97df44 1642 /* Check NAND address is valid */
lypinator 0:bb348c97df44 1643 if(pAddress->Page == hnand->Config.BlockSize)
lypinator 0:bb348c97df44 1644 {
lypinator 0:bb348c97df44 1645 pAddress->Page = 0U;
lypinator 0:bb348c97df44 1646 pAddress->Block++;
lypinator 0:bb348c97df44 1647
lypinator 0:bb348c97df44 1648 if(pAddress->Block == hnand->Config.PlaneSize)
lypinator 0:bb348c97df44 1649 {
lypinator 0:bb348c97df44 1650 pAddress->Block = 0U;
lypinator 0:bb348c97df44 1651 pAddress->Plane++;
lypinator 0:bb348c97df44 1652
lypinator 0:bb348c97df44 1653 if(pAddress->Plane == (hnand->Config.PlaneNbr))
lypinator 0:bb348c97df44 1654 {
lypinator 0:bb348c97df44 1655 status = NAND_INVALID_ADDRESS;
lypinator 0:bb348c97df44 1656 }
lypinator 0:bb348c97df44 1657 }
lypinator 0:bb348c97df44 1658 }
lypinator 0:bb348c97df44 1659
lypinator 0:bb348c97df44 1660 return (status);
lypinator 0:bb348c97df44 1661 }
lypinator 0:bb348c97df44 1662 /**
lypinator 0:bb348c97df44 1663 * @}
lypinator 0:bb348c97df44 1664 */
lypinator 0:bb348c97df44 1665
lypinator 0:bb348c97df44 1666 /** @defgroup NAND_Exported_Functions_Group3 Peripheral Control functions
lypinator 0:bb348c97df44 1667 * @brief management functions
lypinator 0:bb348c97df44 1668 *
lypinator 0:bb348c97df44 1669 @verbatim
lypinator 0:bb348c97df44 1670 ==============================================================================
lypinator 0:bb348c97df44 1671 ##### NAND Control functions #####
lypinator 0:bb348c97df44 1672 ==============================================================================
lypinator 0:bb348c97df44 1673 [..]
lypinator 0:bb348c97df44 1674 This subsection provides a set of functions allowing to control dynamically
lypinator 0:bb348c97df44 1675 the NAND interface.
lypinator 0:bb348c97df44 1676
lypinator 0:bb348c97df44 1677 @endverbatim
lypinator 0:bb348c97df44 1678 * @{
lypinator 0:bb348c97df44 1679 */
lypinator 0:bb348c97df44 1680
lypinator 0:bb348c97df44 1681
lypinator 0:bb348c97df44 1682 /**
lypinator 0:bb348c97df44 1683 * @brief Enables dynamically NAND ECC feature.
lypinator 0:bb348c97df44 1684 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1685 * the configuration information for NAND module.
lypinator 0:bb348c97df44 1686 * @retval HAL status
lypinator 0:bb348c97df44 1687 */
lypinator 0:bb348c97df44 1688 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand)
lypinator 0:bb348c97df44 1689 {
lypinator 0:bb348c97df44 1690 /* Check the NAND controller state */
lypinator 0:bb348c97df44 1691 if(hnand->State == HAL_NAND_STATE_BUSY)
lypinator 0:bb348c97df44 1692 {
lypinator 0:bb348c97df44 1693 return HAL_BUSY;
lypinator 0:bb348c97df44 1694 }
lypinator 0:bb348c97df44 1695
lypinator 0:bb348c97df44 1696 /* Update the NAND state */
lypinator 0:bb348c97df44 1697 hnand->State = HAL_NAND_STATE_BUSY;
lypinator 0:bb348c97df44 1698
lypinator 0:bb348c97df44 1699 /* Enable ECC feature */
lypinator 0:bb348c97df44 1700 FMC_NAND_ECC_Enable(hnand->Instance, hnand->Init.NandBank);
lypinator 0:bb348c97df44 1701
lypinator 0:bb348c97df44 1702 /* Update the NAND state */
lypinator 0:bb348c97df44 1703 hnand->State = HAL_NAND_STATE_READY;
lypinator 0:bb348c97df44 1704
lypinator 0:bb348c97df44 1705 return HAL_OK;
lypinator 0:bb348c97df44 1706 }
lypinator 0:bb348c97df44 1707
lypinator 0:bb348c97df44 1708 /**
lypinator 0:bb348c97df44 1709 * @brief Disables dynamically FMC_NAND ECC feature.
lypinator 0:bb348c97df44 1710 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1711 * the configuration information for NAND module.
lypinator 0:bb348c97df44 1712 * @retval HAL status
lypinator 0:bb348c97df44 1713 */
lypinator 0:bb348c97df44 1714 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand)
lypinator 0:bb348c97df44 1715 {
lypinator 0:bb348c97df44 1716 /* Check the NAND controller state */
lypinator 0:bb348c97df44 1717 if(hnand->State == HAL_NAND_STATE_BUSY)
lypinator 0:bb348c97df44 1718 {
lypinator 0:bb348c97df44 1719 return HAL_BUSY;
lypinator 0:bb348c97df44 1720 }
lypinator 0:bb348c97df44 1721
lypinator 0:bb348c97df44 1722 /* Update the NAND state */
lypinator 0:bb348c97df44 1723 hnand->State = HAL_NAND_STATE_BUSY;
lypinator 0:bb348c97df44 1724
lypinator 0:bb348c97df44 1725 /* Disable ECC feature */
lypinator 0:bb348c97df44 1726 FMC_NAND_ECC_Disable(hnand->Instance, hnand->Init.NandBank);
lypinator 0:bb348c97df44 1727
lypinator 0:bb348c97df44 1728 /* Update the NAND state */
lypinator 0:bb348c97df44 1729 hnand->State = HAL_NAND_STATE_READY;
lypinator 0:bb348c97df44 1730
lypinator 0:bb348c97df44 1731 return HAL_OK;
lypinator 0:bb348c97df44 1732 }
lypinator 0:bb348c97df44 1733
lypinator 0:bb348c97df44 1734 /**
lypinator 0:bb348c97df44 1735 * @brief Disables dynamically NAND ECC feature.
lypinator 0:bb348c97df44 1736 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1737 * the configuration information for NAND module.
lypinator 0:bb348c97df44 1738 * @param ECCval pointer to ECC value
lypinator 0:bb348c97df44 1739 * @param Timeout maximum timeout to wait
lypinator 0:bb348c97df44 1740 * @retval HAL status
lypinator 0:bb348c97df44 1741 */
lypinator 0:bb348c97df44 1742 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout)
lypinator 0:bb348c97df44 1743 {
lypinator 0:bb348c97df44 1744 HAL_StatusTypeDef status = HAL_OK;
lypinator 0:bb348c97df44 1745
lypinator 0:bb348c97df44 1746 /* Check the NAND controller state */
lypinator 0:bb348c97df44 1747 if(hnand->State == HAL_NAND_STATE_BUSY)
lypinator 0:bb348c97df44 1748 {
lypinator 0:bb348c97df44 1749 return HAL_BUSY;
lypinator 0:bb348c97df44 1750 }
lypinator 0:bb348c97df44 1751
lypinator 0:bb348c97df44 1752 /* Update the NAND state */
lypinator 0:bb348c97df44 1753 hnand->State = HAL_NAND_STATE_BUSY;
lypinator 0:bb348c97df44 1754
lypinator 0:bb348c97df44 1755 /* Get NAND ECC value */
lypinator 0:bb348c97df44 1756 status = FMC_NAND_GetECC(hnand->Instance, ECCval, hnand->Init.NandBank, Timeout);
lypinator 0:bb348c97df44 1757
lypinator 0:bb348c97df44 1758 /* Update the NAND state */
lypinator 0:bb348c97df44 1759 hnand->State = HAL_NAND_STATE_READY;
lypinator 0:bb348c97df44 1760
lypinator 0:bb348c97df44 1761 return status;
lypinator 0:bb348c97df44 1762 }
lypinator 0:bb348c97df44 1763
lypinator 0:bb348c97df44 1764 /**
lypinator 0:bb348c97df44 1765 * @}
lypinator 0:bb348c97df44 1766 */
lypinator 0:bb348c97df44 1767
lypinator 0:bb348c97df44 1768
lypinator 0:bb348c97df44 1769 /** @defgroup NAND_Exported_Functions_Group4 Peripheral State functions
lypinator 0:bb348c97df44 1770 * @brief Peripheral State functions
lypinator 0:bb348c97df44 1771 *
lypinator 0:bb348c97df44 1772 @verbatim
lypinator 0:bb348c97df44 1773 ==============================================================================
lypinator 0:bb348c97df44 1774 ##### NAND State functions #####
lypinator 0:bb348c97df44 1775 ==============================================================================
lypinator 0:bb348c97df44 1776 [..]
lypinator 0:bb348c97df44 1777 This subsection permits to get in run-time the status of the NAND controller
lypinator 0:bb348c97df44 1778 and the data flow.
lypinator 0:bb348c97df44 1779
lypinator 0:bb348c97df44 1780 @endverbatim
lypinator 0:bb348c97df44 1781 * @{
lypinator 0:bb348c97df44 1782 */
lypinator 0:bb348c97df44 1783
lypinator 0:bb348c97df44 1784 /**
lypinator 0:bb348c97df44 1785 * @brief return the NAND state
lypinator 0:bb348c97df44 1786 * @param hnand pointer to a NAND_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1787 * the configuration information for NAND module.
lypinator 0:bb348c97df44 1788 * @retval HAL state
lypinator 0:bb348c97df44 1789 */
lypinator 0:bb348c97df44 1790 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand)
lypinator 0:bb348c97df44 1791 {
lypinator 0:bb348c97df44 1792 return hnand->State;
lypinator 0:bb348c97df44 1793 }
lypinator 0:bb348c97df44 1794
lypinator 0:bb348c97df44 1795 /**
lypinator 0:bb348c97df44 1796 * @}
lypinator 0:bb348c97df44 1797 */
lypinator 0:bb348c97df44 1798
lypinator 0:bb348c97df44 1799 /**
lypinator 0:bb348c97df44 1800 * @}
lypinator 0:bb348c97df44 1801 */
lypinator 0:bb348c97df44 1802
lypinator 0:bb348c97df44 1803 /**
lypinator 0:bb348c97df44 1804 * @}
lypinator 0:bb348c97df44 1805 */
lypinator 0:bb348c97df44 1806
lypinator 0:bb348c97df44 1807 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
lypinator 0:bb348c97df44 1808 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\
lypinator 0:bb348c97df44 1809 STM32F446xx || STM32F469xx || STM32F479xx */
lypinator 0:bb348c97df44 1810 #endif /* HAL_NAND_MODULE_ENABLED */
lypinator 0:bb348c97df44 1811
lypinator 0:bb348c97df44 1812 /**
lypinator 0:bb348c97df44 1813 * @}
lypinator 0:bb348c97df44 1814 */
lypinator 0:bb348c97df44 1815
lypinator 0:bb348c97df44 1816 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/