xeye_ atsu / Mbed 2 deprecated I2S_AIC23B_RiceGolomb

パラメータを適応変化させる事により圧縮率を向上させた動的ライス・ゴロム符号を利用した可逆圧縮方式。圧縮ソフト、圧縮率のMATLABシミュレーションは詳細はInterface誌2011年8月号に掲載されるRX62Nマイコン連動特集にて掲載予定。

Dependencies:   mbed

I2S_Example/core_cm3.c@0:d920d64db582, 2011-03-30 (annotated)

Committer:
lynxeyed_atsu
Date:
Wed Mar 30 06:05:24 2011 +0000
Revision:
0:d920d64db582
alpha

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lynxeyed_atsu 0:d920d64db582 1 /**************************************************************************//**
lynxeyed_atsu 0:d920d64db582 2 * @file core_cm3.c
lynxeyed_atsu 0:d920d64db582 3 * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
lynxeyed_atsu 0:d920d64db582 4 * @version V1.30
lynxeyed_atsu 0:d920d64db582 5 * @date 30. October 2009
lynxeyed_atsu 0:d920d64db582 6 *
lynxeyed_atsu 0:d920d64db582 7 * @note
lynxeyed_atsu 0:d920d64db582 8 * Copyright (C) 2009 ARM Limited. All rights reserved.
lynxeyed_atsu 0:d920d64db582 9 *
lynxeyed_atsu 0:d920d64db582 10 * @par
lynxeyed_atsu 0:d920d64db582 11 * ARM Limited (ARM) is supplying this software for use with Cortex-M
lynxeyed_atsu 0:d920d64db582 12 * processor based microcontrollers. This file can be freely distributed
lynxeyed_atsu 0:d920d64db582 13 * within development tools that are supporting such ARM based processors.
lynxeyed_atsu 0:d920d64db582 14 *
lynxeyed_atsu 0:d920d64db582 15 * @par
lynxeyed_atsu 0:d920d64db582 16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
lynxeyed_atsu 0:d920d64db582 17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
lynxeyed_atsu 0:d920d64db582 18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
lynxeyed_atsu 0:d920d64db582 19 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
lynxeyed_atsu 0:d920d64db582 20 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
lynxeyed_atsu 0:d920d64db582 21 *
lynxeyed_atsu 0:d920d64db582 22 ******************************************************************************/
lynxeyed_atsu 0:d920d64db582 23
lynxeyed_atsu 0:d920d64db582 24 #include <stdint.h>
lynxeyed_atsu 0:d920d64db582 25
lynxeyed_atsu 0:d920d64db582 26
lynxeyed_atsu 0:d920d64db582 27 /** @addtogroup CMSIS
lynxeyed_atsu 0:d920d64db582 28 * @{
lynxeyed_atsu 0:d920d64db582 29 */
lynxeyed_atsu 0:d920d64db582 30
lynxeyed_atsu 0:d920d64db582 31 /* define compiler specific symbols */
lynxeyed_atsu 0:d920d64db582 32 #if defined ( __CC_ARM )
lynxeyed_atsu 0:d920d64db582 33 #define __ASM __asm /*!< asm keyword for ARM Compiler */
lynxeyed_atsu 0:d920d64db582 34 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
lynxeyed_atsu 0:d920d64db582 35
lynxeyed_atsu 0:d920d64db582 36 #elif defined ( __ICCARM__ )
lynxeyed_atsu 0:d920d64db582 37 #define __ASM __asm /*!< asm keyword for IAR Compiler */
lynxeyed_atsu 0:d920d64db582 38 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
lynxeyed_atsu 0:d920d64db582 39
lynxeyed_atsu 0:d920d64db582 40 #elif defined ( __GNUC__ )
lynxeyed_atsu 0:d920d64db582 41 #define __ASM __asm /*!< asm keyword for GNU Compiler */
lynxeyed_atsu 0:d920d64db582 42 #define __INLINE inline /*!< inline keyword for GNU Compiler */
lynxeyed_atsu 0:d920d64db582 43
lynxeyed_atsu 0:d920d64db582 44 #elif defined ( __TASKING__ )
lynxeyed_atsu 0:d920d64db582 45 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
lynxeyed_atsu 0:d920d64db582 46 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
lynxeyed_atsu 0:d920d64db582 47
lynxeyed_atsu 0:d920d64db582 48 #endif
lynxeyed_atsu 0:d920d64db582 49
lynxeyed_atsu 0:d920d64db582 50
lynxeyed_atsu 0:d920d64db582 51 /* ################### Compiler specific Intrinsics ########################### */
lynxeyed_atsu 0:d920d64db582 52
lynxeyed_atsu 0:d920d64db582 53 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
lynxeyed_atsu 0:d920d64db582 54 /* ARM armcc specific functions */
lynxeyed_atsu 0:d920d64db582 55
lynxeyed_atsu 0:d920d64db582 56 /**
lynxeyed_atsu 0:d920d64db582 57 * @brief Return the Process Stack Pointer
lynxeyed_atsu 0:d920d64db582 58 *
lynxeyed_atsu 0:d920d64db582 59 * @return ProcessStackPointer
lynxeyed_atsu 0:d920d64db582 60 *
lynxeyed_atsu 0:d920d64db582 61 * Return the actual process stack pointer
lynxeyed_atsu 0:d920d64db582 62 */
lynxeyed_atsu 0:d920d64db582 63 __ASM uint32_t __get_PSP(void)
lynxeyed_atsu 0:d920d64db582 64 {
lynxeyed_atsu 0:d920d64db582 65 mrs r0, psp
lynxeyed_atsu 0:d920d64db582 66 bx lr
lynxeyed_atsu 0:d920d64db582 67 }
lynxeyed_atsu 0:d920d64db582 68
lynxeyed_atsu 0:d920d64db582 69 /**
lynxeyed_atsu 0:d920d64db582 70 * @brief Set the Process Stack Pointer
lynxeyed_atsu 0:d920d64db582 71 *
lynxeyed_atsu 0:d920d64db582 72 * @param topOfProcStack Process Stack Pointer
lynxeyed_atsu 0:d920d64db582 73 *
lynxeyed_atsu 0:d920d64db582 74 * Assign the value ProcessStackPointer to the MSP
lynxeyed_atsu 0:d920d64db582 75 * (process stack pointer) Cortex processor register
lynxeyed_atsu 0:d920d64db582 76 */
lynxeyed_atsu 0:d920d64db582 77 __ASM void __set_PSP(uint32_t topOfProcStack)
lynxeyed_atsu 0:d920d64db582 78 {
lynxeyed_atsu 0:d920d64db582 79 msr psp, r0
lynxeyed_atsu 0:d920d64db582 80 bx lr
lynxeyed_atsu 0:d920d64db582 81 }
lynxeyed_atsu 0:d920d64db582 82
lynxeyed_atsu 0:d920d64db582 83 /**
lynxeyed_atsu 0:d920d64db582 84 * @brief Return the Main Stack Pointer
lynxeyed_atsu 0:d920d64db582 85 *
lynxeyed_atsu 0:d920d64db582 86 * @return Main Stack Pointer
lynxeyed_atsu 0:d920d64db582 87 *
lynxeyed_atsu 0:d920d64db582 88 * Return the current value of the MSP (main stack pointer)
lynxeyed_atsu 0:d920d64db582 89 * Cortex processor register
lynxeyed_atsu 0:d920d64db582 90 */
lynxeyed_atsu 0:d920d64db582 91 __ASM uint32_t __get_MSP(void)
lynxeyed_atsu 0:d920d64db582 92 {
lynxeyed_atsu 0:d920d64db582 93 mrs r0, msp
lynxeyed_atsu 0:d920d64db582 94 bx lr
lynxeyed_atsu 0:d920d64db582 95 }
lynxeyed_atsu 0:d920d64db582 96
lynxeyed_atsu 0:d920d64db582 97 /**
lynxeyed_atsu 0:d920d64db582 98 * @brief Set the Main Stack Pointer
lynxeyed_atsu 0:d920d64db582 99 *
lynxeyed_atsu 0:d920d64db582 100 * @param topOfMainStack Main Stack Pointer
lynxeyed_atsu 0:d920d64db582 101 *
lynxeyed_atsu 0:d920d64db582 102 * Assign the value mainStackPointer to the MSP
lynxeyed_atsu 0:d920d64db582 103 * (main stack pointer) Cortex processor register
lynxeyed_atsu 0:d920d64db582 104 */
lynxeyed_atsu 0:d920d64db582 105 __ASM void __set_MSP(uint32_t mainStackPointer)
lynxeyed_atsu 0:d920d64db582 106 {
lynxeyed_atsu 0:d920d64db582 107 msr msp, r0
lynxeyed_atsu 0:d920d64db582 108 bx lr
lynxeyed_atsu 0:d920d64db582 109 }
lynxeyed_atsu 0:d920d64db582 110
lynxeyed_atsu 0:d920d64db582 111 /**
lynxeyed_atsu 0:d920d64db582 112 * @brief Reverse byte order in unsigned short value
lynxeyed_atsu 0:d920d64db582 113 *
lynxeyed_atsu 0:d920d64db582 114 * @param value value to reverse
lynxeyed_atsu 0:d920d64db582 115 * @return reversed value
lynxeyed_atsu 0:d920d64db582 116 *
lynxeyed_atsu 0:d920d64db582 117 * Reverse byte order in unsigned short value
lynxeyed_atsu 0:d920d64db582 118 */
lynxeyed_atsu 0:d920d64db582 119 __ASM uint32_t __REV16(uint16_t value)
lynxeyed_atsu 0:d920d64db582 120 {
lynxeyed_atsu 0:d920d64db582 121 rev16 r0, r0
lynxeyed_atsu 0:d920d64db582 122 bx lr
lynxeyed_atsu 0:d920d64db582 123 }
lynxeyed_atsu 0:d920d64db582 124
lynxeyed_atsu 0:d920d64db582 125 /**
lynxeyed_atsu 0:d920d64db582 126 * @brief Reverse byte order in signed short value with sign extension to integer
lynxeyed_atsu 0:d920d64db582 127 *
lynxeyed_atsu 0:d920d64db582 128 * @param value value to reverse
lynxeyed_atsu 0:d920d64db582 129 * @return reversed value
lynxeyed_atsu 0:d920d64db582 130 *
lynxeyed_atsu 0:d920d64db582 131 * Reverse byte order in signed short value with sign extension to integer
lynxeyed_atsu 0:d920d64db582 132 */
lynxeyed_atsu 0:d920d64db582 133 __ASM int32_t __REVSH(int16_t value)
lynxeyed_atsu 0:d920d64db582 134 {
lynxeyed_atsu 0:d920d64db582 135 revsh r0, r0
lynxeyed_atsu 0:d920d64db582 136 bx lr
lynxeyed_atsu 0:d920d64db582 137 }
lynxeyed_atsu 0:d920d64db582 138
lynxeyed_atsu 0:d920d64db582 139
lynxeyed_atsu 0:d920d64db582 140 #if (__ARMCC_VERSION < 400000)
lynxeyed_atsu 0:d920d64db582 141
lynxeyed_atsu 0:d920d64db582 142 /**
lynxeyed_atsu 0:d920d64db582 143 * @brief Remove the exclusive lock created by ldrex
lynxeyed_atsu 0:d920d64db582 144 *
lynxeyed_atsu 0:d920d64db582 145 * Removes the exclusive lock which is created by ldrex.
lynxeyed_atsu 0:d920d64db582 146 */
lynxeyed_atsu 0:d920d64db582 147 __ASM void __CLREX(void)
lynxeyed_atsu 0:d920d64db582 148 {
lynxeyed_atsu 0:d920d64db582 149 clrex
lynxeyed_atsu 0:d920d64db582 150 }
lynxeyed_atsu 0:d920d64db582 151
lynxeyed_atsu 0:d920d64db582 152 /**
lynxeyed_atsu 0:d920d64db582 153 * @brief Return the Base Priority value
lynxeyed_atsu 0:d920d64db582 154 *
lynxeyed_atsu 0:d920d64db582 155 * @return BasePriority
lynxeyed_atsu 0:d920d64db582 156 *
lynxeyed_atsu 0:d920d64db582 157 * Return the content of the base priority register
lynxeyed_atsu 0:d920d64db582 158 */
lynxeyed_atsu 0:d920d64db582 159 __ASM uint32_t __get_BASEPRI(void)
lynxeyed_atsu 0:d920d64db582 160 {
lynxeyed_atsu 0:d920d64db582 161 mrs r0, basepri
lynxeyed_atsu 0:d920d64db582 162 bx lr
lynxeyed_atsu 0:d920d64db582 163 }
lynxeyed_atsu 0:d920d64db582 164
lynxeyed_atsu 0:d920d64db582 165 /**
lynxeyed_atsu 0:d920d64db582 166 * @brief Set the Base Priority value
lynxeyed_atsu 0:d920d64db582 167 *
lynxeyed_atsu 0:d920d64db582 168 * @param basePri BasePriority
lynxeyed_atsu 0:d920d64db582 169 *
lynxeyed_atsu 0:d920d64db582 170 * Set the base priority register
lynxeyed_atsu 0:d920d64db582 171 */
lynxeyed_atsu 0:d920d64db582 172 __ASM void __set_BASEPRI(uint32_t basePri)
lynxeyed_atsu 0:d920d64db582 173 {
lynxeyed_atsu 0:d920d64db582 174 msr basepri, r0
lynxeyed_atsu 0:d920d64db582 175 bx lr
lynxeyed_atsu 0:d920d64db582 176 }
lynxeyed_atsu 0:d920d64db582 177
lynxeyed_atsu 0:d920d64db582 178 /**
lynxeyed_atsu 0:d920d64db582 179 * @brief Return the Priority Mask value
lynxeyed_atsu 0:d920d64db582 180 *
lynxeyed_atsu 0:d920d64db582 181 * @return PriMask
lynxeyed_atsu 0:d920d64db582 182 *
lynxeyed_atsu 0:d920d64db582 183 * Return state of the priority mask bit from the priority mask register
lynxeyed_atsu 0:d920d64db582 184 */
lynxeyed_atsu 0:d920d64db582 185 __ASM uint32_t __get_PRIMASK(void)
lynxeyed_atsu 0:d920d64db582 186 {
lynxeyed_atsu 0:d920d64db582 187 mrs r0, primask
lynxeyed_atsu 0:d920d64db582 188 bx lr
lynxeyed_atsu 0:d920d64db582 189 }
lynxeyed_atsu 0:d920d64db582 190
lynxeyed_atsu 0:d920d64db582 191 /**
lynxeyed_atsu 0:d920d64db582 192 * @brief Set the Priority Mask value
lynxeyed_atsu 0:d920d64db582 193 *
lynxeyed_atsu 0:d920d64db582 194 * @param priMask PriMask
lynxeyed_atsu 0:d920d64db582 195 *
lynxeyed_atsu 0:d920d64db582 196 * Set the priority mask bit in the priority mask register
lynxeyed_atsu 0:d920d64db582 197 */
lynxeyed_atsu 0:d920d64db582 198 __ASM void __set_PRIMASK(uint32_t priMask)
lynxeyed_atsu 0:d920d64db582 199 {
lynxeyed_atsu 0:d920d64db582 200 msr primask, r0
lynxeyed_atsu 0:d920d64db582 201 bx lr
lynxeyed_atsu 0:d920d64db582 202 }
lynxeyed_atsu 0:d920d64db582 203
lynxeyed_atsu 0:d920d64db582 204 /**
lynxeyed_atsu 0:d920d64db582 205 * @brief Return the Fault Mask value
lynxeyed_atsu 0:d920d64db582 206 *
lynxeyed_atsu 0:d920d64db582 207 * @return FaultMask
lynxeyed_atsu 0:d920d64db582 208 *
lynxeyed_atsu 0:d920d64db582 209 * Return the content of the fault mask register
lynxeyed_atsu 0:d920d64db582 210 */
lynxeyed_atsu 0:d920d64db582 211 __ASM uint32_t __get_FAULTMASK(void)
lynxeyed_atsu 0:d920d64db582 212 {
lynxeyed_atsu 0:d920d64db582 213 mrs r0, faultmask
lynxeyed_atsu 0:d920d64db582 214 bx lr
lynxeyed_atsu 0:d920d64db582 215 }
lynxeyed_atsu 0:d920d64db582 216
lynxeyed_atsu 0:d920d64db582 217 /**
lynxeyed_atsu 0:d920d64db582 218 * @brief Set the Fault Mask value
lynxeyed_atsu 0:d920d64db582 219 *
lynxeyed_atsu 0:d920d64db582 220 * @param faultMask faultMask value
lynxeyed_atsu 0:d920d64db582 221 *
lynxeyed_atsu 0:d920d64db582 222 * Set the fault mask register
lynxeyed_atsu 0:d920d64db582 223 */
lynxeyed_atsu 0:d920d64db582 224 __ASM void __set_FAULTMASK(uint32_t faultMask)
lynxeyed_atsu 0:d920d64db582 225 {
lynxeyed_atsu 0:d920d64db582 226 msr faultmask, r0
lynxeyed_atsu 0:d920d64db582 227 bx lr
lynxeyed_atsu 0:d920d64db582 228 }
lynxeyed_atsu 0:d920d64db582 229
lynxeyed_atsu 0:d920d64db582 230 /**
lynxeyed_atsu 0:d920d64db582 231 * @brief Return the Control Register value
lynxeyed_atsu 0:d920d64db582 232 *
lynxeyed_atsu 0:d920d64db582 233 * @return Control value
lynxeyed_atsu 0:d920d64db582 234 *
lynxeyed_atsu 0:d920d64db582 235 * Return the content of the control register
lynxeyed_atsu 0:d920d64db582 236 */
lynxeyed_atsu 0:d920d64db582 237 __ASM uint32_t __get_CONTROL(void)
lynxeyed_atsu 0:d920d64db582 238 {
lynxeyed_atsu 0:d920d64db582 239 mrs r0, control
lynxeyed_atsu 0:d920d64db582 240 bx lr
lynxeyed_atsu 0:d920d64db582 241 }
lynxeyed_atsu 0:d920d64db582 242
lynxeyed_atsu 0:d920d64db582 243 /**
lynxeyed_atsu 0:d920d64db582 244 * @brief Set the Control Register value
lynxeyed_atsu 0:d920d64db582 245 *
lynxeyed_atsu 0:d920d64db582 246 * @param control Control value
lynxeyed_atsu 0:d920d64db582 247 *
lynxeyed_atsu 0:d920d64db582 248 * Set the control register
lynxeyed_atsu 0:d920d64db582 249 */
lynxeyed_atsu 0:d920d64db582 250 __ASM void __set_CONTROL(uint32_t control)
lynxeyed_atsu 0:d920d64db582 251 {
lynxeyed_atsu 0:d920d64db582 252 msr control, r0
lynxeyed_atsu 0:d920d64db582 253 bx lr
lynxeyed_atsu 0:d920d64db582 254 }
lynxeyed_atsu 0:d920d64db582 255
lynxeyed_atsu 0:d920d64db582 256 #endif /* __ARMCC_VERSION */
lynxeyed_atsu 0:d920d64db582 257
lynxeyed_atsu 0:d920d64db582 258
lynxeyed_atsu 0:d920d64db582 259
lynxeyed_atsu 0:d920d64db582 260 #elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
lynxeyed_atsu 0:d920d64db582 261 /* IAR iccarm specific functions */
lynxeyed_atsu 0:d920d64db582 262 #pragma diag_suppress=Pe940
lynxeyed_atsu 0:d920d64db582 263
lynxeyed_atsu 0:d920d64db582 264 /**
lynxeyed_atsu 0:d920d64db582 265 * @brief Return the Process Stack Pointer
lynxeyed_atsu 0:d920d64db582 266 *
lynxeyed_atsu 0:d920d64db582 267 * @return ProcessStackPointer
lynxeyed_atsu 0:d920d64db582 268 *
lynxeyed_atsu 0:d920d64db582 269 * Return the actual process stack pointer
lynxeyed_atsu 0:d920d64db582 270 */
lynxeyed_atsu 0:d920d64db582 271 uint32_t __get_PSP(void)
lynxeyed_atsu 0:d920d64db582 272 {
lynxeyed_atsu 0:d920d64db582 273 __ASM("mrs r0, psp");
lynxeyed_atsu 0:d920d64db582 274 __ASM("bx lr");
lynxeyed_atsu 0:d920d64db582 275 }
lynxeyed_atsu 0:d920d64db582 276
lynxeyed_atsu 0:d920d64db582 277 /**
lynxeyed_atsu 0:d920d64db582 278 * @brief Set the Process Stack Pointer
lynxeyed_atsu 0:d920d64db582 279 *
lynxeyed_atsu 0:d920d64db582 280 * @param topOfProcStack Process Stack Pointer
lynxeyed_atsu 0:d920d64db582 281 *
lynxeyed_atsu 0:d920d64db582 282 * Assign the value ProcessStackPointer to the MSP
lynxeyed_atsu 0:d920d64db582 283 * (process stack pointer) Cortex processor register
lynxeyed_atsu 0:d920d64db582 284 */
lynxeyed_atsu 0:d920d64db582 285 void __set_PSP(uint32_t topOfProcStack)
lynxeyed_atsu 0:d920d64db582 286 {
lynxeyed_atsu 0:d920d64db582 287 __ASM("msr psp, r0");
lynxeyed_atsu 0:d920d64db582 288 __ASM("bx lr");
lynxeyed_atsu 0:d920d64db582 289 }
lynxeyed_atsu 0:d920d64db582 290
lynxeyed_atsu 0:d920d64db582 291 /**
lynxeyed_atsu 0:d920d64db582 292 * @brief Return the Main Stack Pointer
lynxeyed_atsu 0:d920d64db582 293 *
lynxeyed_atsu 0:d920d64db582 294 * @return Main Stack Pointer
lynxeyed_atsu 0:d920d64db582 295 *
lynxeyed_atsu 0:d920d64db582 296 * Return the current value of the MSP (main stack pointer)
lynxeyed_atsu 0:d920d64db582 297 * Cortex processor register
lynxeyed_atsu 0:d920d64db582 298 */
lynxeyed_atsu 0:d920d64db582 299 uint32_t __get_MSP(void)
lynxeyed_atsu 0:d920d64db582 300 {
lynxeyed_atsu 0:d920d64db582 301 __ASM("mrs r0, msp");
lynxeyed_atsu 0:d920d64db582 302 __ASM("bx lr");
lynxeyed_atsu 0:d920d64db582 303 }
lynxeyed_atsu 0:d920d64db582 304
lynxeyed_atsu 0:d920d64db582 305 /**
lynxeyed_atsu 0:d920d64db582 306 * @brief Set the Main Stack Pointer
lynxeyed_atsu 0:d920d64db582 307 *
lynxeyed_atsu 0:d920d64db582 308 * @param topOfMainStack Main Stack Pointer
lynxeyed_atsu 0:d920d64db582 309 *
lynxeyed_atsu 0:d920d64db582 310 * Assign the value mainStackPointer to the MSP
lynxeyed_atsu 0:d920d64db582 311 * (main stack pointer) Cortex processor register
lynxeyed_atsu 0:d920d64db582 312 */
lynxeyed_atsu 0:d920d64db582 313 void __set_MSP(uint32_t topOfMainStack)
lynxeyed_atsu 0:d920d64db582 314 {
lynxeyed_atsu 0:d920d64db582 315 __ASM("msr msp, r0");
lynxeyed_atsu 0:d920d64db582 316 __ASM("bx lr");
lynxeyed_atsu 0:d920d64db582 317 }
lynxeyed_atsu 0:d920d64db582 318
lynxeyed_atsu 0:d920d64db582 319 /**
lynxeyed_atsu 0:d920d64db582 320 * @brief Reverse byte order in unsigned short value
lynxeyed_atsu 0:d920d64db582 321 *
lynxeyed_atsu 0:d920d64db582 322 * @param value value to reverse
lynxeyed_atsu 0:d920d64db582 323 * @return reversed value
lynxeyed_atsu 0:d920d64db582 324 *
lynxeyed_atsu 0:d920d64db582 325 * Reverse byte order in unsigned short value
lynxeyed_atsu 0:d920d64db582 326 */
lynxeyed_atsu 0:d920d64db582 327 uint32_t __REV16(uint16_t value)
lynxeyed_atsu 0:d920d64db582 328 {
lynxeyed_atsu 0:d920d64db582 329 __ASM("rev16 r0, r0");
lynxeyed_atsu 0:d920d64db582 330 __ASM("bx lr");
lynxeyed_atsu 0:d920d64db582 331 }
lynxeyed_atsu 0:d920d64db582 332
lynxeyed_atsu 0:d920d64db582 333 /**
lynxeyed_atsu 0:d920d64db582 334 * @brief Reverse bit order of value
lynxeyed_atsu 0:d920d64db582 335 *
lynxeyed_atsu 0:d920d64db582 336 * @param value value to reverse
lynxeyed_atsu 0:d920d64db582 337 * @return reversed value
lynxeyed_atsu 0:d920d64db582 338 *
lynxeyed_atsu 0:d920d64db582 339 * Reverse bit order of value
lynxeyed_atsu 0:d920d64db582 340 */
lynxeyed_atsu 0:d920d64db582 341 uint32_t __RBIT(uint32_t value)
lynxeyed_atsu 0:d920d64db582 342 {
lynxeyed_atsu 0:d920d64db582 343 __ASM("rbit r0, r0");
lynxeyed_atsu 0:d920d64db582 344 __ASM("bx lr");
lynxeyed_atsu 0:d920d64db582 345 }
lynxeyed_atsu 0:d920d64db582 346
lynxeyed_atsu 0:d920d64db582 347 /**
lynxeyed_atsu 0:d920d64db582 348 * @brief LDR Exclusive (8 bit)
lynxeyed_atsu 0:d920d64db582 349 *
lynxeyed_atsu 0:d920d64db582 350 * @param *addr address pointer
lynxeyed_atsu 0:d920d64db582 351 * @return value of (*address)
lynxeyed_atsu 0:d920d64db582 352 *
lynxeyed_atsu 0:d920d64db582 353 * Exclusive LDR command for 8 bit values)
lynxeyed_atsu 0:d920d64db582 354 */
lynxeyed_atsu 0:d920d64db582 355 uint8_t __LDREXB(uint8_t *addr)
lynxeyed_atsu 0:d920d64db582 356 {
lynxeyed_atsu 0:d920d64db582 357 __ASM("ldrexb r0, [r0]");
lynxeyed_atsu 0:d920d64db582 358 __ASM("bx lr");
lynxeyed_atsu 0:d920d64db582 359 }
lynxeyed_atsu 0:d920d64db582 360
lynxeyed_atsu 0:d920d64db582 361 /**
lynxeyed_atsu 0:d920d64db582 362 * @brief LDR Exclusive (16 bit)
lynxeyed_atsu 0:d920d64db582 363 *
lynxeyed_atsu 0:d920d64db582 364 * @param *addr address pointer
lynxeyed_atsu 0:d920d64db582 365 * @return value of (*address)
lynxeyed_atsu 0:d920d64db582 366 *
lynxeyed_atsu 0:d920d64db582 367 * Exclusive LDR command for 16 bit values
lynxeyed_atsu 0:d920d64db582 368 */
lynxeyed_atsu 0:d920d64db582 369 uint16_t __LDREXH(uint16_t *addr)
lynxeyed_atsu 0:d920d64db582 370 {
lynxeyed_atsu 0:d920d64db582 371 __ASM("ldrexh r0, [r0]");
lynxeyed_atsu 0:d920d64db582 372 __ASM("bx lr");
lynxeyed_atsu 0:d920d64db582 373 }
lynxeyed_atsu 0:d920d64db582 374
lynxeyed_atsu 0:d920d64db582 375 /**
lynxeyed_atsu 0:d920d64db582 376 * @brief LDR Exclusive (32 bit)
lynxeyed_atsu 0:d920d64db582 377 *
lynxeyed_atsu 0:d920d64db582 378 * @param *addr address pointer
lynxeyed_atsu 0:d920d64db582 379 * @return value of (*address)
lynxeyed_atsu 0:d920d64db582 380 *
lynxeyed_atsu 0:d920d64db582 381 * Exclusive LDR command for 32 bit values
lynxeyed_atsu 0:d920d64db582 382 */
lynxeyed_atsu 0:d920d64db582 383 uint32_t __LDREXW(uint32_t *addr)
lynxeyed_atsu 0:d920d64db582 384 {
lynxeyed_atsu 0:d920d64db582 385 __ASM("ldrex r0, [r0]");
lynxeyed_atsu 0:d920d64db582 386 __ASM("bx lr");
lynxeyed_atsu 0:d920d64db582 387 }
lynxeyed_atsu 0:d920d64db582 388
lynxeyed_atsu 0:d920d64db582 389 /**
lynxeyed_atsu 0:d920d64db582 390 * @brief STR Exclusive (8 bit)
lynxeyed_atsu 0:d920d64db582 391 *
lynxeyed_atsu 0:d920d64db582 392 * @param value value to store
lynxeyed_atsu 0:d920d64db582 393 * @param *addr address pointer
lynxeyed_atsu 0:d920d64db582 394 * @return successful / failed
lynxeyed_atsu 0:d920d64db582 395 *
lynxeyed_atsu 0:d920d64db582 396 * Exclusive STR command for 8 bit values
lynxeyed_atsu 0:d920d64db582 397 */
lynxeyed_atsu 0:d920d64db582 398 uint32_t __STREXB(uint8_t value, uint8_t *addr)
lynxeyed_atsu 0:d920d64db582 399 {
lynxeyed_atsu 0:d920d64db582 400 __ASM("strexb r0, r0, [r1]");
lynxeyed_atsu 0:d920d64db582 401 __ASM("bx lr");
lynxeyed_atsu 0:d920d64db582 402 }
lynxeyed_atsu 0:d920d64db582 403
lynxeyed_atsu 0:d920d64db582 404 /**
lynxeyed_atsu 0:d920d64db582 405 * @brief STR Exclusive (16 bit)
lynxeyed_atsu 0:d920d64db582 406 *
lynxeyed_atsu 0:d920d64db582 407 * @param value value to store
lynxeyed_atsu 0:d920d64db582 408 * @param *addr address pointer
lynxeyed_atsu 0:d920d64db582 409 * @return successful / failed
lynxeyed_atsu 0:d920d64db582 410 *
lynxeyed_atsu 0:d920d64db582 411 * Exclusive STR command for 16 bit values
lynxeyed_atsu 0:d920d64db582 412 */
lynxeyed_atsu 0:d920d64db582 413 uint32_t __STREXH(uint16_t value, uint16_t *addr)
lynxeyed_atsu 0:d920d64db582 414 {
lynxeyed_atsu 0:d920d64db582 415 __ASM("strexh r0, r0, [r1]");
lynxeyed_atsu 0:d920d64db582 416 __ASM("bx lr");
lynxeyed_atsu 0:d920d64db582 417 }
lynxeyed_atsu 0:d920d64db582 418
lynxeyed_atsu 0:d920d64db582 419 /**
lynxeyed_atsu 0:d920d64db582 420 * @brief STR Exclusive (32 bit)
lynxeyed_atsu 0:d920d64db582 421 *
lynxeyed_atsu 0:d920d64db582 422 * @param value value to store
lynxeyed_atsu 0:d920d64db582 423 * @param *addr address pointer
lynxeyed_atsu 0:d920d64db582 424 * @return successful / failed
lynxeyed_atsu 0:d920d64db582 425 *
lynxeyed_atsu 0:d920d64db582 426 * Exclusive STR command for 32 bit values
lynxeyed_atsu 0:d920d64db582 427 */
lynxeyed_atsu 0:d920d64db582 428 uint32_t __STREXW(uint32_t value, uint32_t *addr)
lynxeyed_atsu 0:d920d64db582 429 {
lynxeyed_atsu 0:d920d64db582 430 __ASM("strex r0, r0, [r1]");
lynxeyed_atsu 0:d920d64db582 431 __ASM("bx lr");
lynxeyed_atsu 0:d920d64db582 432 }
lynxeyed_atsu 0:d920d64db582 433
lynxeyed_atsu 0:d920d64db582 434 #pragma diag_default=Pe940
lynxeyed_atsu 0:d920d64db582 435
lynxeyed_atsu 0:d920d64db582 436
lynxeyed_atsu 0:d920d64db582 437 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
lynxeyed_atsu 0:d920d64db582 438 /* GNU gcc specific functions */
lynxeyed_atsu 0:d920d64db582 439
lynxeyed_atsu 0:d920d64db582 440 /**
lynxeyed_atsu 0:d920d64db582 441 * @brief Return the Process Stack Pointer
lynxeyed_atsu 0:d920d64db582 442 *
lynxeyed_atsu 0:d920d64db582 443 * @return ProcessStackPointer
lynxeyed_atsu 0:d920d64db582 444 *
lynxeyed_atsu 0:d920d64db582 445 * Return the actual process stack pointer
lynxeyed_atsu 0:d920d64db582 446 */
lynxeyed_atsu 0:d920d64db582 447 uint32_t __get_PSP(void) __attribute__( ( naked ) );
lynxeyed_atsu 0:d920d64db582 448 uint32_t __get_PSP(void)
lynxeyed_atsu 0:d920d64db582 449 {
lynxeyed_atsu 0:d920d64db582 450 uint32_t result=0;
lynxeyed_atsu 0:d920d64db582 451
lynxeyed_atsu 0:d920d64db582 452 __ASM volatile ("MRS %0, psp\n\t"
lynxeyed_atsu 0:d920d64db582 453 "MOV r0, %0 \n\t"
lynxeyed_atsu 0:d920d64db582 454 "BX lr \n\t" : "=r" (result) );
lynxeyed_atsu 0:d920d64db582 455 return(result);
lynxeyed_atsu 0:d920d64db582 456 }
lynxeyed_atsu 0:d920d64db582 457
lynxeyed_atsu 0:d920d64db582 458 /**
lynxeyed_atsu 0:d920d64db582 459 * @brief Set the Process Stack Pointer
lynxeyed_atsu 0:d920d64db582 460 *
lynxeyed_atsu 0:d920d64db582 461 * @param topOfProcStack Process Stack Pointer
lynxeyed_atsu 0:d920d64db582 462 *
lynxeyed_atsu 0:d920d64db582 463 * Assign the value ProcessStackPointer to the MSP
lynxeyed_atsu 0:d920d64db582 464 * (process stack pointer) Cortex processor register
lynxeyed_atsu 0:d920d64db582 465 */
lynxeyed_atsu 0:d920d64db582 466 void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
lynxeyed_atsu 0:d920d64db582 467 void __set_PSP(uint32_t topOfProcStack)
lynxeyed_atsu 0:d920d64db582 468 {
lynxeyed_atsu 0:d920d64db582 469 __ASM volatile ("MSR psp, %0\n\t"
lynxeyed_atsu 0:d920d64db582 470 "BX lr \n\t" : : "r" (topOfProcStack) );
lynxeyed_atsu 0:d920d64db582 471 }
lynxeyed_atsu 0:d920d64db582 472
lynxeyed_atsu 0:d920d64db582 473 /**
lynxeyed_atsu 0:d920d64db582 474 * @brief Return the Main Stack Pointer
lynxeyed_atsu 0:d920d64db582 475 *
lynxeyed_atsu 0:d920d64db582 476 * @return Main Stack Pointer
lynxeyed_atsu 0:d920d64db582 477 *
lynxeyed_atsu 0:d920d64db582 478 * Return the current value of the MSP (main stack pointer)
lynxeyed_atsu 0:d920d64db582 479 * Cortex processor register
lynxeyed_atsu 0:d920d64db582 480 */
lynxeyed_atsu 0:d920d64db582 481 uint32_t __get_MSP(void) __attribute__( ( naked ) );
lynxeyed_atsu 0:d920d64db582 482 uint32_t __get_MSP(void)
lynxeyed_atsu 0:d920d64db582 483 {
lynxeyed_atsu 0:d920d64db582 484 uint32_t result=0;
lynxeyed_atsu 0:d920d64db582 485
lynxeyed_atsu 0:d920d64db582 486 __ASM volatile ("MRS %0, msp\n\t"
lynxeyed_atsu 0:d920d64db582 487 "MOV r0, %0 \n\t"
lynxeyed_atsu 0:d920d64db582 488 "BX lr \n\t" : "=r" (result) );
lynxeyed_atsu 0:d920d64db582 489 return(result);
lynxeyed_atsu 0:d920d64db582 490 }
lynxeyed_atsu 0:d920d64db582 491
lynxeyed_atsu 0:d920d64db582 492 /**
lynxeyed_atsu 0:d920d64db582 493 * @brief Set the Main Stack Pointer
lynxeyed_atsu 0:d920d64db582 494 *
lynxeyed_atsu 0:d920d64db582 495 * @param topOfMainStack Main Stack Pointer
lynxeyed_atsu 0:d920d64db582 496 *
lynxeyed_atsu 0:d920d64db582 497 * Assign the value mainStackPointer to the MSP
lynxeyed_atsu 0:d920d64db582 498 * (main stack pointer) Cortex processor register
lynxeyed_atsu 0:d920d64db582 499 */
lynxeyed_atsu 0:d920d64db582 500 void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );
lynxeyed_atsu 0:d920d64db582 501 void __set_MSP(uint32_t topOfMainStack)
lynxeyed_atsu 0:d920d64db582 502 {
lynxeyed_atsu 0:d920d64db582 503 __ASM volatile ("MSR msp, %0\n\t"
lynxeyed_atsu 0:d920d64db582 504 "BX lr \n\t" : : "r" (topOfMainStack) );
lynxeyed_atsu 0:d920d64db582 505 }
lynxeyed_atsu 0:d920d64db582 506
lynxeyed_atsu 0:d920d64db582 507 /**
lynxeyed_atsu 0:d920d64db582 508 * @brief Return the Base Priority value
lynxeyed_atsu 0:d920d64db582 509 *
lynxeyed_atsu 0:d920d64db582 510 * @return BasePriority
lynxeyed_atsu 0:d920d64db582 511 *
lynxeyed_atsu 0:d920d64db582 512 * Return the content of the base priority register
lynxeyed_atsu 0:d920d64db582 513 */
lynxeyed_atsu 0:d920d64db582 514 uint32_t __get_BASEPRI(void)
lynxeyed_atsu 0:d920d64db582 515 {
lynxeyed_atsu 0:d920d64db582 516 uint32_t result=0;
lynxeyed_atsu 0:d920d64db582 517
lynxeyed_atsu 0:d920d64db582 518 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
lynxeyed_atsu 0:d920d64db582 519 return(result);
lynxeyed_atsu 0:d920d64db582 520 }
lynxeyed_atsu 0:d920d64db582 521
lynxeyed_atsu 0:d920d64db582 522 /**
lynxeyed_atsu 0:d920d64db582 523 * @brief Set the Base Priority value
lynxeyed_atsu 0:d920d64db582 524 *
lynxeyed_atsu 0:d920d64db582 525 * @param basePri BasePriority
lynxeyed_atsu 0:d920d64db582 526 *
lynxeyed_atsu 0:d920d64db582 527 * Set the base priority register
lynxeyed_atsu 0:d920d64db582 528 */
lynxeyed_atsu 0:d920d64db582 529 void __set_BASEPRI(uint32_t value)
lynxeyed_atsu 0:d920d64db582 530 {
lynxeyed_atsu 0:d920d64db582 531 __ASM volatile ("MSR basepri, %0" : : "r" (value) );
lynxeyed_atsu 0:d920d64db582 532 }
lynxeyed_atsu 0:d920d64db582 533
lynxeyed_atsu 0:d920d64db582 534 /**
lynxeyed_atsu 0:d920d64db582 535 * @brief Return the Priority Mask value
lynxeyed_atsu 0:d920d64db582 536 *
lynxeyed_atsu 0:d920d64db582 537 * @return PriMask
lynxeyed_atsu 0:d920d64db582 538 *
lynxeyed_atsu 0:d920d64db582 539 * Return state of the priority mask bit from the priority mask register
lynxeyed_atsu 0:d920d64db582 540 */
lynxeyed_atsu 0:d920d64db582 541 uint32_t __get_PRIMASK(void)
lynxeyed_atsu 0:d920d64db582 542 {
lynxeyed_atsu 0:d920d64db582 543 uint32_t result=0;
lynxeyed_atsu 0:d920d64db582 544
lynxeyed_atsu 0:d920d64db582 545 __ASM volatile ("MRS %0, primask" : "=r" (result) );
lynxeyed_atsu 0:d920d64db582 546 return(result);
lynxeyed_atsu 0:d920d64db582 547 }
lynxeyed_atsu 0:d920d64db582 548
lynxeyed_atsu 0:d920d64db582 549 /**
lynxeyed_atsu 0:d920d64db582 550 * @brief Set the Priority Mask value
lynxeyed_atsu 0:d920d64db582 551 *
lynxeyed_atsu 0:d920d64db582 552 * @param priMask PriMask
lynxeyed_atsu 0:d920d64db582 553 *
lynxeyed_atsu 0:d920d64db582 554 * Set the priority mask bit in the priority mask register
lynxeyed_atsu 0:d920d64db582 555 */
lynxeyed_atsu 0:d920d64db582 556 void __set_PRIMASK(uint32_t priMask)
lynxeyed_atsu 0:d920d64db582 557 {
lynxeyed_atsu 0:d920d64db582 558 __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
lynxeyed_atsu 0:d920d64db582 559 }
lynxeyed_atsu 0:d920d64db582 560
lynxeyed_atsu 0:d920d64db582 561 /**
lynxeyed_atsu 0:d920d64db582 562 * @brief Return the Fault Mask value
lynxeyed_atsu 0:d920d64db582 563 *
lynxeyed_atsu 0:d920d64db582 564 * @return FaultMask
lynxeyed_atsu 0:d920d64db582 565 *
lynxeyed_atsu 0:d920d64db582 566 * Return the content of the fault mask register
lynxeyed_atsu 0:d920d64db582 567 */
lynxeyed_atsu 0:d920d64db582 568 uint32_t __get_FAULTMASK(void)
lynxeyed_atsu 0:d920d64db582 569 {
lynxeyed_atsu 0:d920d64db582 570 uint32_t result=0;
lynxeyed_atsu 0:d920d64db582 571
lynxeyed_atsu 0:d920d64db582 572 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
lynxeyed_atsu 0:d920d64db582 573 return(result);
lynxeyed_atsu 0:d920d64db582 574 }
lynxeyed_atsu 0:d920d64db582 575
lynxeyed_atsu 0:d920d64db582 576 /**
lynxeyed_atsu 0:d920d64db582 577 * @brief Set the Fault Mask value
lynxeyed_atsu 0:d920d64db582 578 *
lynxeyed_atsu 0:d920d64db582 579 * @param faultMask faultMask value
lynxeyed_atsu 0:d920d64db582 580 *
lynxeyed_atsu 0:d920d64db582 581 * Set the fault mask register
lynxeyed_atsu 0:d920d64db582 582 */
lynxeyed_atsu 0:d920d64db582 583 void __set_FAULTMASK(uint32_t faultMask)
lynxeyed_atsu 0:d920d64db582 584 {
lynxeyed_atsu 0:d920d64db582 585 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
lynxeyed_atsu 0:d920d64db582 586 }
lynxeyed_atsu 0:d920d64db582 587
lynxeyed_atsu 0:d920d64db582 588 /**
lynxeyed_atsu 0:d920d64db582 589 * @brief Return the Control Register value
lynxeyed_atsu 0:d920d64db582 590 *
lynxeyed_atsu 0:d920d64db582 591 * @return Control value
lynxeyed_atsu 0:d920d64db582 592 *
lynxeyed_atsu 0:d920d64db582 593 * Return the content of the control register
lynxeyed_atsu 0:d920d64db582 594 */
lynxeyed_atsu 0:d920d64db582 595 uint32_t __get_CONTROL(void)
lynxeyed_atsu 0:d920d64db582 596 {
lynxeyed_atsu 0:d920d64db582 597 uint32_t result=0;
lynxeyed_atsu 0:d920d64db582 598
lynxeyed_atsu 0:d920d64db582 599 __ASM volatile ("MRS %0, control" : "=r" (result) );
lynxeyed_atsu 0:d920d64db582 600 return(result);
lynxeyed_atsu 0:d920d64db582 601 }
lynxeyed_atsu 0:d920d64db582 602
lynxeyed_atsu 0:d920d64db582 603 /**
lynxeyed_atsu 0:d920d64db582 604 * @brief Set the Control Register value
lynxeyed_atsu 0:d920d64db582 605 *
lynxeyed_atsu 0:d920d64db582 606 * @param control Control value
lynxeyed_atsu 0:d920d64db582 607 *
lynxeyed_atsu 0:d920d64db582 608 * Set the control register
lynxeyed_atsu 0:d920d64db582 609 */
lynxeyed_atsu 0:d920d64db582 610 void __set_CONTROL(uint32_t control)
lynxeyed_atsu 0:d920d64db582 611 {
lynxeyed_atsu 0:d920d64db582 612 __ASM volatile ("MSR control, %0" : : "r" (control) );
lynxeyed_atsu 0:d920d64db582 613 }
lynxeyed_atsu 0:d920d64db582 614
lynxeyed_atsu 0:d920d64db582 615
lynxeyed_atsu 0:d920d64db582 616 /**
lynxeyed_atsu 0:d920d64db582 617 * @brief Reverse byte order in integer value
lynxeyed_atsu 0:d920d64db582 618 *
lynxeyed_atsu 0:d920d64db582 619 * @param value value to reverse
lynxeyed_atsu 0:d920d64db582 620 * @return reversed value
lynxeyed_atsu 0:d920d64db582 621 *
lynxeyed_atsu 0:d920d64db582 622 * Reverse byte order in integer value
lynxeyed_atsu 0:d920d64db582 623 */
lynxeyed_atsu 0:d920d64db582 624 uint32_t __REV(uint32_t value)
lynxeyed_atsu 0:d920d64db582 625 {
lynxeyed_atsu 0:d920d64db582 626 uint32_t result=0;
lynxeyed_atsu 0:d920d64db582 627
lynxeyed_atsu 0:d920d64db582 628 __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
lynxeyed_atsu 0:d920d64db582 629 return(result);
lynxeyed_atsu 0:d920d64db582 630 }
lynxeyed_atsu 0:d920d64db582 631
lynxeyed_atsu 0:d920d64db582 632 /**
lynxeyed_atsu 0:d920d64db582 633 * @brief Reverse byte order in unsigned short value
lynxeyed_atsu 0:d920d64db582 634 *
lynxeyed_atsu 0:d920d64db582 635 * @param value value to reverse
lynxeyed_atsu 0:d920d64db582 636 * @return reversed value
lynxeyed_atsu 0:d920d64db582 637 *
lynxeyed_atsu 0:d920d64db582 638 * Reverse byte order in unsigned short value
lynxeyed_atsu 0:d920d64db582 639 */
lynxeyed_atsu 0:d920d64db582 640 uint32_t __REV16(uint16_t value)
lynxeyed_atsu 0:d920d64db582 641 {
lynxeyed_atsu 0:d920d64db582 642 uint32_t result=0;
lynxeyed_atsu 0:d920d64db582 643
lynxeyed_atsu 0:d920d64db582 644 __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
lynxeyed_atsu 0:d920d64db582 645 return(result);
lynxeyed_atsu 0:d920d64db582 646 }
lynxeyed_atsu 0:d920d64db582 647
lynxeyed_atsu 0:d920d64db582 648 /**
lynxeyed_atsu 0:d920d64db582 649 * @brief Reverse byte order in signed short value with sign extension to integer
lynxeyed_atsu 0:d920d64db582 650 *
lynxeyed_atsu 0:d920d64db582 651 * @param value value to reverse
lynxeyed_atsu 0:d920d64db582 652 * @return reversed value
lynxeyed_atsu 0:d920d64db582 653 *
lynxeyed_atsu 0:d920d64db582 654 * Reverse byte order in signed short value with sign extension to integer
lynxeyed_atsu 0:d920d64db582 655 */
lynxeyed_atsu 0:d920d64db582 656 int32_t __REVSH(int16_t value)
lynxeyed_atsu 0:d920d64db582 657 {
lynxeyed_atsu 0:d920d64db582 658 uint32_t result=0;
lynxeyed_atsu 0:d920d64db582 659
lynxeyed_atsu 0:d920d64db582 660 __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
lynxeyed_atsu 0:d920d64db582 661 return(result);
lynxeyed_atsu 0:d920d64db582 662 }
lynxeyed_atsu 0:d920d64db582 663
lynxeyed_atsu 0:d920d64db582 664 /**
lynxeyed_atsu 0:d920d64db582 665 * @brief Reverse bit order of value
lynxeyed_atsu 0:d920d64db582 666 *
lynxeyed_atsu 0:d920d64db582 667 * @param value value to reverse
lynxeyed_atsu 0:d920d64db582 668 * @return reversed value
lynxeyed_atsu 0:d920d64db582 669 *
lynxeyed_atsu 0:d920d64db582 670 * Reverse bit order of value
lynxeyed_atsu 0:d920d64db582 671 */
lynxeyed_atsu 0:d920d64db582 672 uint32_t __RBIT(uint32_t value)
lynxeyed_atsu 0:d920d64db582 673 {
lynxeyed_atsu 0:d920d64db582 674 uint32_t result=0;
lynxeyed_atsu 0:d920d64db582 675
lynxeyed_atsu 0:d920d64db582 676 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
lynxeyed_atsu 0:d920d64db582 677 return(result);
lynxeyed_atsu 0:d920d64db582 678 }
lynxeyed_atsu 0:d920d64db582 679
lynxeyed_atsu 0:d920d64db582 680 /**
lynxeyed_atsu 0:d920d64db582 681 * @brief LDR Exclusive (8 bit)
lynxeyed_atsu 0:d920d64db582 682 *
lynxeyed_atsu 0:d920d64db582 683 * @param *addr address pointer
lynxeyed_atsu 0:d920d64db582 684 * @return value of (*address)
lynxeyed_atsu 0:d920d64db582 685 *
lynxeyed_atsu 0:d920d64db582 686 * Exclusive LDR command for 8 bit value
lynxeyed_atsu 0:d920d64db582 687 */
lynxeyed_atsu 0:d920d64db582 688 uint8_t __LDREXB(uint8_t *addr)
lynxeyed_atsu 0:d920d64db582 689 {
lynxeyed_atsu 0:d920d64db582 690 uint8_t result=0;
lynxeyed_atsu 0:d920d64db582 691
lynxeyed_atsu 0:d920d64db582 692 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
lynxeyed_atsu 0:d920d64db582 693 return(result);
lynxeyed_atsu 0:d920d64db582 694 }
lynxeyed_atsu 0:d920d64db582 695
lynxeyed_atsu 0:d920d64db582 696 /**
lynxeyed_atsu 0:d920d64db582 697 * @brief LDR Exclusive (16 bit)
lynxeyed_atsu 0:d920d64db582 698 *
lynxeyed_atsu 0:d920d64db582 699 * @param *addr address pointer
lynxeyed_atsu 0:d920d64db582 700 * @return value of (*address)
lynxeyed_atsu 0:d920d64db582 701 *
lynxeyed_atsu 0:d920d64db582 702 * Exclusive LDR command for 16 bit values
lynxeyed_atsu 0:d920d64db582 703 */
lynxeyed_atsu 0:d920d64db582 704 uint16_t __LDREXH(uint16_t *addr)
lynxeyed_atsu 0:d920d64db582 705 {
lynxeyed_atsu 0:d920d64db582 706 uint16_t result=0;
lynxeyed_atsu 0:d920d64db582 707
lynxeyed_atsu 0:d920d64db582 708 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
lynxeyed_atsu 0:d920d64db582 709 return(result);
lynxeyed_atsu 0:d920d64db582 710 }
lynxeyed_atsu 0:d920d64db582 711
lynxeyed_atsu 0:d920d64db582 712 /**
lynxeyed_atsu 0:d920d64db582 713 * @brief LDR Exclusive (32 bit)
lynxeyed_atsu 0:d920d64db582 714 *
lynxeyed_atsu 0:d920d64db582 715 * @param *addr address pointer
lynxeyed_atsu 0:d920d64db582 716 * @return value of (*address)
lynxeyed_atsu 0:d920d64db582 717 *
lynxeyed_atsu 0:d920d64db582 718 * Exclusive LDR command for 32 bit values
lynxeyed_atsu 0:d920d64db582 719 */
lynxeyed_atsu 0:d920d64db582 720 uint32_t __LDREXW(uint32_t *addr)
lynxeyed_atsu 0:d920d64db582 721 {
lynxeyed_atsu 0:d920d64db582 722 uint32_t result=0;
lynxeyed_atsu 0:d920d64db582 723
lynxeyed_atsu 0:d920d64db582 724 __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
lynxeyed_atsu 0:d920d64db582 725 return(result);
lynxeyed_atsu 0:d920d64db582 726 }
lynxeyed_atsu 0:d920d64db582 727
lynxeyed_atsu 0:d920d64db582 728 /**
lynxeyed_atsu 0:d920d64db582 729 * @brief STR Exclusive (8 bit)
lynxeyed_atsu 0:d920d64db582 730 *
lynxeyed_atsu 0:d920d64db582 731 * @param value value to store
lynxeyed_atsu 0:d920d64db582 732 * @param *addr address pointer
lynxeyed_atsu 0:d920d64db582 733 * @return successful / failed
lynxeyed_atsu 0:d920d64db582 734 *
lynxeyed_atsu 0:d920d64db582 735 * Exclusive STR command for 8 bit values
lynxeyed_atsu 0:d920d64db582 736 */
lynxeyed_atsu 0:d920d64db582 737 uint32_t __STREXB(uint8_t value, uint8_t *addr)
lynxeyed_atsu 0:d920d64db582 738 {
lynxeyed_atsu 0:d920d64db582 739 uint32_t result=0;
lynxeyed_atsu 0:d920d64db582 740
lynxeyed_atsu 0:d920d64db582 741 __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
lynxeyed_atsu 0:d920d64db582 742 return(result);
lynxeyed_atsu 0:d920d64db582 743 }
lynxeyed_atsu 0:d920d64db582 744
lynxeyed_atsu 0:d920d64db582 745 /**
lynxeyed_atsu 0:d920d64db582 746 * @brief STR Exclusive (16 bit)
lynxeyed_atsu 0:d920d64db582 747 *
lynxeyed_atsu 0:d920d64db582 748 * @param value value to store
lynxeyed_atsu 0:d920d64db582 749 * @param *addr address pointer
lynxeyed_atsu 0:d920d64db582 750 * @return successful / failed
lynxeyed_atsu 0:d920d64db582 751 *
lynxeyed_atsu 0:d920d64db582 752 * Exclusive STR command for 16 bit values
lynxeyed_atsu 0:d920d64db582 753 */
lynxeyed_atsu 0:d920d64db582 754 uint32_t __STREXH(uint16_t value, uint16_t *addr)
lynxeyed_atsu 0:d920d64db582 755 {
lynxeyed_atsu 0:d920d64db582 756 uint32_t result=0;
lynxeyed_atsu 0:d920d64db582 757
lynxeyed_atsu 0:d920d64db582 758 __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
lynxeyed_atsu 0:d920d64db582 759 return(result);
lynxeyed_atsu 0:d920d64db582 760 }
lynxeyed_atsu 0:d920d64db582 761
lynxeyed_atsu 0:d920d64db582 762 /**
lynxeyed_atsu 0:d920d64db582 763 * @brief STR Exclusive (32 bit)
lynxeyed_atsu 0:d920d64db582 764 *
lynxeyed_atsu 0:d920d64db582 765 * @param value value to store
lynxeyed_atsu 0:d920d64db582 766 * @param *addr address pointer
lynxeyed_atsu 0:d920d64db582 767 * @return successful / failed
lynxeyed_atsu 0:d920d64db582 768 *
lynxeyed_atsu 0:d920d64db582 769 * Exclusive STR command for 32 bit values
lynxeyed_atsu 0:d920d64db582 770 */
lynxeyed_atsu 0:d920d64db582 771 uint32_t __STREXW(uint32_t value, uint32_t *addr)
lynxeyed_atsu 0:d920d64db582 772 {
lynxeyed_atsu 0:d920d64db582 773 uint32_t result=0;
lynxeyed_atsu 0:d920d64db582 774
lynxeyed_atsu 0:d920d64db582 775 __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
lynxeyed_atsu 0:d920d64db582 776 return(result);
lynxeyed_atsu 0:d920d64db582 777 }
lynxeyed_atsu 0:d920d64db582 778
lynxeyed_atsu 0:d920d64db582 779
lynxeyed_atsu 0:d920d64db582 780 #elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
lynxeyed_atsu 0:d920d64db582 781 /* TASKING carm specific functions */
lynxeyed_atsu 0:d920d64db582 782
lynxeyed_atsu 0:d920d64db582 783 /*
lynxeyed_atsu 0:d920d64db582 784 * The CMSIS functions have been implemented as intrinsics in the compiler.
lynxeyed_atsu 0:d920d64db582 785 * Please use "carm -?i" to get an up to date list of all instrinsics,
lynxeyed_atsu 0:d920d64db582 786 * Including the CMSIS ones.
lynxeyed_atsu 0:d920d64db582 787 */
lynxeyed_atsu 0:d920d64db582 788
lynxeyed_atsu 0:d920d64db582 789 #endif
lynxeyed_atsu 0:d920d64db582 790
lynxeyed_atsu 0:d920d64db582 791 /**
lynxeyed_atsu 0:d920d64db582 792 * @}
lynxeyed_atsu 0:d920d64db582 793 */
lynxeyed_atsu 0:d920d64db582 794