Lucas Lim / Mbed 2 deprecated HSP_Temperature_Barometer_CS3237

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Dependencies:   mbed

MAX30001/MAX30001.h@22:5c07298d3383, 2019-08-26 (annotated)

Committer:
lucaslwl
Date:
Mon Aug 26 08:11:41 2019 +0000
Revision:
22:5c07298d3383
add library folder

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lucaslwl 22:5c07298d3383 1 ///*******************************************************************************
lucaslwl 22:5c07298d3383 2 // * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
lucaslwl 22:5c07298d3383 3 // *
lucaslwl 22:5c07298d3383 4 // * Permission is hereby granted, free of charge, to any person obtaining a
lucaslwl 22:5c07298d3383 5 // * copy of this software and associated documentation files (the "Software"),
lucaslwl 22:5c07298d3383 6 // * to deal in the Software without restriction, including without limitation
lucaslwl 22:5c07298d3383 7 // * the rights to use, copy, modify, merge, publish, distribute, sublicense,
lucaslwl 22:5c07298d3383 8 // * and/or sell copies of the Software, and to permit persons to whom the
lucaslwl 22:5c07298d3383 9 // * Software is furnished to do so, subject to the following conditions:
lucaslwl 22:5c07298d3383 10 // *
lucaslwl 22:5c07298d3383 11 // * The above copyright notice and this permission notice shall be included
lucaslwl 22:5c07298d3383 12 // * in all copies or substantial portions of the Software.
lucaslwl 22:5c07298d3383 13 // *
lucaslwl 22:5c07298d3383 14 // * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
lucaslwl 22:5c07298d3383 15 // * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
lucaslwl 22:5c07298d3383 16 // * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
lucaslwl 22:5c07298d3383 17 // * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
lucaslwl 22:5c07298d3383 18 // * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
lucaslwl 22:5c07298d3383 19 // * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
lucaslwl 22:5c07298d3383 20 // * OTHER DEALINGS IN THE SOFTWARE.
lucaslwl 22:5c07298d3383 21 // *
lucaslwl 22:5c07298d3383 22 // * Except as contained in this notice, the name of Maxim Integrated
lucaslwl 22:5c07298d3383 23 // * Products, Inc. shall not be used except as stated in the Maxim Integrated
lucaslwl 22:5c07298d3383 24 // * Products, Inc. Branding Policy.
lucaslwl 22:5c07298d3383 25 // *
lucaslwl 22:5c07298d3383 26 // * The mere transfer of this software does not imply any licenses
lucaslwl 22:5c07298d3383 27 // * of trade secrets, proprietary technology, copyrights, patents,
lucaslwl 22:5c07298d3383 28 // * trademarks, maskwork rights, or any other form of intellectual
lucaslwl 22:5c07298d3383 29 // * property whatsoever. Maxim Integrated Products, Inc. retains all
lucaslwl 22:5c07298d3383 30 // * ownership rights.
lucaslwl 22:5c07298d3383 31 // *******************************************************************************/
lucaslwl 22:5c07298d3383 32 ///**
lucaslwl 22:5c07298d3383 33 // *
lucaslwl 22:5c07298d3383 34 // * Maxim Integrated MAX30001 ECG/BIOZ chip
lucaslwl 22:5c07298d3383 35 // *
lucaslwl 22:5c07298d3383 36 // * @code
lucaslwl 22:5c07298d3383 37 // * #include "mbed.h"
lucaslwl 22:5c07298d3383 38 // * #include "MAX30001.h"
lucaslwl 22:5c07298d3383 39 // *
lucaslwl 22:5c07298d3383 40 // * /// Initialization values for ECG_InitStart()
lucaslwl 22:5c07298d3383 41 // * #define EN_ECG 0b1
lucaslwl 22:5c07298d3383 42 // * #define OPENP 0b1
lucaslwl 22:5c07298d3383 43 // * #define OPENN 0b1
lucaslwl 22:5c07298d3383 44 // * #define POL 0b0
lucaslwl 22:5c07298d3383 45 // * #define CALP_SEL 0b10
lucaslwl 22:5c07298d3383 46 // * #define CALN_SEL 0b11
lucaslwl 22:5c07298d3383 47 // * #define E_FIT 31
lucaslwl 22:5c07298d3383 48 // * #define RATE 0b00
lucaslwl 22:5c07298d3383 49 // * #define GAIN 0b00
lucaslwl 22:5c07298d3383 50 // * #define DHPF 0b0
lucaslwl 22:5c07298d3383 51 // * #define DLPF 0b01
lucaslwl 22:5c07298d3383 52 // *
lucaslwl 22:5c07298d3383 53 // * /// Initialization values for CAL_InitStart()
lucaslwl 22:5c07298d3383 54 // * #define EN_VCAL 0b1
lucaslwl 22:5c07298d3383 55 // * #define VMODE 0b1
lucaslwl 22:5c07298d3383 56 // * #define VMAG 0b1
lucaslwl 22:5c07298d3383 57 // * #define FCAL 0b011
lucaslwl 22:5c07298d3383 58 // * #define THIGH 0x7FF
lucaslwl 22:5c07298d3383 59 // * #define FIFTY 0b0
lucaslwl 22:5c07298d3383 60 // *
lucaslwl 22:5c07298d3383 61 // * /// Initializaton values for Rbias_FMSTR_Init()
lucaslwl 22:5c07298d3383 62 // * #define EN_RBIAS 0b01
lucaslwl 22:5c07298d3383 63 // * #define RBIASV 0b10
lucaslwl 22:5c07298d3383 64 // * #define RBIASP 0b1
lucaslwl 22:5c07298d3383 65 // * #define RBIASN 0b1
lucaslwl 22:5c07298d3383 66 // * #define FMSTR 0b00
lucaslwl 22:5c07298d3383 67 // *
lucaslwl 22:5c07298d3383 68 // * #define BUFFER_LENGTH 50
lucaslwl 22:5c07298d3383 69 // *
lucaslwl 22:5c07298d3383 70 // * // @brief SPI Master 0 with SPI0_SS for use with MAX30001
lucaslwl 22:5c07298d3383 71 // * SPI spi(SPI0_MOSI, SPI0_MISO, SPI0_SCK, SPI0_SS); // used by MAX30001
lucaslwl 22:5c07298d3383 72 // *
lucaslwl 22:5c07298d3383 73 // * //@brief ECG device
lucaslwl 22:5c07298d3383 74 // * MAX30001 max30001(&spi);
lucaslwl 22:5c07298d3383 75 // * InterruptIn max30001_InterruptB(P3_6);
lucaslwl 22:5c07298d3383 76 // * InterruptIn max30001_Interrupt2B(P4_5);
lucaslwl 22:5c07298d3383 77 // * //@brief PWM used as fclk for the MAX30001
lucaslwl 22:5c07298d3383 78 // * PwmOut pwmout(P1_7);
lucaslwl 22:5c07298d3383 79 // *
lucaslwl 22:5c07298d3383 80 // * //@brief Creating a buffer to hold the data
lucaslwl 22:5c07298d3383 81 // * uint32_t ecgBuffer[BUFFER_LENGTH];
lucaslwl 22:5c07298d3383 82 // * int ecgIndex = 0;
lucaslwl 22:5c07298d3383 83 // * char data_trigger = 0;
lucaslwl 22:5c07298d3383 84 // *
lucaslwl 22:5c07298d3383 85 // *
lucaslwl 22:5c07298d3383 86 // * //
lucaslwl 22:5c07298d3383 87 // * // @brief Creates a packet that will be streamed via USB Serial
lucaslwl 22:5c07298d3383 88 // * // the packet created will be inserted into a fifo to be streamed at a later time
lucaslwl 22:5c07298d3383 89 // * // @param id Streaming ID
lucaslwl 22:5c07298d3383 90 // * // @param buffer Pointer to a uint32 array that contains the data to include in the packet
lucaslwl 22:5c07298d3383 91 // * // @param number Number of elements in the buffer
lucaslwl 22:5c07298d3383 92 // * //
lucaslwl 22:5c07298d3383 93 // * void StreamPacketUint32_ecg(uint32_t id, uint32_t *buffer, uint32_t number) {
lucaslwl 22:5c07298d3383 94 // * int i;
lucaslwl 22:5c07298d3383 95 // * if (id == MAX30001_DATA_ECG) {
lucaslwl 22:5c07298d3383 96 // * for (i = 0; i < number; i++) {
lucaslwl 22:5c07298d3383 97 // * ecgBuffer[ecgIndex] = buffer[i];
lucaslwl 22:5c07298d3383 98 // * ecgIndex++;
lucaslwl 22:5c07298d3383 99 // * if (ecgIndex > BUFFER_LENGTH)
lucaslwl 22:5c07298d3383 100 // * {
lucaslwl 22:5c07298d3383 101 // * data_trigger = 1;
lucaslwl 22:5c07298d3383 102 // * ecgIndex = 0;
lucaslwl 22:5c07298d3383 103 // * }
lucaslwl 22:5c07298d3383 104 // * }
lucaslwl 22:5c07298d3383 105 // * }
lucaslwl 22:5c07298d3383 106 // * if (id == MAX30001_DATA_BIOZ) {
lucaslwl 22:5c07298d3383 107 // * /// Add code for reading BIOZ data
lucaslwl 22:5c07298d3383 108 // * }
lucaslwl 22:5c07298d3383 109 // * if (id == MAX30001_DATA_PACE) {
lucaslwl 22:5c07298d3383 110 // * /// Add code for reading Pace data
lucaslwl 22:5c07298d3383 111 // * }
lucaslwl 22:5c07298d3383 112 // * if (id == MAX30001_DATA_RTOR) {
lucaslwl 22:5c07298d3383 113 // * /// Add code for reading RtoR data
lucaslwl 22:5c07298d3383 114 // * }
lucaslwl 22:5c07298d3383 115 // * }
lucaslwl 22:5c07298d3383 116 // *
lucaslwl 22:5c07298d3383 117 // *
lucaslwl 22:5c07298d3383 118 // * int main() {
lucaslwl 22:5c07298d3383 119 // *
lucaslwl 22:5c07298d3383 120 // * uint32_t all;
lucaslwl 22:5c07298d3383 121 // *
lucaslwl 22:5c07298d3383 122 // * /// set NVIC priorities for GPIO to prevent priority inversion
lucaslwl 22:5c07298d3383 123 // * NVIC_SetPriority(GPIO_P0_IRQn, 5);
lucaslwl 22:5c07298d3383 124 // * NVIC_SetPriority(GPIO_P1_IRQn, 5);
lucaslwl 22:5c07298d3383 125 // * NVIC_SetPriority(GPIO_P2_IRQn, 5);
lucaslwl 22:5c07298d3383 126 // * NVIC_SetPriority(GPIO_P3_IRQn, 5);
lucaslwl 22:5c07298d3383 127 // * NVIC_SetPriority(GPIO_P4_IRQn, 5);
lucaslwl 22:5c07298d3383 128 // * NVIC_SetPriority(GPIO_P5_IRQn, 5);
lucaslwl 22:5c07298d3383 129 // * NVIC_SetPriority(GPIO_P6_IRQn, 5);
lucaslwl 22:5c07298d3383 130 // * // used by the MAX30001
lucaslwl 22:5c07298d3383 131 // * NVIC_SetPriority(SPI1_IRQn, 0);
lucaslwl 22:5c07298d3383 132 // *
lucaslwl 22:5c07298d3383 133 // *
lucaslwl 22:5c07298d3383 134 // * /// Setup interrupts and callback functions
lucaslwl 22:5c07298d3383 135 // * max30001_InterruptB.disable_irq();
lucaslwl 22:5c07298d3383 136 // * max30001_Interrupt2B.disable_irq();
lucaslwl 22:5c07298d3383 137 // *
lucaslwl 22:5c07298d3383 138 // * max30001_InterruptB.mode(PullUp);
lucaslwl 22:5c07298d3383 139 // * max30001_InterruptB.fall(&MAX30001::Mid_IntB_Handler);
lucaslwl 22:5c07298d3383 140 // *
lucaslwl 22:5c07298d3383 141 // * max30001_Interrupt2B.mode(PullUp);
lucaslwl 22:5c07298d3383 142 // * max30001_Interrupt2B.fall(&MAX30001::Mid_Int2B_Handler);
lucaslwl 22:5c07298d3383 143 // *
lucaslwl 22:5c07298d3383 144 // * max30001_InterruptB.enable_irq();
lucaslwl 22:5c07298d3383 145 // * max30001_Interrupt2B.enable_irq();
lucaslwl 22:5c07298d3383 146 // *
lucaslwl 22:5c07298d3383 147 // * max30001.AllowInterrupts(1);
lucaslwl 22:5c07298d3383 148 // *
lucaslwl 22:5c07298d3383 149 // * // Configuring the FCLK for the ECG, set to 32.768KHZ
lucaslwl 22:5c07298d3383 150 // * pwmout.period_us(31);
lucaslwl 22:5c07298d3383 151 // * pwmout.write(0.5); // 0-1 is 0-100%, 0.5 = 50% duty cycle.
lucaslwl 22:5c07298d3383 152 // * max30001.sw_rst(); // Do a software reset of the MAX30001
lucaslwl 22:5c07298d3383 153 // *
lucaslwl 22:5c07298d3383 154 // * max30001.INT_assignment(MAX30001::MAX30001_INT_B, MAX30001::MAX30001_NO_INT, MAX30001::MAX30001_NO_INT, // en_enint_loc, en_eovf_loc, en_fstint_loc,
lucaslwl 22:5c07298d3383 155 // * MAX30001::MAX30001_INT_2B, MAX30001::MAX30001_INT_2B, MAX30001::MAX30001_NO_INT, // en_dcloffint_loc, en_bint_loc, en_bovf_loc,
lucaslwl 22:5c07298d3383 156 // * MAX30001::MAX30001_INT_2B, MAX30001::MAX30001_INT_2B, MAX30001::MAX30001_NO_INT, // en_bover_loc, en_bundr_loc, en_bcgmon_loc,
lucaslwl 22:5c07298d3383 157 // * MAX30001::MAX30001_INT_B, MAX30001::MAX30001_NO_INT, MAX30001::MAX30001_NO_INT, // en_pint_loc, en_povf_loc, en_pedge_loc,
lucaslwl 22:5c07298d3383 158 // * MAX30001::MAX30001_INT_2B, MAX30001::MAX30001_INT_B, MAX30001::MAX30001_NO_INT, // en_lonint_loc, en_rrint_loc, en_samp_loc,
lucaslwl 22:5c07298d3383 159 // * MAX30001::MAX30001_INT_ODNR, MAX30001::MAX30001_INT_ODNR); // intb_Type, int2b_Type)
lucaslwl 22:5c07298d3383 160 // *
lucaslwl 22:5c07298d3383 161 // * max30001.onDataAvailable(&StreamPacketUint32_ecg);
lucaslwl 22:5c07298d3383 162 // *
lucaslwl 22:5c07298d3383 163 // * /// Set and Start the VCAL input
lucaslwl 22:5c07298d3383 164 // * /// @brief NOTE VCAL must be set first if VCAL is to be used
lucaslwl 22:5c07298d3383 165 // * max30001.CAL_InitStart(EN_VCAL , VMODE, VMAG, FCAL, THIGH, FIFTY);
lucaslwl 22:5c07298d3383 166 // *
lucaslwl 22:5c07298d3383 167 // * /// ECG Initialization
lucaslwl 22:5c07298d3383 168 // * max30001.ECG_InitStart(EN_ECG, OPENP, OPENN, POL, CALP_SEL, CALN_SEL, E_FIT, RATE, GAIN, DHPF, DLPF);
lucaslwl 22:5c07298d3383 169 // *
lucaslwl 22:5c07298d3383 170 // * /// @details The user can call any of the InitStart functions for Pace, BIOZ and RtoR
lucaslwl 22:5c07298d3383 171 // *
lucaslwl 22:5c07298d3383 172 // *
lucaslwl 22:5c07298d3383 173 // * /// @brief Set Rbias & FMSTR over here
lucaslwl 22:5c07298d3383 174 // * max30001.Rbias_FMSTR_Init(EN_RBIAS, RBIASV, RBIASP, RBIASN,FMSTR);
lucaslwl 22:5c07298d3383 175 // *
lucaslwl 22:5c07298d3383 176 // * max30001.synch();
lucaslwl 22:5c07298d3383 177 // *
lucaslwl 22:5c07298d3383 178 // * /// clear the status register for a clean start
lucaslwl 22:5c07298d3383 179 // * max30001.reg_read(MAX30001::STATUS, &all);
lucaslwl 22:5c07298d3383 180 // *
lucaslwl 22:5c07298d3383 181 // * printf("Please wait for data to start streaming\n");
lucaslwl 22:5c07298d3383 182 // * fflush(stdout);
lucaslwl 22:5c07298d3383 183 // *
lucaslwl 22:5c07298d3383 184 // * while (1) {
lucaslwl 22:5c07298d3383 185 // * if(data_trigger == 1){
lucaslwl 22:5c07298d3383 186 // * printf("%ld ", ecgBuffer[ecgIndex]); // Print the ECG data on a serial port terminal software
lucaslwl 22:5c07298d3383 187 // * fflush(stdout);
lucaslwl 22:5c07298d3383 188 // * }
lucaslwl 22:5c07298d3383 189 // * }
lucaslwl 22:5c07298d3383 190 // * }
lucaslwl 22:5c07298d3383 191 // * @endcode
lucaslwl 22:5c07298d3383 192 // *
lucaslwl 22:5c07298d3383 193 // */
lucaslwl 22:5c07298d3383 194 //
lucaslwl 22:5c07298d3383 195 //
lucaslwl 22:5c07298d3383 196 //#ifndef MAX30001_H_
lucaslwl 22:5c07298d3383 197 //#define MAX30001_H_
lucaslwl 22:5c07298d3383 198 //
lucaslwl 22:5c07298d3383 199 //#include "mbed.h"
lucaslwl 22:5c07298d3383 200 //
lucaslwl 22:5c07298d3383 201 //#define mbed_COMPLIANT ///< Uncomment to Use timer for MAX30001 FCLK (for mbed)
lucaslwl 22:5c07298d3383 202 // ///< Comment to use the RTC clock
lucaslwl 22:5c07298d3383 203 //
lucaslwl 22:5c07298d3383 204 //#define ASYNC_SPI_BUFFER_SIZE (32 * 3) ///< Maximimum buffer size for async byte transfers
lucaslwl 22:5c07298d3383 205 //
lucaslwl 22:5c07298d3383 206 /////< Defines for data callbacks
lucaslwl 22:5c07298d3383 207 //#define MAX30001_DATA_ECG 0x30
lucaslwl 22:5c07298d3383 208 //#define MAX30001_DATA_PACE 0x31
lucaslwl 22:5c07298d3383 209 //#define MAX30001_DATA_RTOR 0x32
lucaslwl 22:5c07298d3383 210 //#define MAX30001_DATA_BIOZ 0x33
lucaslwl 22:5c07298d3383 211 //#define MAX30001_DATA_LEADOFF_DC 0x34
lucaslwl 22:5c07298d3383 212 //#define MAX30001_DATA_LEADOFF_AC 0x35
lucaslwl 22:5c07298d3383 213 //#define MAX30001_DATA_BCGMON 0x36
lucaslwl 22:5c07298d3383 214 //#define MAX30001_DATA_ACLEADON 0x37
lucaslwl 22:5c07298d3383 215 //
lucaslwl 22:5c07298d3383 216 //#define MAX30001_SPI_MASTER_PORT 0
lucaslwl 22:5c07298d3383 217 //#define MAX30001_SPI_SS_INDEX 0
lucaslwl 22:5c07298d3383 218 //
lucaslwl 22:5c07298d3383 219 //#define MAX30001_INT_PORT_B 3
lucaslwl 22:5c07298d3383 220 //#define MAX30001_INT_PIN_B 6
lucaslwl 22:5c07298d3383 221 //
lucaslwl 22:5c07298d3383 222 //#define MAX30001_INT_PORT_2B 4
lucaslwl 22:5c07298d3383 223 //#define MAX30001_INT_PIN_2B 5
lucaslwl 22:5c07298d3383 224 //
lucaslwl 22:5c07298d3383 225 //#define MAX30001_INT_PORT_FCLK 1
lucaslwl 22:5c07298d3383 226 //#define MAX30001_INT_PIN_FCLK 7
lucaslwl 22:5c07298d3383 227 //
lucaslwl 22:5c07298d3383 228 //#define MAX30001_FUNC_SEL_TMR 2 ///< 0=FW Control, 1= Pulse Train, 2=Timer
lucaslwl 22:5c07298d3383 229 //
lucaslwl 22:5c07298d3383 230 //#define MAX30001_INDEX 3
lucaslwl 22:5c07298d3383 231 //#define MAX30001_POLARITY 0
lucaslwl 22:5c07298d3383 232 //#define MAX30001_PERIOD 30518
lucaslwl 22:5c07298d3383 233 //#define MAX30001_CYCLE 50
lucaslwl 22:5c07298d3383 234 //
lucaslwl 22:5c07298d3383 235 //#define MAX30001_IOMUX_IO_ENABLE 1
lucaslwl 22:5c07298d3383 236 //
lucaslwl 22:5c07298d3383 237 //#define MAX30001_SPI_PORT 0
lucaslwl 22:5c07298d3383 238 //#define MAX30001_CS_PIN 0
lucaslwl 22:5c07298d3383 239 //#define MAX30001_CS_POLARITY 0
lucaslwl 22:5c07298d3383 240 //#define MAX30001_CS_ACTIVITY_DELAY 0
lucaslwl 22:5c07298d3383 241 //#define MAX30001_CS_INACTIVITY_DELAY 0
lucaslwl 22:5c07298d3383 242 //#define MAX30001_CLK_HI 1
lucaslwl 22:5c07298d3383 243 //#define MAX30001_CLK_LOW 1
lucaslwl 22:5c07298d3383 244 //#define MAX30001_ALT_CLK 0
lucaslwl 22:5c07298d3383 245 //#define MAX30001_CLK_POLARITY 0
lucaslwl 22:5c07298d3383 246 //#define MAX30001_CLK_PHASE 0
lucaslwl 22:5c07298d3383 247 //#define MAX30001_WRITE 1
lucaslwl 22:5c07298d3383 248 //#define MAX30001_READ 0
lucaslwl 22:5c07298d3383 249 //
lucaslwl 22:5c07298d3383 250 //#define MAX30001_INT_PORT_B 3
lucaslwl 22:5c07298d3383 251 //#define MAX30001INT_PIN_B 6
lucaslwl 22:5c07298d3383 252 //
lucaslwl 22:5c07298d3383 253 //void MAX30001_AllowInterrupts(int state);
lucaslwl 22:5c07298d3383 254 //
lucaslwl 22:5c07298d3383 255 ///**
lucaslwl 22:5c07298d3383 256 //* @brief Maxim Integrated MAX30001 ECG/BIOZ chip
lucaslwl 22:5c07298d3383 257 //*/
lucaslwl 22:5c07298d3383 258 //class MAX30001 {
lucaslwl 22:5c07298d3383 259 //
lucaslwl 22:5c07298d3383 260 //public:
lucaslwl 22:5c07298d3383 261 // typedef enum { ///< MAX30001 Register addresses
lucaslwl 22:5c07298d3383 262 // STATUS = 0x01,
lucaslwl 22:5c07298d3383 263 // EN_INT = 0x02,
lucaslwl 22:5c07298d3383 264 // EN_INT2 = 0x03,
lucaslwl 22:5c07298d3383 265 // MNGR_INT = 0x04,
lucaslwl 22:5c07298d3383 266 // MNGR_DYN = 0x05,
lucaslwl 22:5c07298d3383 267 // SW_RST = 0x08,
lucaslwl 22:5c07298d3383 268 // SYNCH = 0x09,
lucaslwl 22:5c07298d3383 269 // FIFO_RST = 0x0A,
lucaslwl 22:5c07298d3383 270 // INFO = 0x0F,
lucaslwl 22:5c07298d3383 271 // CNFG_GEN = 0x10,
lucaslwl 22:5c07298d3383 272 // CNFG_CAL = 0x12,
lucaslwl 22:5c07298d3383 273 // CNFG_EMUX = 0x14,
lucaslwl 22:5c07298d3383 274 // CNFG_ECG = 0x15,
lucaslwl 22:5c07298d3383 275 // CNFG_BMUX = 0x17,
lucaslwl 22:5c07298d3383 276 // CNFG_BIOZ = 0x18,
lucaslwl 22:5c07298d3383 277 // CNFG_PACE = 0x1A,
lucaslwl 22:5c07298d3383 278 // CNFG_RTOR1 = 0x1D,
lucaslwl 22:5c07298d3383 279 // CNFG_RTOR2 = 0x1E,
lucaslwl 22:5c07298d3383 280 //
lucaslwl 22:5c07298d3383 281 // // Data locations
lucaslwl 22:5c07298d3383 282 // ECG_FIFO_BURST = 0x20,
lucaslwl 22:5c07298d3383 283 // ECG_FIFO = 0x21,
lucaslwl 22:5c07298d3383 284 // FIFO_BURST = 0x22,
lucaslwl 22:5c07298d3383 285 // BIOZ_FIFO = 0x23,
lucaslwl 22:5c07298d3383 286 // RTOR = 0x25,
lucaslwl 22:5c07298d3383 287 //
lucaslwl 22:5c07298d3383 288 // PACE0_FIFO_BURST = 0x30,
lucaslwl 22:5c07298d3383 289 // PACE0_A = 0x31,
lucaslwl 22:5c07298d3383 290 // PACE0_B = 0x32,
lucaslwl 22:5c07298d3383 291 // PACE0_C = 0x33,
lucaslwl 22:5c07298d3383 292 //
lucaslwl 22:5c07298d3383 293 // PACE1_FIFO_BURST = 0x34,
lucaslwl 22:5c07298d3383 294 // PACE1_A = 0x35,
lucaslwl 22:5c07298d3383 295 // PACE1_B = 0x36,
lucaslwl 22:5c07298d3383 296 // PACE1_C = 0x37,
lucaslwl 22:5c07298d3383 297 //
lucaslwl 22:5c07298d3383 298 // PACE2_FIFO_BURST = 0x38,
lucaslwl 22:5c07298d3383 299 // PACE2_A = 0x39,
lucaslwl 22:5c07298d3383 300 // PACE2_B = 0x3A,
lucaslwl 22:5c07298d3383 301 // PACE2_C = 0x3B,
lucaslwl 22:5c07298d3383 302 //
lucaslwl 22:5c07298d3383 303 // PACE3_FIFO_BURST = 0x3C,
lucaslwl 22:5c07298d3383 304 // PACE3_A = 0x3D,
lucaslwl 22:5c07298d3383 305 // PACE3_B = 0x3E,
lucaslwl 22:5c07298d3383 306 // PACE3_C = 0x3F,
lucaslwl 22:5c07298d3383 307 //
lucaslwl 22:5c07298d3383 308 // PACE4_FIFO_BURST = 0x40,
lucaslwl 22:5c07298d3383 309 // PACE4_A = 0x41,
lucaslwl 22:5c07298d3383 310 // PACE4_B = 0x42,
lucaslwl 22:5c07298d3383 311 // PACE4_C = 0x43,
lucaslwl 22:5c07298d3383 312 //
lucaslwl 22:5c07298d3383 313 // PACE5_FIFO_BURST = 0x44,
lucaslwl 22:5c07298d3383 314 // PACE5_A = 0x45,
lucaslwl 22:5c07298d3383 315 // PACE5_B = 0x46,
lucaslwl 22:5c07298d3383 316 // PACE5_C = 0x47,
lucaslwl 22:5c07298d3383 317 //
lucaslwl 22:5c07298d3383 318 // } MAX30001_REG_map_t;
lucaslwl 22:5c07298d3383 319 //
lucaslwl 22:5c07298d3383 320 // /**
lucaslwl 22:5c07298d3383 321 // * @brief STATUS (0x01)
lucaslwl 22:5c07298d3383 322 // */
lucaslwl 22:5c07298d3383 323 // typedef union max30001_status_reg {
lucaslwl 22:5c07298d3383 324 // uint32_t all;
lucaslwl 22:5c07298d3383 325 //
lucaslwl 22:5c07298d3383 326 // struct {
lucaslwl 22:5c07298d3383 327 // uint32_t loff_nl : 1;
lucaslwl 22:5c07298d3383 328 // uint32_t loff_nh : 1;
lucaslwl 22:5c07298d3383 329 // uint32_t loff_pl : 1;
lucaslwl 22:5c07298d3383 330 // uint32_t loff_ph : 1;
lucaslwl 22:5c07298d3383 331 //
lucaslwl 22:5c07298d3383 332 // uint32_t bcgmn : 1;
lucaslwl 22:5c07298d3383 333 // uint32_t bcgmp : 1;
lucaslwl 22:5c07298d3383 334 // uint32_t reserved1 : 1;
lucaslwl 22:5c07298d3383 335 // uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 336 //
lucaslwl 22:5c07298d3383 337 // uint32_t pllint : 1;
lucaslwl 22:5c07298d3383 338 // uint32_t samp : 1;
lucaslwl 22:5c07298d3383 339 // uint32_t rrint : 1;
lucaslwl 22:5c07298d3383 340 // uint32_t lonint : 1;
lucaslwl 22:5c07298d3383 341 //
lucaslwl 22:5c07298d3383 342 // uint32_t pedge : 1;
lucaslwl 22:5c07298d3383 343 // uint32_t povf : 1;
lucaslwl 22:5c07298d3383 344 // uint32_t pint : 1;
lucaslwl 22:5c07298d3383 345 // uint32_t bcgmon : 1;
lucaslwl 22:5c07298d3383 346 //
lucaslwl 22:5c07298d3383 347 // uint32_t bundr : 1;
lucaslwl 22:5c07298d3383 348 // uint32_t bover : 1;
lucaslwl 22:5c07298d3383 349 // uint32_t bovf : 1;
lucaslwl 22:5c07298d3383 350 // uint32_t bint : 1;
lucaslwl 22:5c07298d3383 351 //
lucaslwl 22:5c07298d3383 352 // uint32_t dcloffint : 1;
lucaslwl 22:5c07298d3383 353 // uint32_t fstint : 1;
lucaslwl 22:5c07298d3383 354 // uint32_t eovf : 1;
lucaslwl 22:5c07298d3383 355 // uint32_t eint : 1;
lucaslwl 22:5c07298d3383 356 //
lucaslwl 22:5c07298d3383 357 // uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 358 //
lucaslwl 22:5c07298d3383 359 // } bit;
lucaslwl 22:5c07298d3383 360 //
lucaslwl 22:5c07298d3383 361 // } max30001_status_t;
lucaslwl 22:5c07298d3383 362 //
lucaslwl 22:5c07298d3383 363 //
lucaslwl 22:5c07298d3383 364 // /**
lucaslwl 22:5c07298d3383 365 // * @brief EN_INT (0x02)
lucaslwl 22:5c07298d3383 366 // */
lucaslwl 22:5c07298d3383 367 //
lucaslwl 22:5c07298d3383 368 // typedef union max30001_en_int_reg {
lucaslwl 22:5c07298d3383 369 // uint32_t all;
lucaslwl 22:5c07298d3383 370 //
lucaslwl 22:5c07298d3383 371 // struct {
lucaslwl 22:5c07298d3383 372 // uint32_t intb_type : 2;
lucaslwl 22:5c07298d3383 373 // uint32_t reserved1 : 1;
lucaslwl 22:5c07298d3383 374 // uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 375 //
lucaslwl 22:5c07298d3383 376 // uint32_t reserved3 : 1;
lucaslwl 22:5c07298d3383 377 // uint32_t reserved4 : 1;
lucaslwl 22:5c07298d3383 378 // uint32_t reserved5 : 1;
lucaslwl 22:5c07298d3383 379 // uint32_t reserved6 : 1;
lucaslwl 22:5c07298d3383 380 //
lucaslwl 22:5c07298d3383 381 // uint32_t en_pllint : 1;
lucaslwl 22:5c07298d3383 382 // uint32_t en_samp : 1;
lucaslwl 22:5c07298d3383 383 // uint32_t en_rrint : 1;
lucaslwl 22:5c07298d3383 384 // uint32_t en_lonint : 1;
lucaslwl 22:5c07298d3383 385 //
lucaslwl 22:5c07298d3383 386 // uint32_t en_pedge : 1;
lucaslwl 22:5c07298d3383 387 // uint32_t en_povf : 1;
lucaslwl 22:5c07298d3383 388 // uint32_t en_pint : 1;
lucaslwl 22:5c07298d3383 389 // uint32_t en_bcgmon : 1;
lucaslwl 22:5c07298d3383 390 //
lucaslwl 22:5c07298d3383 391 // uint32_t en_bundr : 1;
lucaslwl 22:5c07298d3383 392 // uint32_t en_bover : 1;
lucaslwl 22:5c07298d3383 393 // uint32_t en_bovf : 1;
lucaslwl 22:5c07298d3383 394 // uint32_t en_bint : 1;
lucaslwl 22:5c07298d3383 395 //
lucaslwl 22:5c07298d3383 396 // uint32_t en_dcloffint : 1;
lucaslwl 22:5c07298d3383 397 // uint32_t en_fstint : 1;
lucaslwl 22:5c07298d3383 398 // uint32_t en_eovf : 1;
lucaslwl 22:5c07298d3383 399 // uint32_t en_eint : 1;
lucaslwl 22:5c07298d3383 400 //
lucaslwl 22:5c07298d3383 401 // uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 402 //
lucaslwl 22:5c07298d3383 403 // } bit;
lucaslwl 22:5c07298d3383 404 //
lucaslwl 22:5c07298d3383 405 // } max30001_en_int_t;
lucaslwl 22:5c07298d3383 406 //
lucaslwl 22:5c07298d3383 407 //
lucaslwl 22:5c07298d3383 408 // /**
lucaslwl 22:5c07298d3383 409 // * @brief EN_INT2 (0x03)
lucaslwl 22:5c07298d3383 410 // */
lucaslwl 22:5c07298d3383 411 // typedef union max30001_en_int2_reg {
lucaslwl 22:5c07298d3383 412 // uint32_t all;
lucaslwl 22:5c07298d3383 413 //
lucaslwl 22:5c07298d3383 414 // struct {
lucaslwl 22:5c07298d3383 415 // uint32_t intb_type : 2;
lucaslwl 22:5c07298d3383 416 // uint32_t reserved1 : 1;
lucaslwl 22:5c07298d3383 417 // uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 418 //
lucaslwl 22:5c07298d3383 419 // uint32_t reserved3 : 1;
lucaslwl 22:5c07298d3383 420 // uint32_t reserved4 : 1;
lucaslwl 22:5c07298d3383 421 // uint32_t reserved5 : 1;
lucaslwl 22:5c07298d3383 422 // uint32_t reserved6 : 1;
lucaslwl 22:5c07298d3383 423 //
lucaslwl 22:5c07298d3383 424 // uint32_t en_pllint : 1;
lucaslwl 22:5c07298d3383 425 // uint32_t en_samp : 1;
lucaslwl 22:5c07298d3383 426 // uint32_t en_rrint : 1;
lucaslwl 22:5c07298d3383 427 // uint32_t en_lonint : 1;
lucaslwl 22:5c07298d3383 428 //
lucaslwl 22:5c07298d3383 429 // uint32_t en_pedge : 1;
lucaslwl 22:5c07298d3383 430 // uint32_t en_povf : 1;
lucaslwl 22:5c07298d3383 431 // uint32_t en_pint : 1;
lucaslwl 22:5c07298d3383 432 // uint32_t en_bcgmon : 1;
lucaslwl 22:5c07298d3383 433 //
lucaslwl 22:5c07298d3383 434 // uint32_t en_bundr : 1;
lucaslwl 22:5c07298d3383 435 // uint32_t en_bover : 1;
lucaslwl 22:5c07298d3383 436 // uint32_t en_bovf : 1;
lucaslwl 22:5c07298d3383 437 // uint32_t en_bint : 1;
lucaslwl 22:5c07298d3383 438 //
lucaslwl 22:5c07298d3383 439 // uint32_t en_dcloffint : 1;
lucaslwl 22:5c07298d3383 440 // uint32_t en_fstint : 1;
lucaslwl 22:5c07298d3383 441 // uint32_t en_eovf : 1;
lucaslwl 22:5c07298d3383 442 // uint32_t en_eint : 1;
lucaslwl 22:5c07298d3383 443 //
lucaslwl 22:5c07298d3383 444 // uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 445 //
lucaslwl 22:5c07298d3383 446 // } bit;
lucaslwl 22:5c07298d3383 447 //
lucaslwl 22:5c07298d3383 448 // } max30001_en_int2_t;
lucaslwl 22:5c07298d3383 449 //
lucaslwl 22:5c07298d3383 450 // /**
lucaslwl 22:5c07298d3383 451 // * @brief MNGR_INT (0x04)
lucaslwl 22:5c07298d3383 452 // */
lucaslwl 22:5c07298d3383 453 // typedef union max30001_mngr_int_reg {
lucaslwl 22:5c07298d3383 454 // uint32_t all;
lucaslwl 22:5c07298d3383 455 //
lucaslwl 22:5c07298d3383 456 // struct {
lucaslwl 22:5c07298d3383 457 // uint32_t samp_it : 2;
lucaslwl 22:5c07298d3383 458 // uint32_t clr_samp : 1;
lucaslwl 22:5c07298d3383 459 // uint32_t clr_pedge : 1;
lucaslwl 22:5c07298d3383 460 // uint32_t clr_rrint : 2;
lucaslwl 22:5c07298d3383 461 // uint32_t clr_fast : 1;
lucaslwl 22:5c07298d3383 462 // uint32_t reserved1 : 1;
lucaslwl 22:5c07298d3383 463 // uint32_t reserved2 : 4;
lucaslwl 22:5c07298d3383 464 // uint32_t reserved3 : 4;
lucaslwl 22:5c07298d3383 465 //
lucaslwl 22:5c07298d3383 466 // uint32_t b_fit : 3;
lucaslwl 22:5c07298d3383 467 // uint32_t e_fit : 5;
lucaslwl 22:5c07298d3383 468 //
lucaslwl 22:5c07298d3383 469 // uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 470 //
lucaslwl 22:5c07298d3383 471 // } bit;
lucaslwl 22:5c07298d3383 472 //
lucaslwl 22:5c07298d3383 473 // } max30001_mngr_int_t;
lucaslwl 22:5c07298d3383 474 //
lucaslwl 22:5c07298d3383 475 // /**
lucaslwl 22:5c07298d3383 476 // * @brief MNGR_DYN (0x05)
lucaslwl 22:5c07298d3383 477 // */
lucaslwl 22:5c07298d3383 478 // typedef union max30001_mngr_dyn_reg {
lucaslwl 22:5c07298d3383 479 // uint32_t all;
lucaslwl 22:5c07298d3383 480 //
lucaslwl 22:5c07298d3383 481 // struct {
lucaslwl 22:5c07298d3383 482 // uint32_t bloff_lo_it : 8;
lucaslwl 22:5c07298d3383 483 // uint32_t bloff_hi_it : 8;
lucaslwl 22:5c07298d3383 484 // uint32_t fast_th : 6;
lucaslwl 22:5c07298d3383 485 // uint32_t fast : 2;
lucaslwl 22:5c07298d3383 486 // uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 487 // } bit;
lucaslwl 22:5c07298d3383 488 //
lucaslwl 22:5c07298d3383 489 // } max30001_mngr_dyn_t;
lucaslwl 22:5c07298d3383 490 //
lucaslwl 22:5c07298d3383 491 //
lucaslwl 22:5c07298d3383 492 // /**
lucaslwl 22:5c07298d3383 493 // * @brief INFO (0x0F)
lucaslwl 22:5c07298d3383 494 // */
lucaslwl 22:5c07298d3383 495 // typedef union max30001_info_reg {
lucaslwl 22:5c07298d3383 496 // uint32_t all;
lucaslwl 22:5c07298d3383 497 // struct {
lucaslwl 22:5c07298d3383 498 // uint32_t serial : 12;
lucaslwl 22:5c07298d3383 499 // uint32_t part_id : 2;
lucaslwl 22:5c07298d3383 500 // uint32_t sample : 1;
lucaslwl 22:5c07298d3383 501 // uint32_t reserved1 : 1;
lucaslwl 22:5c07298d3383 502 // uint32_t rev_id : 4;
lucaslwl 22:5c07298d3383 503 // uint32_t pattern : 4;
lucaslwl 22:5c07298d3383 504 // uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 505 // } bit;
lucaslwl 22:5c07298d3383 506 //
lucaslwl 22:5c07298d3383 507 // } max30001_info_t;
lucaslwl 22:5c07298d3383 508 //
lucaslwl 22:5c07298d3383 509 // /**
lucaslwl 22:5c07298d3383 510 // * @brief CNFG_GEN (0x10)
lucaslwl 22:5c07298d3383 511 // */
lucaslwl 22:5c07298d3383 512 // typedef union max30001_cnfg_gen_reg {
lucaslwl 22:5c07298d3383 513 // uint32_t all;
lucaslwl 22:5c07298d3383 514 // struct {
lucaslwl 22:5c07298d3383 515 // uint32_t rbiasn : 1;
lucaslwl 22:5c07298d3383 516 // uint32_t rbiasp : 1;
lucaslwl 22:5c07298d3383 517 // uint32_t rbiasv : 2;
lucaslwl 22:5c07298d3383 518 // uint32_t en_rbias : 2;
lucaslwl 22:5c07298d3383 519 // uint32_t vth : 2;
lucaslwl 22:5c07298d3383 520 // uint32_t imag : 3;
lucaslwl 22:5c07298d3383 521 // uint32_t ipol : 1;
lucaslwl 22:5c07298d3383 522 // uint32_t en_dcloff : 2;
lucaslwl 22:5c07298d3383 523 // uint32_t en_bloff : 2;
lucaslwl 22:5c07298d3383 524 // uint32_t reserved1 : 1;
lucaslwl 22:5c07298d3383 525 // uint32_t en_pace : 1;
lucaslwl 22:5c07298d3383 526 // uint32_t en_bioz : 1;
lucaslwl 22:5c07298d3383 527 // uint32_t en_ecg : 1;
lucaslwl 22:5c07298d3383 528 // uint32_t fmstr : 2;
lucaslwl 22:5c07298d3383 529 // uint32_t en_ulp_lon : 2;
lucaslwl 22:5c07298d3383 530 // uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 531 // } bit;
lucaslwl 22:5c07298d3383 532 //
lucaslwl 22:5c07298d3383 533 // } max30001_cnfg_gen_t;
lucaslwl 22:5c07298d3383 534 //
lucaslwl 22:5c07298d3383 535 //
lucaslwl 22:5c07298d3383 536 // /**
lucaslwl 22:5c07298d3383 537 // * @brief CNFG_CAL (0x12)
lucaslwl 22:5c07298d3383 538 // */
lucaslwl 22:5c07298d3383 539 // typedef union max30001_cnfg_cal_reg {
lucaslwl 22:5c07298d3383 540 // uint32_t all;
lucaslwl 22:5c07298d3383 541 // struct {
lucaslwl 22:5c07298d3383 542 // uint32_t thigh : 11;
lucaslwl 22:5c07298d3383 543 // uint32_t fifty : 1;
lucaslwl 22:5c07298d3383 544 // uint32_t fcal : 3;
lucaslwl 22:5c07298d3383 545 // uint32_t reserved1 : 5;
lucaslwl 22:5c07298d3383 546 // uint32_t vmag : 1;
lucaslwl 22:5c07298d3383 547 // uint32_t vmode : 1;
lucaslwl 22:5c07298d3383 548 // uint32_t en_vcal : 1;
lucaslwl 22:5c07298d3383 549 // uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 550 // uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 551 // } bit;
lucaslwl 22:5c07298d3383 552 //
lucaslwl 22:5c07298d3383 553 // } max30001_cnfg_cal_t;
lucaslwl 22:5c07298d3383 554 //
lucaslwl 22:5c07298d3383 555 // /**
lucaslwl 22:5c07298d3383 556 // * @brief CNFG_EMUX (0x14)
lucaslwl 22:5c07298d3383 557 // */
lucaslwl 22:5c07298d3383 558 // typedef union max30001_cnfg_emux_reg {
lucaslwl 22:5c07298d3383 559 // uint32_t all;
lucaslwl 22:5c07298d3383 560 // struct {
lucaslwl 22:5c07298d3383 561 // uint32_t reserved1 : 16;
lucaslwl 22:5c07298d3383 562 // uint32_t caln_sel : 2;
lucaslwl 22:5c07298d3383 563 // uint32_t calp_sel : 2;
lucaslwl 22:5c07298d3383 564 // uint32_t openn : 1;
lucaslwl 22:5c07298d3383 565 // uint32_t openp : 1;
lucaslwl 22:5c07298d3383 566 // uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 567 // uint32_t pol : 1;
lucaslwl 22:5c07298d3383 568 // uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 569 // } bit;
lucaslwl 22:5c07298d3383 570 //
lucaslwl 22:5c07298d3383 571 // } max30001_cnfg_emux_t;
lucaslwl 22:5c07298d3383 572 //
lucaslwl 22:5c07298d3383 573 //
lucaslwl 22:5c07298d3383 574 // /**
lucaslwl 22:5c07298d3383 575 // * @brief CNFG_ECG (0x15)
lucaslwl 22:5c07298d3383 576 // */
lucaslwl 22:5c07298d3383 577 // typedef union max30001_cnfg_ecg_reg {
lucaslwl 22:5c07298d3383 578 // uint32_t all;
lucaslwl 22:5c07298d3383 579 // struct {
lucaslwl 22:5c07298d3383 580 // uint32_t reserved1 : 12;
lucaslwl 22:5c07298d3383 581 // uint32_t dlpf : 2;
lucaslwl 22:5c07298d3383 582 // uint32_t dhpf : 1;
lucaslwl 22:5c07298d3383 583 // uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 584 // uint32_t gain : 2;
lucaslwl 22:5c07298d3383 585 // uint32_t reserved3 : 4;
lucaslwl 22:5c07298d3383 586 // uint32_t rate : 2;
lucaslwl 22:5c07298d3383 587 //
lucaslwl 22:5c07298d3383 588 // uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 589 // } bit;
lucaslwl 22:5c07298d3383 590 //
lucaslwl 22:5c07298d3383 591 // } max30001_cnfg_ecg_t;
lucaslwl 22:5c07298d3383 592 //
lucaslwl 22:5c07298d3383 593 // /**
lucaslwl 22:5c07298d3383 594 // * @brief CNFG_BMUX (0x17)
lucaslwl 22:5c07298d3383 595 // */
lucaslwl 22:5c07298d3383 596 // typedef union max30001_cnfg_bmux_reg {
lucaslwl 22:5c07298d3383 597 // uint32_t all;
lucaslwl 22:5c07298d3383 598 // struct {
lucaslwl 22:5c07298d3383 599 // uint32_t fbist : 2;
lucaslwl 22:5c07298d3383 600 // uint32_t reserved1 : 2;
lucaslwl 22:5c07298d3383 601 // uint32_t rmod : 3;
lucaslwl 22:5c07298d3383 602 // uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 603 // uint32_t rnom : 3;
lucaslwl 22:5c07298d3383 604 // uint32_t en_bist : 1;
lucaslwl 22:5c07298d3383 605 // uint32_t cg_mode : 2;
lucaslwl 22:5c07298d3383 606 // uint32_t reserved3 : 2;
lucaslwl 22:5c07298d3383 607 // uint32_t caln_sel : 2;
lucaslwl 22:5c07298d3383 608 // uint32_t calp_sel : 2;
lucaslwl 22:5c07298d3383 609 // uint32_t openn : 1;
lucaslwl 22:5c07298d3383 610 // uint32_t openp : 1;
lucaslwl 22:5c07298d3383 611 // uint32_t reserved4 : 2;
lucaslwl 22:5c07298d3383 612 // uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 613 // } bit;
lucaslwl 22:5c07298d3383 614 //
lucaslwl 22:5c07298d3383 615 // } max30001_cnfg_bmux_t;
lucaslwl 22:5c07298d3383 616 //
lucaslwl 22:5c07298d3383 617 // /**
lucaslwl 22:5c07298d3383 618 // * @brief CNFG_BIOZ (0x18)
lucaslwl 22:5c07298d3383 619 // */
lucaslwl 22:5c07298d3383 620 // typedef union max30001_bioz_reg {
lucaslwl 22:5c07298d3383 621 // uint32_t all;
lucaslwl 22:5c07298d3383 622 // struct {
lucaslwl 22:5c07298d3383 623 // uint32_t phoff : 4;
lucaslwl 22:5c07298d3383 624 // uint32_t cgmag : 3;
lucaslwl 22:5c07298d3383 625 // uint32_t cgmon : 1;
lucaslwl 22:5c07298d3383 626 // uint32_t fcgen : 4;
lucaslwl 22:5c07298d3383 627 // uint32_t dlpf : 2;
lucaslwl 22:5c07298d3383 628 // uint32_t dhpf : 2;
lucaslwl 22:5c07298d3383 629 // uint32_t gain : 2;
lucaslwl 22:5c07298d3383 630 // uint32_t reserved1 : 1;
lucaslwl 22:5c07298d3383 631 // uint32_t ext_rbias : 1;
lucaslwl 22:5c07298d3383 632 // uint32_t ahpf : 3;
lucaslwl 22:5c07298d3383 633 // uint32_t rate : 1;
lucaslwl 22:5c07298d3383 634 // uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 635 // } bit;
lucaslwl 22:5c07298d3383 636 //
lucaslwl 22:5c07298d3383 637 // } max30001_cnfg_bioz_t;
lucaslwl 22:5c07298d3383 638 //
lucaslwl 22:5c07298d3383 639 //
lucaslwl 22:5c07298d3383 640 // /**
lucaslwl 22:5c07298d3383 641 // * @brief CNFG_PACE (0x1A)
lucaslwl 22:5c07298d3383 642 // */
lucaslwl 22:5c07298d3383 643 // typedef union max30001_cnfg_pace_reg {
lucaslwl 22:5c07298d3383 644 // uint32_t all;
lucaslwl 22:5c07298d3383 645 //
lucaslwl 22:5c07298d3383 646 // struct {
lucaslwl 22:5c07298d3383 647 // uint32_t dacn : 4;
lucaslwl 22:5c07298d3383 648 // uint32_t dacp : 4;
lucaslwl 22:5c07298d3383 649 // uint32_t reserved1 : 4;
lucaslwl 22:5c07298d3383 650 // uint32_t aout : 2;
lucaslwl 22:5c07298d3383 651 // uint32_t aout_lbw : 1;
lucaslwl 22:5c07298d3383 652 // uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 653 // uint32_t gain : 3;
lucaslwl 22:5c07298d3383 654 // uint32_t gn_diff_off : 1;
lucaslwl 22:5c07298d3383 655 // uint32_t reserved3 : 3;
lucaslwl 22:5c07298d3383 656 // uint32_t pol : 1;
lucaslwl 22:5c07298d3383 657 // uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 658 // } bit;
lucaslwl 22:5c07298d3383 659 //
lucaslwl 22:5c07298d3383 660 // } max30001_cnfg_pace_t;
lucaslwl 22:5c07298d3383 661 //
lucaslwl 22:5c07298d3383 662 // /**
lucaslwl 22:5c07298d3383 663 // * @brief CNFG_RTOR1 (0x1D)
lucaslwl 22:5c07298d3383 664 // */
lucaslwl 22:5c07298d3383 665 // typedef union max30001_cnfg_rtor1_reg {
lucaslwl 22:5c07298d3383 666 // uint32_t all;
lucaslwl 22:5c07298d3383 667 // struct {
lucaslwl 22:5c07298d3383 668 // uint32_t reserved1 : 8;
lucaslwl 22:5c07298d3383 669 // uint32_t ptsf : 4;
lucaslwl 22:5c07298d3383 670 // uint32_t pavg : 2;
lucaslwl 22:5c07298d3383 671 // uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 672 // uint32_t en_rtor : 1;
lucaslwl 22:5c07298d3383 673 // uint32_t gain : 4;
lucaslwl 22:5c07298d3383 674 // uint32_t wndw : 4;
lucaslwl 22:5c07298d3383 675 // uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 676 // } bit;
lucaslwl 22:5c07298d3383 677 //
lucaslwl 22:5c07298d3383 678 // } max30001_cnfg_rtor1_t;
lucaslwl 22:5c07298d3383 679 //
lucaslwl 22:5c07298d3383 680 // /**
lucaslwl 22:5c07298d3383 681 // * @brief CNFG_RTOR2 (0x1E)
lucaslwl 22:5c07298d3383 682 // */
lucaslwl 22:5c07298d3383 683 // typedef union max30001_cnfg_rtor2_reg {
lucaslwl 22:5c07298d3383 684 // uint32_t all;
lucaslwl 22:5c07298d3383 685 // struct {
lucaslwl 22:5c07298d3383 686 // uint32_t reserved1 : 8;
lucaslwl 22:5c07298d3383 687 // uint32_t rhsf : 3;
lucaslwl 22:5c07298d3383 688 // uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 689 // uint32_t ravg : 2;
lucaslwl 22:5c07298d3383 690 // uint32_t reserved3 : 2;
lucaslwl 22:5c07298d3383 691 // uint32_t hoff : 6;
lucaslwl 22:5c07298d3383 692 // uint32_t reserved4 : 2;
lucaslwl 22:5c07298d3383 693 // uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 694 // } bit;
lucaslwl 22:5c07298d3383 695 //
lucaslwl 22:5c07298d3383 696 // } max30001_cnfg_rtor2_t;
lucaslwl 22:5c07298d3383 697 //
lucaslwl 22:5c07298d3383 698 // /*********************************************************************************/
lucaslwl 22:5c07298d3383 699 //
lucaslwl 22:5c07298d3383 700 // typedef enum {
lucaslwl 22:5c07298d3383 701 // MAX30001_NO_INT = 0, ///< No interrupt
lucaslwl 22:5c07298d3383 702 // MAX30001_INT_B = 1, ///< INTB selected for interrupt
lucaslwl 22:5c07298d3383 703 // MAX30001_INT_2B = 2 ///< INT2B selected for interrupt
lucaslwl 22:5c07298d3383 704 // } max30001_intrpt_Location_t;
lucaslwl 22:5c07298d3383 705 //
lucaslwl 22:5c07298d3383 706 // typedef enum {
lucaslwl 22:5c07298d3383 707 // MAX30001_INT_DISABLED = 0b00,
lucaslwl 22:5c07298d3383 708 // MAX30001_INT_CMOS = 0b01,
lucaslwl 22:5c07298d3383 709 // MAX30001_INT_ODN = 0b10,
lucaslwl 22:5c07298d3383 710 // MAX30001_INT_ODNR = 0b11
lucaslwl 22:5c07298d3383 711 // } max30001_intrpt_type_t;
lucaslwl 22:5c07298d3383 712 //
lucaslwl 22:5c07298d3383 713 // typedef enum { ///< Input Polarity selection
lucaslwl 22:5c07298d3383 714 // MAX30001_NON_INV = 0, ///< Non-Inverted
lucaslwl 22:5c07298d3383 715 // MAX30001_INV = 1 ///< Inverted
lucaslwl 22:5c07298d3383 716 // } max30001_emux_pol_t;
lucaslwl 22:5c07298d3383 717 //
lucaslwl 22:5c07298d3383 718 // typedef enum { ///< OPENP and OPENN setting
lucaslwl 22:5c07298d3383 719 // MAX30001_ECG_CON_AFE = 0, ///< ECGx is connected to AFE channel
lucaslwl 22:5c07298d3383 720 // MAX30001_ECG_ISO_AFE = 1 ///< ECGx is isolated from AFE channel
lucaslwl 22:5c07298d3383 721 // } max30001_emux_openx_t;
lucaslwl 22:5c07298d3383 722 //
lucaslwl 22:5c07298d3383 723 // typedef enum { ///< EMUX_CALP_SEL & EMUX_CALN_SEL
lucaslwl 22:5c07298d3383 724 // MAX30001_NO_CAL_SIG = 0b00, ///< No calibration signal is applied
lucaslwl 22:5c07298d3383 725 // MAX30001_INPT_VMID = 0b01, ///< Input is connected to VMID
lucaslwl 22:5c07298d3383 726 // MAX30001_INPT_VCALP = 0b10, ///< Input is connected to VCALP
lucaslwl 22:5c07298d3383 727 // MAX30001_INPT_VCALN = 0b11 ///< Input is connected to VCALN
lucaslwl 22:5c07298d3383 728 // } max30001_emux_calx_sel_t;
lucaslwl 22:5c07298d3383 729 //
lucaslwl 22:5c07298d3383 730 // typedef enum { ///< EN_ECG, EN_BIOZ, EN_PACE
lucaslwl 22:5c07298d3383 731 // MAX30001_CHANNEL_DISABLED = 0b0,
lucaslwl 22:5c07298d3383 732 // MAX30001_CHANNEL_ENABLED = 0b1
lucaslwl 22:5c07298d3383 733 // } max30001_en_feature_t;
lucaslwl 22:5c07298d3383 734 //
lucaslwl 22:5c07298d3383 735 // /*********************************************************************************/
lucaslwl 22:5c07298d3383 736 // // Data
lucaslwl 22:5c07298d3383 737 // uint32_t max30001_ECG_FIFO_buffer[32]; ///< (303 for internal test)
lucaslwl 22:5c07298d3383 738 // uint32_t max30001_BIOZ_FIFO_buffer[8]; ///< (303 for internal test)
lucaslwl 22:5c07298d3383 739 //
lucaslwl 22:5c07298d3383 740 // uint32_t max30001_PACE[18]; ///< Pace Data 0-5
lucaslwl 22:5c07298d3383 741 //
lucaslwl 22:5c07298d3383 742 // uint32_t max30001_RtoR_data; ///< This holds the RtoR data
lucaslwl 22:5c07298d3383 743 //
lucaslwl 22:5c07298d3383 744 // uint32_t max30001_DCLeadOff; ///< This holds the LeadOff data, Last 4 bits give
lucaslwl 22:5c07298d3383 745 // ///< the status, BIT3=LOFF_PH, BIT2=LOFF_PL,
lucaslwl 22:5c07298d3383 746 // ///< BIT1=LOFF_NH, BIT0=LOFF_NL
lucaslwl 22:5c07298d3383 747 // ///< 8th and 9th bits tell Lead off is due to ECG or BIOZ.
lucaslwl 22:5c07298d3383 748 // ///< 0b01 = ECG Lead Off and 0b10 = BIOZ Lead off
lucaslwl 22:5c07298d3383 749 //
lucaslwl 22:5c07298d3383 750 // uint32_t max30001_ACLeadOff; ///< This gives the state of the BIOZ AC Lead Off
lucaslwl 22:5c07298d3383 751 // ///< state. BIT 1 = BOVER, BIT 0 = BUNDR
lucaslwl 22:5c07298d3383 752 //
lucaslwl 22:5c07298d3383 753 // uint32_t max30001_bcgmon; ///< This holds the BCGMON data, BIT 1 = BCGMP, BIT0 =
lucaslwl 22:5c07298d3383 754 // ///< BCGMN
lucaslwl 22:5c07298d3383 755 //
lucaslwl 22:5c07298d3383 756 // uint32_t max30001_LeadOn; ///< This holds the LeadOn data, BIT1 = BIOZ Lead ON,
lucaslwl 22:5c07298d3383 757 // ///< BIT0 = ECG Lead ON, BIT8= Lead On Status Bit
lucaslwl 22:5c07298d3383 758 //
lucaslwl 22:5c07298d3383 759 // uint32_t max30001_timeout; ///< If the PLL does not respond, timeout and get out.
lucaslwl 22:5c07298d3383 760 //
lucaslwl 22:5c07298d3383 761 // typedef struct { ///< Creating a structure for BLE data
lucaslwl 22:5c07298d3383 762 // int16_t R2R;
lucaslwl 22:5c07298d3383 763 // int16_t fmstr;
lucaslwl 22:5c07298d3383 764 // } max30001_bledata_t;
lucaslwl 22:5c07298d3383 765 //
lucaslwl 22:5c07298d3383 766 // max30001_bledata_t hspValMax30001; // R2R, FMSTR
lucaslwl 22:5c07298d3383 767 //
lucaslwl 22:5c07298d3383 768 // max30001_status_t global_status;
lucaslwl 22:5c07298d3383 769 //
lucaslwl 22:5c07298d3383 770 // /**
lucaslwl 22:5c07298d3383 771 // * @brief Constructor that accepts pin names for the SPI interface
lucaslwl 22:5c07298d3383 772 // * @param spi pointer to the mbed SPI object
lucaslwl 22:5c07298d3383 773 // */
lucaslwl 22:5c07298d3383 774 // MAX30001(SPI *spi);
lucaslwl 22:5c07298d3383 775 //
lucaslwl 22:5c07298d3383 776 // /**
lucaslwl 22:5c07298d3383 777 // * @brief Constructor that accepts pin names for the SPI interface
lucaslwl 22:5c07298d3383 778 // * @param mosi master out slave in pin name
lucaslwl 22:5c07298d3383 779 // * @param miso master in slave out pin name
lucaslwl 22:5c07298d3383 780 // * @param sclk serial clock pin name
lucaslwl 22:5c07298d3383 781 // * @param cs chip select pin name
lucaslwl 22:5c07298d3383 782 // */
lucaslwl 22:5c07298d3383 783 // MAX30001(PinName mosi, PinName miso, PinName sclk, PinName cs);
lucaslwl 22:5c07298d3383 784 //
lucaslwl 22:5c07298d3383 785 // /**
lucaslwl 22:5c07298d3383 786 // * MAX30001 destructor
lucaslwl 22:5c07298d3383 787 // */
lucaslwl 22:5c07298d3383 788 // ~MAX30001(void);
lucaslwl 22:5c07298d3383 789 //
lucaslwl 22:5c07298d3383 790 // /**
lucaslwl 22:5c07298d3383 791 // * @brief This function is MAXIM Proprietary. It channels the RTC crystal
lucaslwl 22:5c07298d3383 792 // * @brief clock to P1.7. Thus providing 32768Hz on FCLK pin of the MAX30001-3
lucaslwl 22:5c07298d3383 793 // */
lucaslwl 22:5c07298d3383 794 // void FCLK_MaximOnly(void);
lucaslwl 22:5c07298d3383 795 //
lucaslwl 22:5c07298d3383 796 // /**
lucaslwl 22:5c07298d3383 797 // * @brief This function sets up the Resistive Bias mode and also selects the master clock frequency.
lucaslwl 22:5c07298d3383 798 // * @brief Uses Register: CNFG_GEN-0x10
lucaslwl 22:5c07298d3383 799 // * @param En_rbias: Enable and Select Resitive Lead Bias Mode
lucaslwl 22:5c07298d3383 800 // * @param Rbiasv: Resistive Bias Mode Value Selection
lucaslwl 22:5c07298d3383 801 // * @param Rbiasp: Enables Resistive Bias on Positive Input
lucaslwl 22:5c07298d3383 802 // * @param Rbiasn: Enables Resistive Bias on Negative Input
lucaslwl 22:5c07298d3383 803 // * @param Fmstr: Selects Master Clock Frequency
lucaslwl 22:5c07298d3383 804 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 805 // *
lucaslwl 22:5c07298d3383 806 // */
lucaslwl 22:5c07298d3383 807 // int Rbias_FMSTR_Init(uint8_t En_rbias, uint8_t Rbiasv,
lucaslwl 22:5c07298d3383 808 // uint8_t Rbiasp, uint8_t Rbiasn, uint8_t Fmstr);
lucaslwl 22:5c07298d3383 809 //
lucaslwl 22:5c07298d3383 810 // /**
lucaslwl 22:5c07298d3383 811 // * @brief This function uses sets up the calibration signal internally. If it is desired to use the internal signal, then
lucaslwl 22:5c07298d3383 812 // * @brief this function must be called and the registers set, prior to setting the CALP_SEL and CALN_SEL in the ECG_InitStart
lucaslwl 22:5c07298d3383 813 // * @brief and BIOZ_InitStart functions.
lucaslwl 22:5c07298d3383 814 // * @brief Uses Register: CNFG_CAL-0x12
lucaslwl 22:5c07298d3383 815 // * @param En_Vcal: Calibration Source (VCALP and VCALN) Enable
lucaslwl 22:5c07298d3383 816 // * @param Vmode: Calibration Source Mode Selection
lucaslwl 22:5c07298d3383 817 // * @param Vmag: Calibration Source Magnitude Selection (VMAG)
lucaslwl 22:5c07298d3383 818 // * @param Fcal: Calibration Source Frequency Selection (FCAL)
lucaslwl 22:5c07298d3383 819 // * @param Thigh: Calibration Source Time High Selection
lucaslwl 22:5c07298d3383 820 // * @param Fifty: Calibration Source Duty Cycle Mode Selection
lucaslwl 22:5c07298d3383 821 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 822 // *
lucaslwl 22:5c07298d3383 823 // */
lucaslwl 22:5c07298d3383 824 // int CAL_InitStart(uint8_t En_Vcal, uint8_t Vmode, uint8_t Vmag,
lucaslwl 22:5c07298d3383 825 // uint8_t Fcal, uint16_t Thigh, uint8_t Fifty);
lucaslwl 22:5c07298d3383 826 //
lucaslwl 22:5c07298d3383 827 // /**
lucaslwl 22:5c07298d3383 828 // * @brief This function disables the VCAL signal
lucaslwl 22:5c07298d3383 829 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 830 // */
lucaslwl 22:5c07298d3383 831 // int CAL_Stop(void);
lucaslwl 22:5c07298d3383 832 //
lucaslwl 22:5c07298d3383 833 // /**
lucaslwl 22:5c07298d3383 834 // * @brief This function handles the assignment of the two interrupt pins (INTB & INT2B) with various
lucaslwl 22:5c07298d3383 835 // * @brief functions/behaviors of the MAX30001. Also, each pin can be configured for different drive capability.
lucaslwl 22:5c07298d3383 836 // * @brief Uses Registers: EN_INT-0x02 and EN_INT2-0x03.
lucaslwl 22:5c07298d3383 837 // * @param max30001_intrpt_Locatio_t <argument>: All the arguments with the aforementioned enumeration essentially
lucaslwl 22:5c07298d3383 838 // * can be configured to generate an interrupt on either INTB or INT2B or NONE.
lucaslwl 22:5c07298d3383 839 // * @param max30001_intrpt_type_t intb_Type: INTB Port Type (EN_INT Selections).
lucaslwl 22:5c07298d3383 840 // * @param max30001_intrpt_type _t int2b_Type: INT2B Port Type (EN_INT2 Selections)
lucaslwl 22:5c07298d3383 841 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 842 // *
lucaslwl 22:5c07298d3383 843 // */
lucaslwl 22:5c07298d3383 844 // int INT_assignment(max30001_intrpt_Location_t en_enint_loc, max30001_intrpt_Location_t en_eovf_loc, max30001_intrpt_Location_t en_fstint_loc,
lucaslwl 22:5c07298d3383 845 // max30001_intrpt_Location_t en_dcloffint_loc, max30001_intrpt_Location_t en_bint_loc, max30001_intrpt_Location_t en_bovf_loc,
lucaslwl 22:5c07298d3383 846 // max30001_intrpt_Location_t en_bover_loc, max30001_intrpt_Location_t en_bundr_loc, max30001_intrpt_Location_t en_bcgmon_loc,
lucaslwl 22:5c07298d3383 847 // max30001_intrpt_Location_t en_pint_loc, max30001_intrpt_Location_t en_povf_loc, max30001_intrpt_Location_t en_pedge_loc,
lucaslwl 22:5c07298d3383 848 // max30001_intrpt_Location_t en_lonint_loc, max30001_intrpt_Location_t en_rrint_loc, max30001_intrpt_Location_t en_samp_loc,
lucaslwl 22:5c07298d3383 849 // max30001_intrpt_type_t intb_Type, max30001_intrpt_type_t int2b_Type);
lucaslwl 22:5c07298d3383 850 //
lucaslwl 22:5c07298d3383 851 //
lucaslwl 22:5c07298d3383 852 //
lucaslwl 22:5c07298d3383 853 // /**
lucaslwl 22:5c07298d3383 854 // * @brief For MAX30001/3 ONLY
lucaslwl 22:5c07298d3383 855 // * @brief This function sets up the MAX30001 for the ECG measurements.
lucaslwl 22:5c07298d3383 856 // * @brief Registers used: CNFG_EMUX, CNFG_GEN, MNGR_INT, CNFG_ECG.
lucaslwl 22:5c07298d3383 857 // * @param En_ecg: ECG Channel Enable <CNFG_GEN register bits>
lucaslwl 22:5c07298d3383 858 // * @param Openp: Open the ECGN Input Switch (most often used for testing and calibration studies) <CNFG_EMUX register bits>
lucaslwl 22:5c07298d3383 859 // * @param Openn: Open the ECGN Input Switch (most often used for testing and calibration studies) <CNFG_EMUX register bits>
lucaslwl 22:5c07298d3383 860 // * @param Calp_sel: ECGP Calibration Selection <CNFG_EMUX register bits>
lucaslwl 22:5c07298d3383 861 // * @param Caln_sel: ECGN Calibration Selection <CNFG_EMUX register bits>
lucaslwl 22:5c07298d3383 862 // * @param E_fit: ECG FIFO Interrupt Threshold (issues EINT based on number of unread FIFO records) <CNFG_GEN register bits>
lucaslwl 22:5c07298d3383 863 // * @param Clr_rrint: RTOR R Detect Interrupt (RRINT) Clear Behavior <CNFG_GEN register bits>
lucaslwl 22:5c07298d3383 864 // * @param Rate: ECG Data Rate
lucaslwl 22:5c07298d3383 865 // * @param Gain: ECG Channel Gain Setting
lucaslwl 22:5c07298d3383 866 // * @param Dhpf: ECG Channel Digital High Pass Filter Cutoff Frequency
lucaslwl 22:5c07298d3383 867 // * @param Dlpf: ECG Channel Digital Low Pass Filter Cutoff Frequency
lucaslwl 22:5c07298d3383 868 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 869 // *
lucaslwl 22:5c07298d3383 870 // */
lucaslwl 22:5c07298d3383 871 // int ECG_InitStart(uint8_t En_ecg, uint8_t Openp, uint8_t Openn,
lucaslwl 22:5c07298d3383 872 // uint8_t Pol, uint8_t Calp_sel, uint8_t Caln_sel,
lucaslwl 22:5c07298d3383 873 // uint8_t E_fit, uint8_t Rate, uint8_t Gain,
lucaslwl 22:5c07298d3383 874 // uint8_t Dhpf, uint8_t Dlpf);
lucaslwl 22:5c07298d3383 875 //
lucaslwl 22:5c07298d3383 876 // /**
lucaslwl 22:5c07298d3383 877 // * @brief For MAX30001/3 ONLY
lucaslwl 22:5c07298d3383 878 // * @brief This function enables the Fast mode feature of the ECG.
lucaslwl 22:5c07298d3383 879 // * @brief Registers used: MNGR_INT-0x04, MNGR_DYN-0x05
lucaslwl 22:5c07298d3383 880 // * @param Clr_Fast: FAST MODE Interrupt Clear Behavior <MNGR_INT Register>
lucaslwl 22:5c07298d3383 881 // * @param Fast: ECG Channel Fast Recovery Mode Selection (ECG High Pass Filter Bypass) <MNGR_DYN Register>
lucaslwl 22:5c07298d3383 882 // * @param Fast_Th: Automatic Fast Recovery Threshold
lucaslwl 22:5c07298d3383 883 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 884 // *
lucaslwl 22:5c07298d3383 885 // */
lucaslwl 22:5c07298d3383 886 // int ECGFast_Init(uint8_t Clr_Fast, uint8_t Fast, uint8_t Fast_Th);
lucaslwl 22:5c07298d3383 887 //
lucaslwl 22:5c07298d3383 888 // /**
lucaslwl 22:5c07298d3383 889 // * @brief For MAX30001/3 ONLY
lucaslwl 22:5c07298d3383 890 // * @brief This function disables the ECG.
lucaslwl 22:5c07298d3383 891 // * @brief Uses Register CNFG_GEN-0x10.
lucaslwl 22:5c07298d3383 892 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 893 // *
lucaslwl 22:5c07298d3383 894 // */
lucaslwl 22:5c07298d3383 895 // int Stop_ECG(void);
lucaslwl 22:5c07298d3383 896 //
lucaslwl 22:5c07298d3383 897 // /**
lucaslwl 22:5c07298d3383 898 // * @brief For MAX30001 ONLY
lucaslwl 22:5c07298d3383 899 // * @brief This function sets up the MAX30001 for pace signal detection.
lucaslwl 22:5c07298d3383 900 // * @brief If both PACE and BIOZ are turned ON, then make sure Fcgen is set for 80K or 40K in the
lucaslwl 22:5c07298d3383 901 // * @brief max30001_BIOZ_InitStart() function. However, if Only PACE is on but BIOZ off, then Fcgen can be set
lucaslwl 22:5c07298d3383 902 // * @brief for 80K only, in the max30001_BIOZ_InitStart() function
lucaslwl 22:5c07298d3383 903 // * @brief Registers used: MNGR_INT-0x04, CNFG_GEN-0x37, CNFG_PACE-0x1A.
lucaslwl 22:5c07298d3383 904 // * @param En_pace : PACE Channel Enable <CNFG_GEN Register>
lucaslwl 22:5c07298d3383 905 // * @param Clr_pedge : PACE Edge Detect Interrupt (PEDGE) Clear Behavior <MNGR_INT Register>
lucaslwl 22:5c07298d3383 906 // * @param Pol: PACE Input Polarity Selection <CNFG_PACE Register>
lucaslwl 22:5c07298d3383 907 // * @param Gn_diff_off: PACE Differentiator Mode <CNFG_PACE Register>
lucaslwl 22:5c07298d3383 908 // * @param Gain: PACE Channel Gain Selection <CNFG_PACE Register>
lucaslwl 22:5c07298d3383 909 // * @param Aout_lbw: PACE Analog Output Buffer Bandwidth Mode <CNFG_PACE Register>
lucaslwl 22:5c07298d3383 910 // * @param Aout: PACE Single Ended Analog Output Buffer Signal Monitoring Selection <CNFG_PACE Register>
lucaslwl 22:5c07298d3383 911 // * @param Dacp (4bits): PACE Detector Positive Comparator Threshold <CNFG_PACE Register>
lucaslwl 22:5c07298d3383 912 // * @param Dacn(4bits): PACE Detector Negative Comparator Threshold <CNFG_PACE Register>
lucaslwl 22:5c07298d3383 913 // * @returns 0-if no error. A non-zero value indicates an error <CNFG_PACE Register>
lucaslwl 22:5c07298d3383 914 // *
lucaslwl 22:5c07298d3383 915 // */
lucaslwl 22:5c07298d3383 916 // int PACE_InitStart(uint8_t En_pace, uint8_t Clr_pedge, uint8_t Pol,
lucaslwl 22:5c07298d3383 917 // uint8_t Gn_diff_off, uint8_t Gain,
lucaslwl 22:5c07298d3383 918 // uint8_t Aout_lbw, uint8_t Aout, uint8_t Dacp,
lucaslwl 22:5c07298d3383 919 // uint8_t Dacn);
lucaslwl 22:5c07298d3383 920 //
lucaslwl 22:5c07298d3383 921 // /**
lucaslwl 22:5c07298d3383 922 // *@brief For MAX30001 ONLY
lucaslwl 22:5c07298d3383 923 // *@param This function disables the PACE. Uses Register CNFG_GEN-0x10.
lucaslwl 22:5c07298d3383 924 // *@returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 925 // *
lucaslwl 22:5c07298d3383 926 // */
lucaslwl 22:5c07298d3383 927 // int Stop_PACE(void);
lucaslwl 22:5c07298d3383 928 //
lucaslwl 22:5c07298d3383 929 // /**
lucaslwl 22:5c07298d3383 930 // * @brief For MAX30001/2 ONLY
lucaslwl 22:5c07298d3383 931 // * @brief This function sets up the MAX30001 for BIOZ measurement.
lucaslwl 22:5c07298d3383 932 // * @brief Registers used: MNGR_INT-0x04, CNFG_GEN-0X10, CNFG_BMUX-0x17,CNFG_BIOZ-0x18.
lucaslwl 22:5c07298d3383 933 // * @param En_bioz: BIOZ Channel Enable <CNFG_GEN Register>
lucaslwl 22:5c07298d3383 934 // * @param Openp: Open the BIP Input Switch <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 935 // * @param Openn: Open the BIN Input Switch <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 936 // * @param Calp_sel: BIP Calibration Selection <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 937 // * @param Caln_sel: BIN Calibration Selection <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 938 // * @param CG_mode: BIOZ Current Generator Mode Selection <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 939 // * @param B_fit: BIOZ FIFO Interrupt Threshold (issues BINT based on number of unread FIFO records) <MNGR_INT Register>
lucaslwl 22:5c07298d3383 940 // * @param Rate: BIOZ Data Rate <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 941 // * @param Ahpf: BIOZ/PACE Channel Analog High Pass Filter Cutoff Frequency and Bypass <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 942 // * @param Ext_rbias: External Resistor Bias Enable <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 943 // * @param Gain: BIOZ Channel Gain Setting <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 944 // * @param Dhpf: BIOZ Channel Digital High Pass Filter Cutoff Frequency <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 945 // * @param Dlpf: BIOZ Channel Digital Low Pass Filter Cutoff Frequency <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 946 // * @param Fcgen: BIOZ Current Generator Modulation Frequency <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 947 // * @param Cgmon: BIOZ Current Generator Monitor <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 948 // * @param Cgmag: BIOZ Current Generator Magnitude <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 949 // * @param Phoff: BIOZ Current Generator Modulation Phase Offset <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 950 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 951 // *
lucaslwl 22:5c07298d3383 952 // */
lucaslwl 22:5c07298d3383 953 // int BIOZ_InitStart(uint8_t En_bioz, uint8_t Openp, uint8_t Openn,
lucaslwl 22:5c07298d3383 954 // uint8_t Calp_sel, uint8_t Caln_sel,
lucaslwl 22:5c07298d3383 955 // uint8_t CG_mode,
lucaslwl 22:5c07298d3383 956 // /* uint8_t En_bioz,*/ uint8_t B_fit, uint8_t Rate,
lucaslwl 22:5c07298d3383 957 // uint8_t Ahpf, uint8_t Ext_rbias, uint8_t Gain,
lucaslwl 22:5c07298d3383 958 // uint8_t Dhpf, uint8_t Dlpf, uint8_t Fcgen,
lucaslwl 22:5c07298d3383 959 // uint8_t Cgmon, uint8_t Cgmag, uint8_t Phoff);
lucaslwl 22:5c07298d3383 960 //
lucaslwl 22:5c07298d3383 961 // /**
lucaslwl 22:5c07298d3383 962 // * @brief For MAX30001/2 ONLY
lucaslwl 22:5c07298d3383 963 // * @brief This function disables the BIOZ. Uses Register CNFG_GEN-0x10.
lucaslwl 22:5c07298d3383 964 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 965 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 966 // *
lucaslwl 22:5c07298d3383 967 // */
lucaslwl 22:5c07298d3383 968 // int Stop_BIOZ(void);
lucaslwl 22:5c07298d3383 969 //
lucaslwl 22:5c07298d3383 970 // /**
lucaslwl 22:5c07298d3383 971 // * @brief For MAX30001/2 ONLY
lucaslwl 22:5c07298d3383 972 // * @brief BIOZ modulated Resistance Built-in-Self-Test, Registers used: CNFG_BMUX-0x17
lucaslwl 22:5c07298d3383 973 // * @param En_bist: Enable Modulated Resistance Built-in-Self-test <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 974 // * @param Rnom: BIOZ RMOD BIST Nominal Resistance Selection <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 975 // * @param Rmod: BIOZ RMOD BIST Modulated Resistance Selection <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 976 // * @param Fbist: BIOZ RMOD BIST Frequency Selection <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 977 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 978 // *
lucaslwl 22:5c07298d3383 979 // */
lucaslwl 22:5c07298d3383 980 // int BIOZ_InitBist(uint8_t En_bist, uint8_t Rnom, uint8_t Rmod,
lucaslwl 22:5c07298d3383 981 // uint8_t Fbist);
lucaslwl 22:5c07298d3383 982 //
lucaslwl 22:5c07298d3383 983 // /**
lucaslwl 22:5c07298d3383 984 // * @brief For MAX30001/3/4 ONLY
lucaslwl 22:5c07298d3383 985 // * @brief Sets up the device for RtoR measurement
lucaslwl 22:5c07298d3383 986 // * @param EN_rtor: ECG RTOR Detection Enable <RTOR1 Register>
lucaslwl 22:5c07298d3383 987 // * @param Wndw: R to R Window Averaging (Window Width = RTOR_WNDW[3:0]*8mS) <RTOR1 Register>
lucaslwl 22:5c07298d3383 988 // * @param Gain: R to R Gain (where Gain = 2^RTOR_GAIN[3:0], plus an auto-scale option) <RTOR1 Register>
lucaslwl 22:5c07298d3383 989 // * @param Pavg: R to R Peak Averaging Weight Factor <RTOR1 Register>
lucaslwl 22:5c07298d3383 990 // * @param Ptsf: R to R Peak Threshold Scaling Factor <RTOR1 Register>
lucaslwl 22:5c07298d3383 991 // * @param Hoff: R to R minimum Hold Off <RTOR2 Register>
lucaslwl 22:5c07298d3383 992 // * @param Ravg: R to R Interval Averaging Weight Factor <RTOR2 Register>
lucaslwl 22:5c07298d3383 993 // * @param Rhsf: R to R Interval Hold Off Scaling Factor <RTOR2 Register>
lucaslwl 22:5c07298d3383 994 // * @param Clr_rrint: RTOR Detect Interrupt Clear behaviour <MNGR_INT Register>
lucaslwl 22:5c07298d3383 995 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 996 // *
lucaslwl 22:5c07298d3383 997 // */
lucaslwl 22:5c07298d3383 998 // int RtoR_InitStart(uint8_t En_rtor, uint8_t Wndw, uint8_t Gain,
lucaslwl 22:5c07298d3383 999 // uint8_t Pavg, uint8_t Ptsf, uint8_t Hoff,
lucaslwl 22:5c07298d3383 1000 // uint8_t Ravg, uint8_t Rhsf, uint8_t Clr_rrint);
lucaslwl 22:5c07298d3383 1001 //
lucaslwl 22:5c07298d3383 1002 // /**
lucaslwl 22:5c07298d3383 1003 // * @brief For MAX30001/3/4 ONLY
lucaslwl 22:5c07298d3383 1004 // * @brief This function disables the RtoR. Uses Register CNFG_RTOR1-0x1D
lucaslwl 22:5c07298d3383 1005 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1006 // *
lucaslwl 22:5c07298d3383 1007 // */
lucaslwl 22:5c07298d3383 1008 // int Stop_RtoR(void);
lucaslwl 22:5c07298d3383 1009 //
lucaslwl 22:5c07298d3383 1010 // /**
lucaslwl 22:5c07298d3383 1011 // * @brief This is a function that waits for the PLL to lock; once a lock is achieved it exits out. (For convenience only)
lucaslwl 22:5c07298d3383 1012 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1013 // *
lucaslwl 22:5c07298d3383 1014 // */
lucaslwl 22:5c07298d3383 1015 // int PLL_lock(void);
lucaslwl 22:5c07298d3383 1016 //
lucaslwl 22:5c07298d3383 1017 // /**
lucaslwl 22:5c07298d3383 1018 // * @brief This function causes the MAX30001 to reset. Uses Register SW_RST-0x08
lucaslwl 22:5c07298d3383 1019 // * @return 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1020 // *
lucaslwl 22:5c07298d3383 1021 // */
lucaslwl 22:5c07298d3383 1022 // int sw_rst(void);
lucaslwl 22:5c07298d3383 1023 //
lucaslwl 22:5c07298d3383 1024 // /**
lucaslwl 22:5c07298d3383 1025 // * @brief This function provides a SYNCH operation. Uses Register SYCNH-0x09. Please refer to the data sheet for
lucaslwl 22:5c07298d3383 1026 // * @brief the details on how to use this.
lucaslwl 22:5c07298d3383 1027 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1028 // *
lucaslwl 22:5c07298d3383 1029 // */
lucaslwl 22:5c07298d3383 1030 // int synch(void);
lucaslwl 22:5c07298d3383 1031 //
lucaslwl 22:5c07298d3383 1032 // /**
lucaslwl 22:5c07298d3383 1033 // * @brief This function performs a FIFO Reset. Uses Register FIFO_RST-0x0A. Please refer to the data sheet
lucaslwl 22:5c07298d3383 1034 // * @brief for the details on how to use this.
lucaslwl 22:5c07298d3383 1035 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1036 // */
lucaslwl 22:5c07298d3383 1037 // int fifo_rst(void);
lucaslwl 22:5c07298d3383 1038 //
lucaslwl 22:5c07298d3383 1039 // /**
lucaslwl 22:5c07298d3383 1040 // *
lucaslwl 22:5c07298d3383 1041 // * @brief This is a callback function which collects all the data from the ECG, BIOZ, PACE and RtoR. It also handles
lucaslwl 22:5c07298d3383 1042 // * @brief Lead On/Off. This function is passed through the argument of max30001_COMMinit().
lucaslwl 22:5c07298d3383 1043 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1044 // *
lucaslwl 22:5c07298d3383 1045 // */
lucaslwl 22:5c07298d3383 1046 // int int_handler(void);
lucaslwl 22:5c07298d3383 1047 //
lucaslwl 22:5c07298d3383 1048 // /**
lucaslwl 22:5c07298d3383 1049 // * @brief This is function called from the max30001_int_handler() function and processes all the ECG, BIOZ, PACE
lucaslwl 22:5c07298d3383 1050 // * @brief and the RtoR data and sticks them in appropriate arrays and variables each unsigned 32 bits.
lucaslwl 22:5c07298d3383 1051 // * @param ECG data will be in the array (input): max30001_ECG_FIFO_buffer[]
lucaslwl 22:5c07298d3383 1052 // * @param Pace data will be in the array (input): max30001_PACE[]
lucaslwl 22:5c07298d3383 1053 // * @param RtoRdata will be in the variable (input): max30001_RtoR_data
lucaslwl 22:5c07298d3383 1054 // * @param BIOZ data will be in the array (input): max30001_BIOZ_FIFO_buffer[]
lucaslwl 22:5c07298d3383 1055 // * @param global max30001_ECG_FIFO_buffer[]
lucaslwl 22:5c07298d3383 1056 // * @param global max30001_PACE[]
lucaslwl 22:5c07298d3383 1057 // * @param global max30001_BIOZ_FIFO_buffer[]
lucaslwl 22:5c07298d3383 1058 // * @param global max30001_RtoR_data
lucaslwl 22:5c07298d3383 1059 // * @param global max30001_DCLeadOff
lucaslwl 22:5c07298d3383 1060 // * @param global max30001_ACLeadOff
lucaslwl 22:5c07298d3383 1061 // * @param global max30001_LeadON
lucaslwl 22:5c07298d3383 1062 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1063 // *
lucaslwl 22:5c07298d3383 1064 // */
lucaslwl 22:5c07298d3383 1065 // int FIFO_LeadONOff_Read(void);
lucaslwl 22:5c07298d3383 1066 //
lucaslwl 22:5c07298d3383 1067 // /**
lucaslwl 22:5c07298d3383 1068 // * @brief This function allows writing to a register.
lucaslwl 22:5c07298d3383 1069 // * @param addr: Address of the register to write to
lucaslwl 22:5c07298d3383 1070 // * @param data: 24-bit data read from the register.
lucaslwl 22:5c07298d3383 1071 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1072 // *
lucaslwl 22:5c07298d3383 1073 // */
lucaslwl 22:5c07298d3383 1074 // int reg_write(MAX30001_REG_map_t addr, uint32_t data);
lucaslwl 22:5c07298d3383 1075 //
lucaslwl 22:5c07298d3383 1076 // /**
lucaslwl 22:5c07298d3383 1077 // * @brief This function allows reading from a register
lucaslwl 22:5c07298d3383 1078 // * @param addr: Address of the register to read from.
lucaslwl 22:5c07298d3383 1079 // * @param *return_data: pointer to the value read from the register.
lucaslwl 22:5c07298d3383 1080 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1081 // *
lucaslwl 22:5c07298d3383 1082 // */
lucaslwl 22:5c07298d3383 1083 // int reg_read(MAX30001_REG_map_t addr, uint32_t *return_data);
lucaslwl 22:5c07298d3383 1084 //
lucaslwl 22:5c07298d3383 1085 // /**
lucaslwl 22:5c07298d3383 1086 // * @brief This function enables the DC Lead Off detection. Either ECG or BIOZ can be detected, one at a time.
lucaslwl 22:5c07298d3383 1087 // * @brief Registers Used: CNFG_GEN-0x10
lucaslwl 22:5c07298d3383 1088 // * @param En_dcloff: BIOZ Digital Lead Off Detection Enable
lucaslwl 22:5c07298d3383 1089 // * @param Ipol: DC Lead Off Current Polarity (if current sources are enabled/connected)
lucaslwl 22:5c07298d3383 1090 // * @param Imag: DC Lead off current Magnitude Selection
lucaslwl 22:5c07298d3383 1091 // * @param Vth: DC Lead Off Voltage Threshold Selection
lucaslwl 22:5c07298d3383 1092 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1093 // *
lucaslwl 22:5c07298d3383 1094 // */
lucaslwl 22:5c07298d3383 1095 // int Enable_DcLeadOFF_Init(int8_t En_dcloff, int8_t Ipol, int8_t Imag,
lucaslwl 22:5c07298d3383 1096 // int8_t Vth);
lucaslwl 22:5c07298d3383 1097 //
lucaslwl 22:5c07298d3383 1098 // /**
lucaslwl 22:5c07298d3383 1099 // * @brief This function disables the DC Lead OFF feature, whichever is active.
lucaslwl 22:5c07298d3383 1100 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1101 // *
lucaslwl 22:5c07298d3383 1102 // */
lucaslwl 22:5c07298d3383 1103 // int Disable_DcLeadOFF(void);
lucaslwl 22:5c07298d3383 1104 //
lucaslwl 22:5c07298d3383 1105 // /**
lucaslwl 22:5c07298d3383 1106 // * @brief This function sets up the BIOZ for AC Lead Off test.
lucaslwl 22:5c07298d3383 1107 // * @brief Registers Used: CNFG_GEN-0x10, MNGR_DYN-0x05
lucaslwl 22:5c07298d3383 1108 // * @param En_bloff: BIOZ Digital Lead Off Detection Enable <CNFG_GEN register>
lucaslwl 22:5c07298d3383 1109 // * @param Bloff_hi_it: DC Lead Off Current Polarity (if current sources are enabled/connected) <MNGR_DYN register>
lucaslwl 22:5c07298d3383 1110 // * @param Bloff_lo_it: DC Lead off current Magnitude Selection <MNGR_DYN register>
lucaslwl 22:5c07298d3383 1111 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1112 // *
lucaslwl 22:5c07298d3383 1113 // */
lucaslwl 22:5c07298d3383 1114 // int BIOZ_Enable_ACLeadOFF_Init(uint8_t En_bloff, uint8_t Bloff_hi_it,
lucaslwl 22:5c07298d3383 1115 // uint8_t Bloff_lo_it);
lucaslwl 22:5c07298d3383 1116 //
lucaslwl 22:5c07298d3383 1117 // /**
lucaslwl 22:5c07298d3383 1118 // * @brief This function Turns of the BIOZ AC Lead OFF feature
lucaslwl 22:5c07298d3383 1119 // * @brief Registers Used: CNFG_GEN-0x10
lucaslwl 22:5c07298d3383 1120 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1121 // *
lucaslwl 22:5c07298d3383 1122 // */
lucaslwl 22:5c07298d3383 1123 // int BIOZ_Disable_ACleadOFF(void);
lucaslwl 22:5c07298d3383 1124 //
lucaslwl 22:5c07298d3383 1125 // /**
lucaslwl 22:5c07298d3383 1126 // * @brief This function enables the Current Gnerator Monitor
lucaslwl 22:5c07298d3383 1127 // * @brief Registers Used: CNFG_BIOZ-0x18
lucaslwl 22:5c07298d3383 1128 // * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1129 // *
lucaslwl 22:5c07298d3383 1130 // */
lucaslwl 22:5c07298d3383 1131 // int BIOZ_Enable_BCGMON(void);
lucaslwl 22:5c07298d3383 1132 //
lucaslwl 22:5c07298d3383 1133 // /**
lucaslwl 22:5c07298d3383 1134 // *
lucaslwl 22:5c07298d3383 1135 // * @brief This function enables the Lead ON detection. Either ECG or BIOZ can be detected, one at a time.
lucaslwl 22:5c07298d3383 1136 // * @brief Also, the en_bioz, en_ecg, en_pace setting is saved so that when this feature is disabled through the
lucaslwl 22:5c07298d3383 1137 // * @brief max30001_Disable_LeadON() function (or otherwise) the enable/disable state of those features can be retrieved.
lucaslwl 22:5c07298d3383 1138 // * @param Channel: ECG or BIOZ detection
lucaslwl 22:5c07298d3383 1139 // * @returns 0-if everything is good. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1140 // *
lucaslwl 22:5c07298d3383 1141 // */
lucaslwl 22:5c07298d3383 1142 // int Enable_LeadON(int8_t Channel);
lucaslwl 22:5c07298d3383 1143 //
lucaslwl 22:5c07298d3383 1144 // /**
lucaslwl 22:5c07298d3383 1145 // * @brief This function turns off the Lead ON feature, whichever one is active. Also, retrieves the en_bioz,
lucaslwl 22:5c07298d3383 1146 // * @brief en_ecg, en_pace and sets it back to as it was.
lucaslwl 22:5c07298d3383 1147 // * @param 0-if everything is good. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1148 // *
lucaslwl 22:5c07298d3383 1149 // */
lucaslwl 22:5c07298d3383 1150 // int Disable_LeadON(void);
lucaslwl 22:5c07298d3383 1151 //
lucaslwl 22:5c07298d3383 1152 // /**
lucaslwl 22:5c07298d3383 1153 // *
lucaslwl 22:5c07298d3383 1154 // * @brief This function is toggled every 2 seconds to switch between ECG Lead ON and BIOZ Lead ON detect
lucaslwl 22:5c07298d3383 1155 // * @brief Adjust LEADOFF_SERVICE_TIME to determine the duration between the toggles.
lucaslwl 22:5c07298d3383 1156 // * @param CurrentTime - This gets fed the time by RTC_GetValue function
lucaslwl 22:5c07298d3383 1157 // *
lucaslwl 22:5c07298d3383 1158 // */
lucaslwl 22:5c07298d3383 1159 // void ServiceLeadON(uint32_t currentTime);
lucaslwl 22:5c07298d3383 1160 //
lucaslwl 22:5c07298d3383 1161 // /**
lucaslwl 22:5c07298d3383 1162 // *
lucaslwl 22:5c07298d3383 1163 // * @brief This function is toggled every 2 seconds to switch between ECG DC Lead Off and BIOZ DC Lead Off
lucaslwl 22:5c07298d3383 1164 // * @brief Adjust LEADOFF_SERVICE_TIME to determine the duration between the toggles.
lucaslwl 22:5c07298d3383 1165 // * @param CurrentTime - This gets fed the time by RTC_GetValue function
lucaslwl 22:5c07298d3383 1166 // *
lucaslwl 22:5c07298d3383 1167 // */
lucaslwl 22:5c07298d3383 1168 // void ServiceLeadoff(uint32_t currentTime);
lucaslwl 22:5c07298d3383 1169 //
lucaslwl 22:5c07298d3383 1170 // /**
lucaslwl 22:5c07298d3383 1171 // *
lucaslwl 22:5c07298d3383 1172 // * @brief This function sets current RtoR values and fmstr values in a pointer structure
lucaslwl 22:5c07298d3383 1173 // * @param hspValMax30001 - Pointer to a structure where to store the values
lucaslwl 22:5c07298d3383 1174 // *
lucaslwl 22:5c07298d3383 1175 // */
lucaslwl 22:5c07298d3383 1176 // void ReadHeartrateData(max30001_bledata_t *_hspValMax30001);
lucaslwl 22:5c07298d3383 1177 //
lucaslwl 22:5c07298d3383 1178 // /**
lucaslwl 22:5c07298d3383 1179 // * @brief type definition for data interrupt
lucaslwl 22:5c07298d3383 1180 // */
lucaslwl 22:5c07298d3383 1181 // typedef void (*PtrFunction)(uint32_t id, uint32_t *buffer, uint32_t length);
lucaslwl 22:5c07298d3383 1182 //
lucaslwl 22:5c07298d3383 1183 // /**
lucaslwl 22:5c07298d3383 1184 // * @brief Used to connect a callback for when interrupt data is available
lucaslwl 22:5c07298d3383 1185 // */
lucaslwl 22:5c07298d3383 1186 // void onDataAvailable(PtrFunction _onDataAvailable);
lucaslwl 22:5c07298d3383 1187 //
lucaslwl 22:5c07298d3383 1188 //
lucaslwl 22:5c07298d3383 1189 //
lucaslwl 22:5c07298d3383 1190 // /**
lucaslwl 22:5c07298d3383 1191 // * @brief Preventive measure used to dismiss interrupts that fire too early during
lucaslwl 22:5c07298d3383 1192 // * @brief initialization on INTB line
lucaslwl 22:5c07298d3383 1193 // *
lucaslwl 22:5c07298d3383 1194 // */
lucaslwl 22:5c07298d3383 1195 // static void Mid_IntB_Handler(void);
lucaslwl 22:5c07298d3383 1196 //
lucaslwl 22:5c07298d3383 1197 // /**
lucaslwl 22:5c07298d3383 1198 // * @brief Preventive measure used to dismiss interrupts that fire too early during
lucaslwl 22:5c07298d3383 1199 // * @brief initialization on INT2B line
lucaslwl 22:5c07298d3383 1200 // *
lucaslwl 22:5c07298d3383 1201 // */
lucaslwl 22:5c07298d3383 1202 // static void Mid_Int2B_Handler(void);
lucaslwl 22:5c07298d3383 1203 //
lucaslwl 22:5c07298d3383 1204 // /**
lucaslwl 22:5c07298d3383 1205 // * @brief Allows Interrupts to be accepted as valid.
lucaslwl 22:5c07298d3383 1206 // * @param state: 1-Allow interrupts, Any-Don't allow interrupts.
lucaslwl 22:5c07298d3383 1207 // *
lucaslwl 22:5c07298d3383 1208 // */
lucaslwl 22:5c07298d3383 1209 // void AllowInterrupts(int state);
lucaslwl 22:5c07298d3383 1210 //
lucaslwl 22:5c07298d3383 1211 //
lucaslwl 22:5c07298d3383 1212 // /// @brief function pointer to the async callback
lucaslwl 22:5c07298d3383 1213 // static event_callback_t functionpointer;
lucaslwl 22:5c07298d3383 1214 //
lucaslwl 22:5c07298d3383 1215 // /// @brief flag used to indicate an async xfer has taken place
lucaslwl 22:5c07298d3383 1216 // static volatile int xferFlag;
lucaslwl 22:5c07298d3383 1217 //
lucaslwl 22:5c07298d3383 1218 // /**
lucaslwl 22:5c07298d3383 1219 // * @brief Callback handler for SPI async events
lucaslwl 22:5c07298d3383 1220 // * @param events description of event that occurred
lucaslwl 22:5c07298d3383 1221 // */
lucaslwl 22:5c07298d3383 1222 // static void spiHandler(int events);
lucaslwl 22:5c07298d3383 1223 //
lucaslwl 22:5c07298d3383 1224 //
lucaslwl 22:5c07298d3383 1225 // static MAX30001 *instance;
lucaslwl 22:5c07298d3383 1226 //
lucaslwl 22:5c07298d3383 1227 //private:
lucaslwl 22:5c07298d3383 1228 //
lucaslwl 22:5c07298d3383 1229 // /**
lucaslwl 22:5c07298d3383 1230 // * @brief Used to notify an external function that interrupt data is available
lucaslwl 22:5c07298d3383 1231 // * @param id type of data available
lucaslwl 22:5c07298d3383 1232 // * @param buffer 32-bit buffer that points to the data
lucaslwl 22:5c07298d3383 1233 // * @param length length of 32-bit elements available
lucaslwl 22:5c07298d3383 1234 // */
lucaslwl 22:5c07298d3383 1235 // void dataAvailable(uint32_t id, uint32_t *buffer, uint32_t length);
lucaslwl 22:5c07298d3383 1236 //
lucaslwl 22:5c07298d3383 1237 // /**
lucaslwl 22:5c07298d3383 1238 // * @brief Transmit and recieve QUAD SPI data
lucaslwl 22:5c07298d3383 1239 // * @param tx_buf pointer to transmit byte buffer
lucaslwl 22:5c07298d3383 1240 // * @param tx_size number of bytes to transmit
lucaslwl 22:5c07298d3383 1241 // * @param rx_buf pointer to the recieve buffer
lucaslwl 22:5c07298d3383 1242 // * @param rx_size number of bytes to recieve
lucaslwl 22:5c07298d3383 1243 // */
lucaslwl 22:5c07298d3383 1244 // int SPI_Transmit(const uint8_t *tx_buf, uint32_t tx_size, uint8_t *rx_buf,
lucaslwl 22:5c07298d3383 1245 // uint32_t rx_size);
lucaslwl 22:5c07298d3383 1246 //
lucaslwl 22:5c07298d3383 1247 // /// pointer to mbed SPI object
lucaslwl 22:5c07298d3383 1248 // SPI *spi;
lucaslwl 22:5c07298d3383 1249 // /// is this object the owner of the spi object
lucaslwl 22:5c07298d3383 1250 // bool spi_owner;
lucaslwl 22:5c07298d3383 1251 // /// buffer to use for async transfers
lucaslwl 22:5c07298d3383 1252 // uint8_t buffer[ASYNC_SPI_BUFFER_SIZE];
lucaslwl 22:5c07298d3383 1253 // /// function pointer to the async callback
lucaslwl 22:5c07298d3383 1254 // // event_callback_t functionpointer;
lucaslwl 22:5c07298d3383 1255 // /// callback function when interrupt data is available
lucaslwl 22:5c07298d3383 1256 // PtrFunction onDataAvailableCallback;
lucaslwl 22:5c07298d3383 1257 //
lucaslwl 22:5c07298d3383 1258 //}; // End of MAX30001 Class
lucaslwl 22:5c07298d3383 1259 //
lucaslwl 22:5c07298d3383 1260 //
lucaslwl 22:5c07298d3383 1261 //#endif /* MAX30001_H_ */
lucaslwl 22:5c07298d3383 1262 //
lucaslwl 22:5c07298d3383 1263
lucaslwl 22:5c07298d3383 1264
lucaslwl 22:5c07298d3383 1265 /*******************************************************************************
lucaslwl 22:5c07298d3383 1266 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
lucaslwl 22:5c07298d3383 1267 *
lucaslwl 22:5c07298d3383 1268 * Permission is hereby granted, free of charge, to any person obtaining a
lucaslwl 22:5c07298d3383 1269 * copy of this software and associated documentation files (the "Software"),
lucaslwl 22:5c07298d3383 1270 * to deal in the Software without restriction, including without limitation
lucaslwl 22:5c07298d3383 1271 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
lucaslwl 22:5c07298d3383 1272 * and/or sell copies of the Software, and to permit persons to whom the
lucaslwl 22:5c07298d3383 1273 * Software is furnished to do so, subject to the following conditions:
lucaslwl 22:5c07298d3383 1274 *
lucaslwl 22:5c07298d3383 1275 * The above copyright notice and this permission notice shall be included
lucaslwl 22:5c07298d3383 1276 * in all copies or substantial portions of the Software.
lucaslwl 22:5c07298d3383 1277 *
lucaslwl 22:5c07298d3383 1278 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
lucaslwl 22:5c07298d3383 1279 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
lucaslwl 22:5c07298d3383 1280 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
lucaslwl 22:5c07298d3383 1281 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
lucaslwl 22:5c07298d3383 1282 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
lucaslwl 22:5c07298d3383 1283 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
lucaslwl 22:5c07298d3383 1284 * OTHER DEALINGS IN THE SOFTWARE.
lucaslwl 22:5c07298d3383 1285 *
lucaslwl 22:5c07298d3383 1286 * Except as contained in this notice, the name of Maxim Integrated
lucaslwl 22:5c07298d3383 1287 * Products, Inc. shall not be used except as stated in the Maxim Integrated
lucaslwl 22:5c07298d3383 1288 * Products, Inc. Branding Policy.
lucaslwl 22:5c07298d3383 1289 *
lucaslwl 22:5c07298d3383 1290 * The mere transfer of this software does not imply any licenses
lucaslwl 22:5c07298d3383 1291 * of trade secrets, proprietary technology, copyrights, patents,
lucaslwl 22:5c07298d3383 1292 * trademarks, maskwork rights, or any other form of intellectual
lucaslwl 22:5c07298d3383 1293 * property whatsoever. Maxim Integrated Products, Inc. retains all
lucaslwl 22:5c07298d3383 1294 * ownership rights.
lucaslwl 22:5c07298d3383 1295 *******************************************************************************/
lucaslwl 22:5c07298d3383 1296 /*
lucaslwl 22:5c07298d3383 1297 * max30001.h
lucaslwl 22:5c07298d3383 1298 *
lucaslwl 22:5c07298d3383 1299 * Created on: Oct 9, 2015
lucaslwl 22:5c07298d3383 1300 * Author: faisal.tariq
lucaslwl 22:5c07298d3383 1301 */
lucaslwl 22:5c07298d3383 1302
lucaslwl 22:5c07298d3383 1303 #ifndef MAX30001_H_
lucaslwl 22:5c07298d3383 1304 #define MAX30001_H_
lucaslwl 22:5c07298d3383 1305
lucaslwl 22:5c07298d3383 1306 #include "mbed.h"
lucaslwl 22:5c07298d3383 1307
lucaslwl 22:5c07298d3383 1308 #define mbed_COMPLIANT // Uncomment to Use timer for MAX30001 FCLK (for mbed)
lucaslwl 22:5c07298d3383 1309 // Comment to use the RTC clock
lucaslwl 22:5c07298d3383 1310
lucaslwl 22:5c07298d3383 1311 #define ASYNC_SPI_BUFFER_SIZE (32 * 3) // Maximimum buffer size for async byte transfers
lucaslwl 22:5c07298d3383 1312
lucaslwl 22:5c07298d3383 1313 // Defines for data callbacks
lucaslwl 22:5c07298d3383 1314 #define MAX30001_DATA_ECG 0x30
lucaslwl 22:5c07298d3383 1315 #define MAX30001_DATA_PACE 0x31
lucaslwl 22:5c07298d3383 1316 #define MAX30001_DATA_RTOR 0x32
lucaslwl 22:5c07298d3383 1317 #define MAX30001_DATA_BIOZ 0x33
lucaslwl 22:5c07298d3383 1318 #define MAX30001_DATA_LEADOFF_DC 0x34
lucaslwl 22:5c07298d3383 1319 #define MAX30001_DATA_LEADOFF_AC 0x35
lucaslwl 22:5c07298d3383 1320 #define MAX30001_DATA_BCGMON 0x36
lucaslwl 22:5c07298d3383 1321 #define MAX30001_DATA_ACLEADON 0x37
lucaslwl 22:5c07298d3383 1322
lucaslwl 22:5c07298d3383 1323 #define MAX30001_SPI_MASTER_PORT 0
lucaslwl 22:5c07298d3383 1324 #define MAX30001_SPI_SS_INDEX 0
lucaslwl 22:5c07298d3383 1325
lucaslwl 22:5c07298d3383 1326 #define MAX30001_INT_PORT_B 3
lucaslwl 22:5c07298d3383 1327 #define MAX30001_INT_PIN_B 6
lucaslwl 22:5c07298d3383 1328
lucaslwl 22:5c07298d3383 1329 #define MAX30001_INT_PORT_2B 4
lucaslwl 22:5c07298d3383 1330 #define MAX30001_INT_PIN_2B 5
lucaslwl 22:5c07298d3383 1331
lucaslwl 22:5c07298d3383 1332 #define MAX30001_INT_PORT_FCLK 1
lucaslwl 22:5c07298d3383 1333 #define MAX30001_INT_PIN_FCLK 7
lucaslwl 22:5c07298d3383 1334
lucaslwl 22:5c07298d3383 1335 #define MAX30001_FUNC_SEL_TMR 2 // 0=FW Control, 1= Pulse Train, 2=Timer
lucaslwl 22:5c07298d3383 1336
lucaslwl 22:5c07298d3383 1337 #define MAX30001_INDEX 3
lucaslwl 22:5c07298d3383 1338 #define MAX30001_POLARITY 0
lucaslwl 22:5c07298d3383 1339 #define MAX30001_PERIOD 30518
lucaslwl 22:5c07298d3383 1340 #define MAX30001_CYCLE 50
lucaslwl 22:5c07298d3383 1341
lucaslwl 22:5c07298d3383 1342 #define MAX30001_IOMUX_IO_ENABLE 1
lucaslwl 22:5c07298d3383 1343
lucaslwl 22:5c07298d3383 1344 #define MAX30001_SPI_PORT 0
lucaslwl 22:5c07298d3383 1345 #define MAX30001_CS_PIN 0
lucaslwl 22:5c07298d3383 1346 #define MAX30001_CS_POLARITY 0
lucaslwl 22:5c07298d3383 1347 #define MAX30001_CS_ACTIVITY_DELAY 0
lucaslwl 22:5c07298d3383 1348 #define MAX30001_CS_INACTIVITY_DELAY 0
lucaslwl 22:5c07298d3383 1349 #define MAX30001_CLK_HI 1
lucaslwl 22:5c07298d3383 1350 #define MAX30001_CLK_LOW 1
lucaslwl 22:5c07298d3383 1351 #define MAX30001_ALT_CLK 0
lucaslwl 22:5c07298d3383 1352 #define MAX30001_CLK_POLARITY 0
lucaslwl 22:5c07298d3383 1353 #define MAX30001_CLK_PHASE 0
lucaslwl 22:5c07298d3383 1354 #define MAX30001_WRITE 1
lucaslwl 22:5c07298d3383 1355 #define MAX30001_READ 0
lucaslwl 22:5c07298d3383 1356
lucaslwl 22:5c07298d3383 1357 #define MAX30001_INT_PORT_B 3
lucaslwl 22:5c07298d3383 1358 #define MAX30001INT_PIN_B 6
lucaslwl 22:5c07298d3383 1359
lucaslwl 22:5c07298d3383 1360 void MAX30001_AllowInterrupts(int state);
lucaslwl 22:5c07298d3383 1361
lucaslwl 22:5c07298d3383 1362 /**
lucaslwl 22:5c07298d3383 1363 * Maxim Integrated MAX30001 ECG/BIOZ chip
lucaslwl 22:5c07298d3383 1364 */
lucaslwl 22:5c07298d3383 1365 class MAX30001 {
lucaslwl 22:5c07298d3383 1366
lucaslwl 22:5c07298d3383 1367 public:
lucaslwl 22:5c07298d3383 1368 typedef enum { // MAX30001 Register addresses
lucaslwl 22:5c07298d3383 1369 STATUS = 0x01,
lucaslwl 22:5c07298d3383 1370 EN_INT = 0x02,
lucaslwl 22:5c07298d3383 1371 EN_INT2 = 0x03,
lucaslwl 22:5c07298d3383 1372 MNGR_INT = 0x04,
lucaslwl 22:5c07298d3383 1373 MNGR_DYN = 0x05,
lucaslwl 22:5c07298d3383 1374 SW_RST = 0x08,
lucaslwl 22:5c07298d3383 1375 SYNCH = 0x09,
lucaslwl 22:5c07298d3383 1376 FIFO_RST = 0x0A,
lucaslwl 22:5c07298d3383 1377 INFO = 0x0F,
lucaslwl 22:5c07298d3383 1378 CNFG_GEN = 0x10,
lucaslwl 22:5c07298d3383 1379 CNFG_CAL = 0x12,
lucaslwl 22:5c07298d3383 1380 CNFG_EMUX = 0x14,
lucaslwl 22:5c07298d3383 1381 CNFG_ECG = 0x15,
lucaslwl 22:5c07298d3383 1382 CNFG_BMUX = 0x17,
lucaslwl 22:5c07298d3383 1383 CNFG_BIOZ = 0x18,
lucaslwl 22:5c07298d3383 1384 CNFG_PACE = 0x1A,
lucaslwl 22:5c07298d3383 1385 CNFG_RTOR1 = 0x1D,
lucaslwl 22:5c07298d3383 1386 CNFG_RTOR2 = 0x1E,
lucaslwl 22:5c07298d3383 1387
lucaslwl 22:5c07298d3383 1388 // Data locations
lucaslwl 22:5c07298d3383 1389 ECG_FIFO_BURST = 0x20,
lucaslwl 22:5c07298d3383 1390 ECG_FIFO = 0x21,
lucaslwl 22:5c07298d3383 1391 FIFO_BURST = 0x22,
lucaslwl 22:5c07298d3383 1392 BIOZ_FIFO = 0x23,
lucaslwl 22:5c07298d3383 1393 RTOR = 0x25,
lucaslwl 22:5c07298d3383 1394
lucaslwl 22:5c07298d3383 1395 PACE0_FIFO_BURST = 0x30,
lucaslwl 22:5c07298d3383 1396 PACE0_A = 0x31,
lucaslwl 22:5c07298d3383 1397 PACE0_B = 0x32,
lucaslwl 22:5c07298d3383 1398 PACE0_C = 0x33,
lucaslwl 22:5c07298d3383 1399
lucaslwl 22:5c07298d3383 1400 PACE1_FIFO_BURST = 0x34,
lucaslwl 22:5c07298d3383 1401 PACE1_A = 0x35,
lucaslwl 22:5c07298d3383 1402 PACE1_B = 0x36,
lucaslwl 22:5c07298d3383 1403 PACE1_C = 0x37,
lucaslwl 22:5c07298d3383 1404
lucaslwl 22:5c07298d3383 1405 PACE2_FIFO_BURST = 0x38,
lucaslwl 22:5c07298d3383 1406 PACE2_A = 0x39,
lucaslwl 22:5c07298d3383 1407 PACE2_B = 0x3A,
lucaslwl 22:5c07298d3383 1408 PACE2_C = 0x3B,
lucaslwl 22:5c07298d3383 1409
lucaslwl 22:5c07298d3383 1410 PACE3_FIFO_BURST = 0x3C,
lucaslwl 22:5c07298d3383 1411 PACE3_A = 0x3D,
lucaslwl 22:5c07298d3383 1412 PACE3_B = 0x3E,
lucaslwl 22:5c07298d3383 1413 PACE3_C = 0x3F,
lucaslwl 22:5c07298d3383 1414
lucaslwl 22:5c07298d3383 1415 PACE4_FIFO_BURST = 0x40,
lucaslwl 22:5c07298d3383 1416 PACE4_A = 0x41,
lucaslwl 22:5c07298d3383 1417 PACE4_B = 0x42,
lucaslwl 22:5c07298d3383 1418 PACE4_C = 0x43,
lucaslwl 22:5c07298d3383 1419
lucaslwl 22:5c07298d3383 1420 PACE5_FIFO_BURST = 0x44,
lucaslwl 22:5c07298d3383 1421 PACE5_A = 0x45,
lucaslwl 22:5c07298d3383 1422 PACE5_B = 0x46,
lucaslwl 22:5c07298d3383 1423 PACE5_C = 0x47,
lucaslwl 22:5c07298d3383 1424
lucaslwl 22:5c07298d3383 1425 } MAX30001_REG_map_t;
lucaslwl 22:5c07298d3383 1426
lucaslwl 22:5c07298d3383 1427 /**
lucaslwl 22:5c07298d3383 1428 * @brief STATUS (0x01)
lucaslwl 22:5c07298d3383 1429 */
lucaslwl 22:5c07298d3383 1430 union max30001_status_reg {
lucaslwl 22:5c07298d3383 1431 uint32_t all;
lucaslwl 22:5c07298d3383 1432
lucaslwl 22:5c07298d3383 1433 struct {
lucaslwl 22:5c07298d3383 1434 uint32_t loff_nl : 1;
lucaslwl 22:5c07298d3383 1435 uint32_t loff_nh : 1;
lucaslwl 22:5c07298d3383 1436 uint32_t loff_pl : 1;
lucaslwl 22:5c07298d3383 1437 uint32_t loff_ph : 1;
lucaslwl 22:5c07298d3383 1438
lucaslwl 22:5c07298d3383 1439 uint32_t bcgmn : 1;
lucaslwl 22:5c07298d3383 1440 uint32_t bcgmp : 1;
lucaslwl 22:5c07298d3383 1441 uint32_t reserved1 : 1;
lucaslwl 22:5c07298d3383 1442 uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 1443
lucaslwl 22:5c07298d3383 1444 uint32_t pllint : 1;
lucaslwl 22:5c07298d3383 1445 uint32_t samp : 1;
lucaslwl 22:5c07298d3383 1446 uint32_t rrint : 1;
lucaslwl 22:5c07298d3383 1447 uint32_t lonint : 1;
lucaslwl 22:5c07298d3383 1448
lucaslwl 22:5c07298d3383 1449 uint32_t pedge : 1;
lucaslwl 22:5c07298d3383 1450 uint32_t povf : 1;
lucaslwl 22:5c07298d3383 1451 uint32_t pint : 1;
lucaslwl 22:5c07298d3383 1452 uint32_t bcgmon : 1;
lucaslwl 22:5c07298d3383 1453
lucaslwl 22:5c07298d3383 1454 uint32_t bundr : 1;
lucaslwl 22:5c07298d3383 1455 uint32_t bover : 1;
lucaslwl 22:5c07298d3383 1456 uint32_t bovf : 1;
lucaslwl 22:5c07298d3383 1457 uint32_t bint : 1;
lucaslwl 22:5c07298d3383 1458
lucaslwl 22:5c07298d3383 1459 uint32_t dcloffint : 1;
lucaslwl 22:5c07298d3383 1460 uint32_t fstint : 1;
lucaslwl 22:5c07298d3383 1461 uint32_t eovf : 1;
lucaslwl 22:5c07298d3383 1462 uint32_t eint : 1;
lucaslwl 22:5c07298d3383 1463
lucaslwl 22:5c07298d3383 1464 uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 1465
lucaslwl 22:5c07298d3383 1466 } bit;
lucaslwl 22:5c07298d3383 1467
lucaslwl 22:5c07298d3383 1468 } max30001_status;
lucaslwl 22:5c07298d3383 1469
lucaslwl 22:5c07298d3383 1470
lucaslwl 22:5c07298d3383 1471 /**
lucaslwl 22:5c07298d3383 1472 * @brief EN_INT (0x02)
lucaslwl 22:5c07298d3383 1473 */
lucaslwl 22:5c07298d3383 1474
lucaslwl 22:5c07298d3383 1475 union max30001_en_int_reg {
lucaslwl 22:5c07298d3383 1476 uint32_t all;
lucaslwl 22:5c07298d3383 1477
lucaslwl 22:5c07298d3383 1478 struct {
lucaslwl 22:5c07298d3383 1479 uint32_t intb_type : 2;
lucaslwl 22:5c07298d3383 1480 uint32_t reserved1 : 1;
lucaslwl 22:5c07298d3383 1481 uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 1482
lucaslwl 22:5c07298d3383 1483 uint32_t reserved3 : 1;
lucaslwl 22:5c07298d3383 1484 uint32_t reserved4 : 1;
lucaslwl 22:5c07298d3383 1485 uint32_t reserved5 : 1;
lucaslwl 22:5c07298d3383 1486 uint32_t reserved6 : 1;
lucaslwl 22:5c07298d3383 1487
lucaslwl 22:5c07298d3383 1488 uint32_t en_pllint : 1;
lucaslwl 22:5c07298d3383 1489 uint32_t en_samp : 1;
lucaslwl 22:5c07298d3383 1490 uint32_t en_rrint : 1;
lucaslwl 22:5c07298d3383 1491 uint32_t en_lonint : 1;
lucaslwl 22:5c07298d3383 1492
lucaslwl 22:5c07298d3383 1493 uint32_t en_pedge : 1;
lucaslwl 22:5c07298d3383 1494 uint32_t en_povf : 1;
lucaslwl 22:5c07298d3383 1495 uint32_t en_pint : 1;
lucaslwl 22:5c07298d3383 1496 uint32_t en_bcgmon : 1;
lucaslwl 22:5c07298d3383 1497
lucaslwl 22:5c07298d3383 1498 uint32_t en_bundr : 1;
lucaslwl 22:5c07298d3383 1499 uint32_t en_bover : 1;
lucaslwl 22:5c07298d3383 1500 uint32_t en_bovf : 1;
lucaslwl 22:5c07298d3383 1501 uint32_t en_bint : 1;
lucaslwl 22:5c07298d3383 1502
lucaslwl 22:5c07298d3383 1503 uint32_t en_dcloffint : 1;
lucaslwl 22:5c07298d3383 1504 uint32_t en_fstint : 1;
lucaslwl 22:5c07298d3383 1505 uint32_t en_eovf : 1;
lucaslwl 22:5c07298d3383 1506 uint32_t en_eint : 1;
lucaslwl 22:5c07298d3383 1507
lucaslwl 22:5c07298d3383 1508 uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 1509
lucaslwl 22:5c07298d3383 1510 } bit;
lucaslwl 22:5c07298d3383 1511
lucaslwl 22:5c07298d3383 1512 } max30001_en_int;
lucaslwl 22:5c07298d3383 1513
lucaslwl 22:5c07298d3383 1514
lucaslwl 22:5c07298d3383 1515 /**
lucaslwl 22:5c07298d3383 1516 * @brief EN_INT2 (0x03)
lucaslwl 22:5c07298d3383 1517 */
lucaslwl 22:5c07298d3383 1518 union max30001_en_int2_reg {
lucaslwl 22:5c07298d3383 1519 uint32_t all;
lucaslwl 22:5c07298d3383 1520
lucaslwl 22:5c07298d3383 1521 struct {
lucaslwl 22:5c07298d3383 1522 uint32_t intb_type : 2;
lucaslwl 22:5c07298d3383 1523 uint32_t reserved1 : 1;
lucaslwl 22:5c07298d3383 1524 uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 1525
lucaslwl 22:5c07298d3383 1526 uint32_t reserved3 : 1;
lucaslwl 22:5c07298d3383 1527 uint32_t reserved4 : 1;
lucaslwl 22:5c07298d3383 1528 uint32_t reserved5 : 1;
lucaslwl 22:5c07298d3383 1529 uint32_t reserved6 : 1;
lucaslwl 22:5c07298d3383 1530
lucaslwl 22:5c07298d3383 1531 uint32_t en_pllint : 1;
lucaslwl 22:5c07298d3383 1532 uint32_t en_samp : 1;
lucaslwl 22:5c07298d3383 1533 uint32_t en_rrint : 1;
lucaslwl 22:5c07298d3383 1534 uint32_t en_lonint : 1;
lucaslwl 22:5c07298d3383 1535
lucaslwl 22:5c07298d3383 1536 uint32_t en_pedge : 1;
lucaslwl 22:5c07298d3383 1537 uint32_t en_povf : 1;
lucaslwl 22:5c07298d3383 1538 uint32_t en_pint : 1;
lucaslwl 22:5c07298d3383 1539 uint32_t en_bcgmon : 1;
lucaslwl 22:5c07298d3383 1540
lucaslwl 22:5c07298d3383 1541 uint32_t en_bundr : 1;
lucaslwl 22:5c07298d3383 1542 uint32_t en_bover : 1;
lucaslwl 22:5c07298d3383 1543 uint32_t en_bovf : 1;
lucaslwl 22:5c07298d3383 1544 uint32_t en_bint : 1;
lucaslwl 22:5c07298d3383 1545
lucaslwl 22:5c07298d3383 1546 uint32_t en_dcloffint : 1;
lucaslwl 22:5c07298d3383 1547 uint32_t en_fstint : 1;
lucaslwl 22:5c07298d3383 1548 uint32_t en_eovf : 1;
lucaslwl 22:5c07298d3383 1549 uint32_t en_eint : 1;
lucaslwl 22:5c07298d3383 1550
lucaslwl 22:5c07298d3383 1551 uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 1552
lucaslwl 22:5c07298d3383 1553 } bit;
lucaslwl 22:5c07298d3383 1554
lucaslwl 22:5c07298d3383 1555 } max30001_en_int2;
lucaslwl 22:5c07298d3383 1556
lucaslwl 22:5c07298d3383 1557 /**
lucaslwl 22:5c07298d3383 1558 * @brief MNGR_INT (0x04)
lucaslwl 22:5c07298d3383 1559 */
lucaslwl 22:5c07298d3383 1560 union max30001_mngr_int_reg {
lucaslwl 22:5c07298d3383 1561 uint32_t all;
lucaslwl 22:5c07298d3383 1562
lucaslwl 22:5c07298d3383 1563 struct {
lucaslwl 22:5c07298d3383 1564 uint32_t samp_it : 2;
lucaslwl 22:5c07298d3383 1565 uint32_t clr_samp : 1;
lucaslwl 22:5c07298d3383 1566 uint32_t clr_pedge : 1;
lucaslwl 22:5c07298d3383 1567 uint32_t clr_rrint : 2;
lucaslwl 22:5c07298d3383 1568 uint32_t clr_fast : 1;
lucaslwl 22:5c07298d3383 1569 uint32_t reserved1 : 1;
lucaslwl 22:5c07298d3383 1570 uint32_t reserved2 : 4;
lucaslwl 22:5c07298d3383 1571 uint32_t reserved3 : 4;
lucaslwl 22:5c07298d3383 1572
lucaslwl 22:5c07298d3383 1573 uint32_t b_fit : 3;
lucaslwl 22:5c07298d3383 1574 uint32_t e_fit : 5;
lucaslwl 22:5c07298d3383 1575
lucaslwl 22:5c07298d3383 1576 uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 1577
lucaslwl 22:5c07298d3383 1578 } bit;
lucaslwl 22:5c07298d3383 1579
lucaslwl 22:5c07298d3383 1580 } max30001_mngr_int;
lucaslwl 22:5c07298d3383 1581
lucaslwl 22:5c07298d3383 1582 /**
lucaslwl 22:5c07298d3383 1583 * @brief MNGR_DYN (0x05)
lucaslwl 22:5c07298d3383 1584 */
lucaslwl 22:5c07298d3383 1585 union max30001_mngr_dyn_reg {
lucaslwl 22:5c07298d3383 1586 uint32_t all;
lucaslwl 22:5c07298d3383 1587
lucaslwl 22:5c07298d3383 1588 struct {
lucaslwl 22:5c07298d3383 1589 uint32_t bloff_lo_it : 8;
lucaslwl 22:5c07298d3383 1590 uint32_t bloff_hi_it : 8;
lucaslwl 22:5c07298d3383 1591 uint32_t fast_th : 6;
lucaslwl 22:5c07298d3383 1592 uint32_t fast : 2;
lucaslwl 22:5c07298d3383 1593 uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 1594 } bit;
lucaslwl 22:5c07298d3383 1595
lucaslwl 22:5c07298d3383 1596 } max30001_mngr_dyn;
lucaslwl 22:5c07298d3383 1597
lucaslwl 22:5c07298d3383 1598 // 0x08
lucaslwl 22:5c07298d3383 1599 // uint32_t max30001_sw_rst;
lucaslwl 22:5c07298d3383 1600
lucaslwl 22:5c07298d3383 1601 // 0x09
lucaslwl 22:5c07298d3383 1602 // uint32_t max30001_synch;
lucaslwl 22:5c07298d3383 1603
lucaslwl 22:5c07298d3383 1604 // 0x0A
lucaslwl 22:5c07298d3383 1605 // uint32_t max30001_fifo_rst;
lucaslwl 22:5c07298d3383 1606
lucaslwl 22:5c07298d3383 1607
lucaslwl 22:5c07298d3383 1608 /**
lucaslwl 22:5c07298d3383 1609 * @brief INFO (0x0F)
lucaslwl 22:5c07298d3383 1610 */
lucaslwl 22:5c07298d3383 1611 union max30001_info_reg {
lucaslwl 22:5c07298d3383 1612 uint32_t all;
lucaslwl 22:5c07298d3383 1613 struct {
lucaslwl 22:5c07298d3383 1614 uint32_t serial : 12;
lucaslwl 22:5c07298d3383 1615 uint32_t part_id : 2;
lucaslwl 22:5c07298d3383 1616 uint32_t sample : 1;
lucaslwl 22:5c07298d3383 1617 uint32_t reserved1 : 1;
lucaslwl 22:5c07298d3383 1618 uint32_t rev_id : 4;
lucaslwl 22:5c07298d3383 1619 uint32_t pattern : 4;
lucaslwl 22:5c07298d3383 1620 uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 1621 } bit;
lucaslwl 22:5c07298d3383 1622
lucaslwl 22:5c07298d3383 1623 } max30001_info;
lucaslwl 22:5c07298d3383 1624
lucaslwl 22:5c07298d3383 1625 /**
lucaslwl 22:5c07298d3383 1626 * @brief CNFG_GEN (0x10)
lucaslwl 22:5c07298d3383 1627 */
lucaslwl 22:5c07298d3383 1628 union max30001_cnfg_gen_reg {
lucaslwl 22:5c07298d3383 1629 uint32_t all;
lucaslwl 22:5c07298d3383 1630 struct {
lucaslwl 22:5c07298d3383 1631 uint32_t rbiasn : 1;
lucaslwl 22:5c07298d3383 1632 uint32_t rbiasp : 1;
lucaslwl 22:5c07298d3383 1633 uint32_t rbiasv : 2;
lucaslwl 22:5c07298d3383 1634 uint32_t en_rbias : 2;
lucaslwl 22:5c07298d3383 1635 uint32_t vth : 2;
lucaslwl 22:5c07298d3383 1636 uint32_t imag : 3;
lucaslwl 22:5c07298d3383 1637 uint32_t ipol : 1;
lucaslwl 22:5c07298d3383 1638 uint32_t en_dcloff : 2;
lucaslwl 22:5c07298d3383 1639 uint32_t en_bloff : 2;
lucaslwl 22:5c07298d3383 1640 uint32_t reserved1 : 1;
lucaslwl 22:5c07298d3383 1641 uint32_t en_pace : 1;
lucaslwl 22:5c07298d3383 1642 uint32_t en_bioz : 1;
lucaslwl 22:5c07298d3383 1643 uint32_t en_ecg : 1;
lucaslwl 22:5c07298d3383 1644 uint32_t fmstr : 2;
lucaslwl 22:5c07298d3383 1645 uint32_t en_ulp_lon : 2;
lucaslwl 22:5c07298d3383 1646 uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 1647 } bit;
lucaslwl 22:5c07298d3383 1648
lucaslwl 22:5c07298d3383 1649 } max30001_cnfg_gen;
lucaslwl 22:5c07298d3383 1650
lucaslwl 22:5c07298d3383 1651
lucaslwl 22:5c07298d3383 1652 /**
lucaslwl 22:5c07298d3383 1653 * @brief CNFG_CAL (0x12)
lucaslwl 22:5c07298d3383 1654 */
lucaslwl 22:5c07298d3383 1655 union max30001_cnfg_cal_reg {
lucaslwl 22:5c07298d3383 1656 uint32_t all;
lucaslwl 22:5c07298d3383 1657 struct {
lucaslwl 22:5c07298d3383 1658 uint32_t thigh : 11;
lucaslwl 22:5c07298d3383 1659 uint32_t fifty : 1;
lucaslwl 22:5c07298d3383 1660 uint32_t fcal : 3;
lucaslwl 22:5c07298d3383 1661 uint32_t reserved1 : 5;
lucaslwl 22:5c07298d3383 1662 uint32_t vmag : 1;
lucaslwl 22:5c07298d3383 1663 uint32_t vmode : 1;
lucaslwl 22:5c07298d3383 1664 uint32_t en_vcal : 1;
lucaslwl 22:5c07298d3383 1665 uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 1666 uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 1667 } bit;
lucaslwl 22:5c07298d3383 1668
lucaslwl 22:5c07298d3383 1669 } max30001_cnfg_cal;
lucaslwl 22:5c07298d3383 1670
lucaslwl 22:5c07298d3383 1671 /**
lucaslwl 22:5c07298d3383 1672 * @brief CNFG_EMUX (0x14)
lucaslwl 22:5c07298d3383 1673 */
lucaslwl 22:5c07298d3383 1674 union max30001_cnfg_emux_reg {
lucaslwl 22:5c07298d3383 1675 uint32_t all;
lucaslwl 22:5c07298d3383 1676 struct {
lucaslwl 22:5c07298d3383 1677 uint32_t reserved1 : 16;
lucaslwl 22:5c07298d3383 1678 uint32_t caln_sel : 2;
lucaslwl 22:5c07298d3383 1679 uint32_t calp_sel : 2;
lucaslwl 22:5c07298d3383 1680 uint32_t openn : 1;
lucaslwl 22:5c07298d3383 1681 uint32_t openp : 1;
lucaslwl 22:5c07298d3383 1682 uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 1683 uint32_t pol : 1;
lucaslwl 22:5c07298d3383 1684 uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 1685 } bit;
lucaslwl 22:5c07298d3383 1686
lucaslwl 22:5c07298d3383 1687 } max30001_cnfg_emux;
lucaslwl 22:5c07298d3383 1688
lucaslwl 22:5c07298d3383 1689
lucaslwl 22:5c07298d3383 1690 /**
lucaslwl 22:5c07298d3383 1691 * @brief CNFG_ECG (0x15)
lucaslwl 22:5c07298d3383 1692 */
lucaslwl 22:5c07298d3383 1693 union max30001_cnfg_ecg_reg {
lucaslwl 22:5c07298d3383 1694 uint32_t all;
lucaslwl 22:5c07298d3383 1695 struct {
lucaslwl 22:5c07298d3383 1696 uint32_t reserved1 : 12;
lucaslwl 22:5c07298d3383 1697 uint32_t dlpf : 2;
lucaslwl 22:5c07298d3383 1698 uint32_t dhpf : 1;
lucaslwl 22:5c07298d3383 1699 uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 1700 uint32_t gain : 2;
lucaslwl 22:5c07298d3383 1701 uint32_t reserved3 : 4;
lucaslwl 22:5c07298d3383 1702 uint32_t rate : 2;
lucaslwl 22:5c07298d3383 1703
lucaslwl 22:5c07298d3383 1704 uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 1705 } bit;
lucaslwl 22:5c07298d3383 1706
lucaslwl 22:5c07298d3383 1707 } max30001_cnfg_ecg;
lucaslwl 22:5c07298d3383 1708
lucaslwl 22:5c07298d3383 1709 /**
lucaslwl 22:5c07298d3383 1710 * @brief CNFG_BMUX (0x17)
lucaslwl 22:5c07298d3383 1711 */
lucaslwl 22:5c07298d3383 1712 union max30001_cnfg_bmux_reg {
lucaslwl 22:5c07298d3383 1713 uint32_t all;
lucaslwl 22:5c07298d3383 1714 struct {
lucaslwl 22:5c07298d3383 1715 uint32_t fbist : 2;
lucaslwl 22:5c07298d3383 1716 uint32_t reserved1 : 2;
lucaslwl 22:5c07298d3383 1717 uint32_t rmod : 3;
lucaslwl 22:5c07298d3383 1718 uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 1719 uint32_t rnom : 3;
lucaslwl 22:5c07298d3383 1720 uint32_t en_bist : 1;
lucaslwl 22:5c07298d3383 1721 uint32_t cg_mode : 2;
lucaslwl 22:5c07298d3383 1722 uint32_t reserved3 : 2;
lucaslwl 22:5c07298d3383 1723 uint32_t caln_sel : 2;
lucaslwl 22:5c07298d3383 1724 uint32_t calp_sel : 2;
lucaslwl 22:5c07298d3383 1725 uint32_t openn : 1;
lucaslwl 22:5c07298d3383 1726 uint32_t openp : 1;
lucaslwl 22:5c07298d3383 1727 uint32_t reserved4 : 2;
lucaslwl 22:5c07298d3383 1728 uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 1729 } bit;
lucaslwl 22:5c07298d3383 1730
lucaslwl 22:5c07298d3383 1731 } max30001_cnfg_bmux;
lucaslwl 22:5c07298d3383 1732
lucaslwl 22:5c07298d3383 1733 /**
lucaslwl 22:5c07298d3383 1734 * @brief CNFG_BIOZ (0x18)
lucaslwl 22:5c07298d3383 1735 */
lucaslwl 22:5c07298d3383 1736 union max30001_bioz_reg {
lucaslwl 22:5c07298d3383 1737 uint32_t all;
lucaslwl 22:5c07298d3383 1738 struct {
lucaslwl 22:5c07298d3383 1739 uint32_t phoff : 4;
lucaslwl 22:5c07298d3383 1740 uint32_t cgmag : 3;
lucaslwl 22:5c07298d3383 1741 uint32_t cgmon : 1;
lucaslwl 22:5c07298d3383 1742 uint32_t fcgen : 4;
lucaslwl 22:5c07298d3383 1743 uint32_t dlpf : 2;
lucaslwl 22:5c07298d3383 1744 uint32_t dhpf : 2;
lucaslwl 22:5c07298d3383 1745 uint32_t gain : 2;
lucaslwl 22:5c07298d3383 1746 uint32_t reserved1 : 1;
lucaslwl 22:5c07298d3383 1747 uint32_t ext_rbias : 1;
lucaslwl 22:5c07298d3383 1748 uint32_t ahpf : 3;
lucaslwl 22:5c07298d3383 1749 uint32_t rate : 1;
lucaslwl 22:5c07298d3383 1750 uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 1751 } bit;
lucaslwl 22:5c07298d3383 1752
lucaslwl 22:5c07298d3383 1753 } max30001_cnfg_bioz;
lucaslwl 22:5c07298d3383 1754
lucaslwl 22:5c07298d3383 1755
lucaslwl 22:5c07298d3383 1756 /**
lucaslwl 22:5c07298d3383 1757 * @brief CNFG_PACE (0x1A)
lucaslwl 22:5c07298d3383 1758 */
lucaslwl 22:5c07298d3383 1759 union max30001_cnfg_pace_reg {
lucaslwl 22:5c07298d3383 1760 uint32_t all;
lucaslwl 22:5c07298d3383 1761
lucaslwl 22:5c07298d3383 1762 struct {
lucaslwl 22:5c07298d3383 1763 uint32_t dacn : 4;
lucaslwl 22:5c07298d3383 1764 uint32_t dacp : 4;
lucaslwl 22:5c07298d3383 1765 uint32_t reserved1 : 4;
lucaslwl 22:5c07298d3383 1766 uint32_t aout : 2;
lucaslwl 22:5c07298d3383 1767 uint32_t aout_lbw : 1;
lucaslwl 22:5c07298d3383 1768 uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 1769 uint32_t gain : 3;
lucaslwl 22:5c07298d3383 1770 uint32_t gn_diff_off : 1;
lucaslwl 22:5c07298d3383 1771 uint32_t reserved3 : 3;
lucaslwl 22:5c07298d3383 1772 uint32_t pol : 1;
lucaslwl 22:5c07298d3383 1773 uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 1774 } bit;
lucaslwl 22:5c07298d3383 1775
lucaslwl 22:5c07298d3383 1776 } max30001_cnfg_pace;
lucaslwl 22:5c07298d3383 1777
lucaslwl 22:5c07298d3383 1778 /**
lucaslwl 22:5c07298d3383 1779 * @brief CNFG_RTOR1 (0x1D)
lucaslwl 22:5c07298d3383 1780 */
lucaslwl 22:5c07298d3383 1781 union max30001_cnfg_rtor1_reg {
lucaslwl 22:5c07298d3383 1782 uint32_t all;
lucaslwl 22:5c07298d3383 1783 struct {
lucaslwl 22:5c07298d3383 1784 uint32_t reserved1 : 8;
lucaslwl 22:5c07298d3383 1785 uint32_t ptsf : 4;
lucaslwl 22:5c07298d3383 1786 uint32_t pavg : 2;
lucaslwl 22:5c07298d3383 1787 uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 1788 uint32_t en_rtor : 1;
lucaslwl 22:5c07298d3383 1789 uint32_t gain : 4;
lucaslwl 22:5c07298d3383 1790 uint32_t wndw : 4;
lucaslwl 22:5c07298d3383 1791 uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 1792 } bit;
lucaslwl 22:5c07298d3383 1793
lucaslwl 22:5c07298d3383 1794 } max30001_cnfg_rtor1;
lucaslwl 22:5c07298d3383 1795
lucaslwl 22:5c07298d3383 1796 /**
lucaslwl 22:5c07298d3383 1797 * @brief CNFG_RTOR2 (0x1E)
lucaslwl 22:5c07298d3383 1798 */
lucaslwl 22:5c07298d3383 1799 union max30001_cnfg_rtor2_reg {
lucaslwl 22:5c07298d3383 1800 uint32_t all;
lucaslwl 22:5c07298d3383 1801 struct {
lucaslwl 22:5c07298d3383 1802 uint32_t reserved1 : 8;
lucaslwl 22:5c07298d3383 1803 uint32_t rhsf : 3;
lucaslwl 22:5c07298d3383 1804 uint32_t reserved2 : 1;
lucaslwl 22:5c07298d3383 1805 uint32_t ravg : 2;
lucaslwl 22:5c07298d3383 1806 uint32_t reserved3 : 2;
lucaslwl 22:5c07298d3383 1807 uint32_t hoff : 6;
lucaslwl 22:5c07298d3383 1808 uint32_t reserved4 : 2;
lucaslwl 22:5c07298d3383 1809 uint32_t reserved : 8;
lucaslwl 22:5c07298d3383 1810 } bit;
lucaslwl 22:5c07298d3383 1811
lucaslwl 22:5c07298d3383 1812 } max30001_cnfg_rtor2;
lucaslwl 22:5c07298d3383 1813
lucaslwl 22:5c07298d3383 1814 /*********************************************************************************/
lucaslwl 22:5c07298d3383 1815
lucaslwl 22:5c07298d3383 1816 typedef enum {
lucaslwl 22:5c07298d3383 1817 MAX30001_NO_INT = 0, // No interrupt
lucaslwl 22:5c07298d3383 1818 MAX30001_INT_B = 1, // INTB selected for interrupt
lucaslwl 22:5c07298d3383 1819 MAX30001_INT_2B = 2 // INT2B selected for interrupt
lucaslwl 22:5c07298d3383 1820 } max30001_intrpt_Location_t;
lucaslwl 22:5c07298d3383 1821
lucaslwl 22:5c07298d3383 1822 typedef enum {
lucaslwl 22:5c07298d3383 1823 MAX30001_INT_DISABLED = 0b00,
lucaslwl 22:5c07298d3383 1824 MAX30001_INT_CMOS = 0b01,
lucaslwl 22:5c07298d3383 1825 MAX30001_INT_ODN = 0b10,
lucaslwl 22:5c07298d3383 1826 MAX30001_INT_ODNR = 0b11
lucaslwl 22:5c07298d3383 1827 } max30001_intrpt_type_t;
lucaslwl 22:5c07298d3383 1828
lucaslwl 22:5c07298d3383 1829 typedef enum { // Input Polarity selection
lucaslwl 22:5c07298d3383 1830 MAX30001_NON_INV = 0, // Non-Inverted
lucaslwl 22:5c07298d3383 1831 MAX30001_INV = 1 // Inverted
lucaslwl 22:5c07298d3383 1832 } max30001_emux_pol;
lucaslwl 22:5c07298d3383 1833
lucaslwl 22:5c07298d3383 1834 typedef enum { // OPENP and OPENN setting
lucaslwl 22:5c07298d3383 1835 MAX30001_ECG_CON_AFE = 0, // ECGx is connected to AFE channel
lucaslwl 22:5c07298d3383 1836 MAX30001_ECG_ISO_AFE = 1 // ECGx is isolated from AFE channel
lucaslwl 22:5c07298d3383 1837 } max30001_emux_openx;
lucaslwl 22:5c07298d3383 1838
lucaslwl 22:5c07298d3383 1839 typedef enum { // EMUX_CALP_SEL & EMUX_CALN_SEL
lucaslwl 22:5c07298d3383 1840 MAX30001_NO_CAL_SIG = 0b00, // No calibration signal is applied
lucaslwl 22:5c07298d3383 1841 MAX30001_INPT_VMID = 0b01, // Input is connected to VMID
lucaslwl 22:5c07298d3383 1842 MAX30001_INPT_VCALP = 0b10, // Input is connected to VCALP
lucaslwl 22:5c07298d3383 1843 MAX30001_INPT_VCALN = 0b11 // Input is connected to VCALN
lucaslwl 22:5c07298d3383 1844 } max30001_emux_calx_sel;
lucaslwl 22:5c07298d3383 1845
lucaslwl 22:5c07298d3383 1846 typedef enum { // EN_ECG, EN_BIOZ, EN_PACE
lucaslwl 22:5c07298d3383 1847 MAX30001_CHANNEL_DISABLED = 0b0, //
lucaslwl 22:5c07298d3383 1848 MAX30001_CHANNEL_ENABLED = 0b1
lucaslwl 22:5c07298d3383 1849 } max30001_en_feature;
lucaslwl 22:5c07298d3383 1850
lucaslwl 22:5c07298d3383 1851 /*********************************************************************************/
lucaslwl 22:5c07298d3383 1852 // Data
lucaslwl 22:5c07298d3383 1853 uint32_t max30001_ECG_FIFO_buffer[32]; // (303 for internal test)
lucaslwl 22:5c07298d3383 1854 uint32_t max30001_BIOZ_FIFO_buffer[8]; // (303 for internal test)
lucaslwl 22:5c07298d3383 1855
lucaslwl 22:5c07298d3383 1856 uint32_t max30001_PACE[18]; // Pace Data 0-5
lucaslwl 22:5c07298d3383 1857
lucaslwl 22:5c07298d3383 1858 uint32_t max30001_RtoR_data; // This holds the RtoR data
lucaslwl 22:5c07298d3383 1859
lucaslwl 22:5c07298d3383 1860 uint32_t max30001_DCLeadOff; // This holds the LeadOff data, Last 4 bits give
lucaslwl 22:5c07298d3383 1861 // the status, BIT3=LOFF_PH, BIT2=LOFF_PL,
lucaslwl 22:5c07298d3383 1862 // BIT1=LOFF_NH, BIT0=LOFF_NL
lucaslwl 22:5c07298d3383 1863 // 8th and 9th bits tell Lead off is due to ECG or BIOZ.
lucaslwl 22:5c07298d3383 1864 // 0b01 = ECG Lead Off and 0b10 = BIOZ Lead off
lucaslwl 22:5c07298d3383 1865
lucaslwl 22:5c07298d3383 1866 uint32_t max30001_ACLeadOff; // This gives the state of the BIOZ AC Lead Off
lucaslwl 22:5c07298d3383 1867 // state. BIT 1 = BOVER, BIT 0 = BUNDR
lucaslwl 22:5c07298d3383 1868
lucaslwl 22:5c07298d3383 1869 uint32_t max30001_bcgmon; // This holds the BCGMON data, BIT 1 = BCGMP, BIT0 =
lucaslwl 22:5c07298d3383 1870 // BCGMN
lucaslwl 22:5c07298d3383 1871
lucaslwl 22:5c07298d3383 1872 uint32_t max30001_LeadOn; // This holds the LeadOn data, BIT1 = BIOZ Lead ON,
lucaslwl 22:5c07298d3383 1873 // BIT0 = ECG Lead ON, BIT8= Lead On Status Bit
lucaslwl 22:5c07298d3383 1874
lucaslwl 22:5c07298d3383 1875 uint32_t max30001_timeout; // If the PLL does not respond, timeout and get out.
lucaslwl 22:5c07298d3383 1876
lucaslwl 22:5c07298d3383 1877 typedef struct { // Creating a structure for BLE data
lucaslwl 22:5c07298d3383 1878 int16_t R2R;
lucaslwl 22:5c07298d3383 1879 int16_t fmstr;
lucaslwl 22:5c07298d3383 1880 } max30001_t;
lucaslwl 22:5c07298d3383 1881
lucaslwl 22:5c07298d3383 1882 max30001_t hspValMax30001; // R2R, FMSTR
lucaslwl 22:5c07298d3383 1883
lucaslwl 22:5c07298d3383 1884 /**
lucaslwl 22:5c07298d3383 1885 * @brief Constructor that accepts pin names for the SPI interface
lucaslwl 22:5c07298d3383 1886 * @param spi pointer to the mbed SPI object
lucaslwl 22:5c07298d3383 1887 */
lucaslwl 22:5c07298d3383 1888 MAX30001(SPI *spi);
lucaslwl 22:5c07298d3383 1889
lucaslwl 22:5c07298d3383 1890 /**
lucaslwl 22:5c07298d3383 1891 * @brief Constructor that accepts pin names for the SPI interface
lucaslwl 22:5c07298d3383 1892 * @param mosi master out slave in pin name
lucaslwl 22:5c07298d3383 1893 * @param miso master in slave out pin name
lucaslwl 22:5c07298d3383 1894 * @param sclk serial clock pin name
lucaslwl 22:5c07298d3383 1895 * @param cs chip select pin name
lucaslwl 22:5c07298d3383 1896 */
lucaslwl 22:5c07298d3383 1897 MAX30001(PinName mosi, PinName miso, PinName sclk, PinName cs);
lucaslwl 22:5c07298d3383 1898
lucaslwl 22:5c07298d3383 1899 /**
lucaslwl 22:5c07298d3383 1900 * MAX30001 destructor
lucaslwl 22:5c07298d3383 1901 */
lucaslwl 22:5c07298d3383 1902 ~MAX30001(void);
lucaslwl 22:5c07298d3383 1903
lucaslwl 22:5c07298d3383 1904 /**
lucaslwl 22:5c07298d3383 1905 * @brief This function sets up the Resistive Bias mode and also selects the master clock frequency.
lucaslwl 22:5c07298d3383 1906 * @brief Uses Register: CNFG_GEN-0x10
lucaslwl 22:5c07298d3383 1907 * @param En_rbias: Enable and Select Resitive Lead Bias Mode
lucaslwl 22:5c07298d3383 1908 * @param Rbiasv: Resistive Bias Mode Value Selection
lucaslwl 22:5c07298d3383 1909 * @param Rbiasp: Enables Resistive Bias on Positive Input
lucaslwl 22:5c07298d3383 1910 * @param Rbiasn: Enables Resistive Bias on Negative Input
lucaslwl 22:5c07298d3383 1911 * @param Fmstr: Selects Master Clock Frequency
lucaslwl 22:5c07298d3383 1912 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1913 *
lucaslwl 22:5c07298d3383 1914 */
lucaslwl 22:5c07298d3383 1915 int max30001_Rbias_FMSTR_Init(uint8_t En_rbias, uint8_t Rbiasv,
lucaslwl 22:5c07298d3383 1916 uint8_t Rbiasp, uint8_t Rbiasn, uint8_t Fmstr);
lucaslwl 22:5c07298d3383 1917
lucaslwl 22:5c07298d3383 1918 /**
lucaslwl 22:5c07298d3383 1919 * @brief This function uses sets up the calibration signal internally. If it is desired to use the internal signal, then
lucaslwl 22:5c07298d3383 1920 * @brief this function must be called and the registers set, prior to setting the CALP_SEL and CALN_SEL in the ECG_InitStart
lucaslwl 22:5c07298d3383 1921 * @brief and BIOZ_InitStart functions.
lucaslwl 22:5c07298d3383 1922 * @brief Uses Register: CNFG_CAL-0x12
lucaslwl 22:5c07298d3383 1923 * @param En_Vcal: Calibration Source (VCALP and VCALN) Enable
lucaslwl 22:5c07298d3383 1924 * @param Vmode: Calibration Source Mode Selection
lucaslwl 22:5c07298d3383 1925 * @param Vmag: Calibration Source Magnitude Selection (VMAG)
lucaslwl 22:5c07298d3383 1926 * @param Fcal: Calibration Source Frequency Selection (FCAL)
lucaslwl 22:5c07298d3383 1927 * @param Thigh: Calibration Source Time High Selection
lucaslwl 22:5c07298d3383 1928 * @param Fifty: Calibration Source Duty Cycle Mode Selection
lucaslwl 22:5c07298d3383 1929 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1930 *
lucaslwl 22:5c07298d3383 1931 */
lucaslwl 22:5c07298d3383 1932 int max30001_CAL_InitStart(uint8_t En_Vcal, uint8_t Vmode, uint8_t Vmag,
lucaslwl 22:5c07298d3383 1933 uint8_t Fcal, uint16_t Thigh, uint8_t Fifty);
lucaslwl 22:5c07298d3383 1934
lucaslwl 22:5c07298d3383 1935 /**
lucaslwl 22:5c07298d3383 1936 * @brief This function disables the VCAL signal
lucaslwl 22:5c07298d3383 1937 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1938 */
lucaslwl 22:5c07298d3383 1939 int max30001_CAL_Stop(void);
lucaslwl 22:5c07298d3383 1940
lucaslwl 22:5c07298d3383 1941 /**
lucaslwl 22:5c07298d3383 1942 * @brief This function handles the assignment of the two interrupt pins (INTB & INT2B) with various
lucaslwl 22:5c07298d3383 1943 * @brief functions/behaviors of the MAX30001. Also, each pin can be configured for different drive capability.
lucaslwl 22:5c07298d3383 1944 * @brief Uses Registers: EN_INT-0x02 and EN_INT2-0x03.
lucaslwl 22:5c07298d3383 1945 * @param max30001_intrpt_Locatio_t <argument>: All the arguments with the aforementioned enumeration essentially
lucaslwl 22:5c07298d3383 1946 * can be configured to generate an interrupt on either INTB or INT2B or NONE.
lucaslwl 22:5c07298d3383 1947 * @param max30001_intrpt_type_t intb_Type: INTB Port Type (EN_INT Selections).
lucaslwl 22:5c07298d3383 1948 * @param max30001_intrpt_type _t int2b_Type: INT2B Port Type (EN_INT2 Selections)
lucaslwl 22:5c07298d3383 1949 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1950 *
lucaslwl 22:5c07298d3383 1951 */
lucaslwl 22:5c07298d3383 1952 int max30001_INT_assignment(max30001_intrpt_Location_t en_enint_loc, max30001_intrpt_Location_t en_eovf_loc, max30001_intrpt_Location_t en_fstint_loc,
lucaslwl 22:5c07298d3383 1953 max30001_intrpt_Location_t en_dcloffint_loc, max30001_intrpt_Location_t en_bint_loc, max30001_intrpt_Location_t en_bovf_loc,
lucaslwl 22:5c07298d3383 1954 max30001_intrpt_Location_t en_bover_loc, max30001_intrpt_Location_t en_bundr_loc, max30001_intrpt_Location_t en_bcgmon_loc,
lucaslwl 22:5c07298d3383 1955 max30001_intrpt_Location_t en_pint_loc, max30001_intrpt_Location_t en_povf_loc, max30001_intrpt_Location_t en_pedge_loc,
lucaslwl 22:5c07298d3383 1956 max30001_intrpt_Location_t en_lonint_loc, max30001_intrpt_Location_t en_rrint_loc, max30001_intrpt_Location_t en_samp_loc,
lucaslwl 22:5c07298d3383 1957 max30001_intrpt_type_t intb_Type, max30001_intrpt_type_t int2b_Type);
lucaslwl 22:5c07298d3383 1958
lucaslwl 22:5c07298d3383 1959
lucaslwl 22:5c07298d3383 1960
lucaslwl 22:5c07298d3383 1961 /**
lucaslwl 22:5c07298d3383 1962 * @brief For MAX30001/3 ONLY
lucaslwl 22:5c07298d3383 1963 * @brief This function sets up the MAX30001 for the ECG measurements.
lucaslwl 22:5c07298d3383 1964 * @brief Registers used: CNFG_EMUX, CNFG_GEN, MNGR_INT, CNFG_ECG.
lucaslwl 22:5c07298d3383 1965 * @param En_ecg: ECG Channel Enable <CNFG_GEN register bits>
lucaslwl 22:5c07298d3383 1966 * @param Openp: Open the ECGN Input Switch (most often used for testing and calibration studies) <CNFG_EMUX register bits>
lucaslwl 22:5c07298d3383 1967 * @param Openn: Open the ECGN Input Switch (most often used for testing and calibration studies) <CNFG_EMUX register bits>
lucaslwl 22:5c07298d3383 1968 * @param Calp_sel: ECGP Calibration Selection <CNFG_EMUX register bits>
lucaslwl 22:5c07298d3383 1969 * @param Caln_sel: ECGN Calibration Selection <CNFG_EMUX register bits>
lucaslwl 22:5c07298d3383 1970 * @param E_fit: ECG FIFO Interrupt Threshold (issues EINT based on number of unread FIFO records) <CNFG_GEN register bits>
lucaslwl 22:5c07298d3383 1971 * @param Clr_rrint: RTOR R Detect Interrupt (RRINT) Clear Behavior <CNFG_GEN register bits>
lucaslwl 22:5c07298d3383 1972 * @param Rate: ECG Data Rate
lucaslwl 22:5c07298d3383 1973 * @param Gain: ECG Channel Gain Setting
lucaslwl 22:5c07298d3383 1974 * @param Dhpf: ECG Channel Digital High Pass Filter Cutoff Frequency
lucaslwl 22:5c07298d3383 1975 * @param Dlpf: ECG Channel Digital Low Pass Filter Cutoff Frequency
lucaslwl 22:5c07298d3383 1976 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1977 *
lucaslwl 22:5c07298d3383 1978 */
lucaslwl 22:5c07298d3383 1979 int max30001_ECG_InitStart(uint8_t En_ecg, uint8_t Openp, uint8_t Openn,
lucaslwl 22:5c07298d3383 1980 uint8_t Pol, uint8_t Calp_sel, uint8_t Caln_sel,
lucaslwl 22:5c07298d3383 1981 uint8_t E_fit, uint8_t Rate, uint8_t Gain,
lucaslwl 22:5c07298d3383 1982 uint8_t Dhpf, uint8_t Dlpf);
lucaslwl 22:5c07298d3383 1983
lucaslwl 22:5c07298d3383 1984 /**
lucaslwl 22:5c07298d3383 1985 * @brief For MAX30001/3 ONLY
lucaslwl 22:5c07298d3383 1986 * @brief This function enables the Fast mode feature of the ECG.
lucaslwl 22:5c07298d3383 1987 * @brief Registers used: MNGR_INT-0x04, MNGR_DYN-0x05
lucaslwl 22:5c07298d3383 1988 * @param Clr_Fast: FAST MODE Interrupt Clear Behavior <MNGR_INT Register>
lucaslwl 22:5c07298d3383 1989 * @param Fast: ECG Channel Fast Recovery Mode Selection (ECG High Pass Filter Bypass) <MNGR_DYN Register>
lucaslwl 22:5c07298d3383 1990 * @param Fast_Th: Automatic Fast Recovery Threshold
lucaslwl 22:5c07298d3383 1991 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 1992 *
lucaslwl 22:5c07298d3383 1993 */
lucaslwl 22:5c07298d3383 1994 int max30001_ECGFast_Init(uint8_t Clr_Fast, uint8_t Fast, uint8_t Fast_Th);
lucaslwl 22:5c07298d3383 1995
lucaslwl 22:5c07298d3383 1996 /**
lucaslwl 22:5c07298d3383 1997 * @brief For MAX30001/3 ONLY
lucaslwl 22:5c07298d3383 1998 * @brief This function disables the ECG.
lucaslwl 22:5c07298d3383 1999 * @brief Uses Register CNFG_GEN-0x10.
lucaslwl 22:5c07298d3383 2000 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2001 *
lucaslwl 22:5c07298d3383 2002 */
lucaslwl 22:5c07298d3383 2003 int max30001_Stop_ECG(void);
lucaslwl 22:5c07298d3383 2004
lucaslwl 22:5c07298d3383 2005 /**
lucaslwl 22:5c07298d3383 2006 * @brief For MAX30001 ONLY
lucaslwl 22:5c07298d3383 2007 * @brief This function sets up the MAX30001 for pace signal detection.
lucaslwl 22:5c07298d3383 2008 * @brief If both PACE and BIOZ are turned ON, then make sure Fcgen is set for 80K or 40K in the
lucaslwl 22:5c07298d3383 2009 * @brief max30001_BIOZ_InitStart() function. However, if Only PACE is on but BIOZ off, then Fcgen can be set
lucaslwl 22:5c07298d3383 2010 * @brief for 80K only, in the max30001_BIOZ_InitStart() function
lucaslwl 22:5c07298d3383 2011 * @brief Registers used: MNGR_INT-0x04, CNFG_GEN-0x37, CNFG_PACE-0x1A.
lucaslwl 22:5c07298d3383 2012 * @param En_pace : PACE Channel Enable <CNFG_GEN Register>
lucaslwl 22:5c07298d3383 2013 * @param Clr_pedge : PACE Edge Detect Interrupt (PEDGE) Clear Behavior <MNGR_INT Register>
lucaslwl 22:5c07298d3383 2014 * @param Pol: PACE Input Polarity Selection <CNFG_PACE Register>
lucaslwl 22:5c07298d3383 2015 * @param Gn_diff_off: PACE Differentiator Mode <CNFG_PACE Register>
lucaslwl 22:5c07298d3383 2016 * @param Gain: PACE Channel Gain Selection <CNFG_PACE Register>
lucaslwl 22:5c07298d3383 2017 * @param Aout_lbw: PACE Analog Output Buffer Bandwidth Mode <CNFG_PACE Register>
lucaslwl 22:5c07298d3383 2018 * @param Aout: PACE Single Ended Analog Output Buffer Signal Monitoring Selection <CNFG_PACE Register>
lucaslwl 22:5c07298d3383 2019 * @param Dacp (4bits): PACE Detector Positive Comparator Threshold <CNFG_PACE Register>
lucaslwl 22:5c07298d3383 2020 * @param Dacn(4bits): PACE Detector Negative Comparator Threshold <CNFG_PACE Register>
lucaslwl 22:5c07298d3383 2021 * @returns 0-if no error. A non-zero value indicates an error <CNFG_PACE Register>
lucaslwl 22:5c07298d3383 2022 *
lucaslwl 22:5c07298d3383 2023 */
lucaslwl 22:5c07298d3383 2024 int max30001_PACE_InitStart(uint8_t En_pace, uint8_t Clr_pedge, uint8_t Pol,
lucaslwl 22:5c07298d3383 2025 uint8_t Gn_diff_off, uint8_t Gain,
lucaslwl 22:5c07298d3383 2026 uint8_t Aout_lbw, uint8_t Aout, uint8_t Dacp,
lucaslwl 22:5c07298d3383 2027 uint8_t Dacn);
lucaslwl 22:5c07298d3383 2028
lucaslwl 22:5c07298d3383 2029 /**
lucaslwl 22:5c07298d3383 2030 *@brief For MAX30001 ONLY
lucaslwl 22:5c07298d3383 2031 *@param This function disables the PACE. Uses Register CNFG_GEN-0x10.
lucaslwl 22:5c07298d3383 2032 *@returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2033 *
lucaslwl 22:5c07298d3383 2034 */
lucaslwl 22:5c07298d3383 2035 int max30001_Stop_PACE(void);
lucaslwl 22:5c07298d3383 2036
lucaslwl 22:5c07298d3383 2037 /**
lucaslwl 22:5c07298d3383 2038 * @brief For MAX30001/2 ONLY
lucaslwl 22:5c07298d3383 2039 * @brief This function sets up the MAX30001 for BIOZ measurement.
lucaslwl 22:5c07298d3383 2040 * @brief Registers used: MNGR_INT-0x04, CNFG_GEN-0X10, CNFG_BMUX-0x17,CNFG_BIOZ-0x18.
lucaslwl 22:5c07298d3383 2041 * @param En_bioz: BIOZ Channel Enable <CNFG_GEN Register>
lucaslwl 22:5c07298d3383 2042 * @param Openp: Open the BIP Input Switch <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 2043 * @param Openn: Open the BIN Input Switch <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 2044 * @param Calp_sel: BIP Calibration Selection <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 2045 * @param Caln_sel: BIN Calibration Selection <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 2046 * @param CG_mode: BIOZ Current Generator Mode Selection <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 2047 * @param B_fit: BIOZ FIFO Interrupt Threshold (issues BINT based on number of unread FIFO records) <MNGR_INT Register>
lucaslwl 22:5c07298d3383 2048 * @param Rate: BIOZ Data Rate <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 2049 * @param Ahpf: BIOZ/PACE Channel Analog High Pass Filter Cutoff Frequency and Bypass <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 2050 * @param Ext_rbias: External Resistor Bias Enable <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 2051 * @param Gain: BIOZ Channel Gain Setting <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 2052 * @param Dhpf: BIOZ Channel Digital High Pass Filter Cutoff Frequency <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 2053 * @param Dlpf: BIOZ Channel Digital Low Pass Filter Cutoff Frequency <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 2054 * @param Fcgen: BIOZ Current Generator Modulation Frequency <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 2055 * @param Cgmon: BIOZ Current Generator Monitor <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 2056 * @param Cgmag: BIOZ Current Generator Magnitude <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 2057 * @param Phoff: BIOZ Current Generator Modulation Phase Offset <CNFG_BIOZ Register>
lucaslwl 22:5c07298d3383 2058 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2059 *
lucaslwl 22:5c07298d3383 2060 */
lucaslwl 22:5c07298d3383 2061 int max30001_BIOZ_InitStart(uint8_t En_bioz, uint8_t Openp, uint8_t Openn,
lucaslwl 22:5c07298d3383 2062 uint8_t Calp_sel, uint8_t Caln_sel,
lucaslwl 22:5c07298d3383 2063 uint8_t CG_mode,
lucaslwl 22:5c07298d3383 2064 /* uint8_t En_bioz,*/ uint8_t B_fit, uint8_t Rate,
lucaslwl 22:5c07298d3383 2065 uint8_t Ahpf, uint8_t Ext_rbias, uint8_t Gain,
lucaslwl 22:5c07298d3383 2066 uint8_t Dhpf, uint8_t Dlpf, uint8_t Fcgen,
lucaslwl 22:5c07298d3383 2067 uint8_t Cgmon, uint8_t Cgmag, uint8_t Phoff);
lucaslwl 22:5c07298d3383 2068
lucaslwl 22:5c07298d3383 2069 /**
lucaslwl 22:5c07298d3383 2070 * @brief For MAX30001/2 ONLY
lucaslwl 22:5c07298d3383 2071 * @brief This function disables the BIOZ. Uses Register CNFG_GEN-0x10.
lucaslwl 22:5c07298d3383 2072 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2073 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2074 *
lucaslwl 22:5c07298d3383 2075 */
lucaslwl 22:5c07298d3383 2076 int max30001_Stop_BIOZ(void);
lucaslwl 22:5c07298d3383 2077
lucaslwl 22:5c07298d3383 2078 /**
lucaslwl 22:5c07298d3383 2079 * @brief For MAX30001/2 ONLY
lucaslwl 22:5c07298d3383 2080 * @brief BIOZ modulated Resistance Built-in-Self-Test, Registers used: CNFG_BMUX-0x17
lucaslwl 22:5c07298d3383 2081 * @param En_bist: Enable Modulated Resistance Built-in-Self-test <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 2082 * @param Rnom: BIOZ RMOD BIST Nominal Resistance Selection <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 2083 * @param Rmod: BIOZ RMOD BIST Modulated Resistance Selection <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 2084 * @param Fbist: BIOZ RMOD BIST Frequency Selection <CNFG_BMUX Register>
lucaslwl 22:5c07298d3383 2085 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2086 *
lucaslwl 22:5c07298d3383 2087 */
lucaslwl 22:5c07298d3383 2088 int max30001_BIOZ_InitBist(uint8_t En_bist, uint8_t Rnom, uint8_t Rmod,
lucaslwl 22:5c07298d3383 2089 uint8_t Fbist);
lucaslwl 22:5c07298d3383 2090
lucaslwl 22:5c07298d3383 2091 /**
lucaslwl 22:5c07298d3383 2092 * @brief For MAX30001/3/4 ONLY
lucaslwl 22:5c07298d3383 2093 * @brief Sets up the device for RtoR measurement
lucaslwl 22:5c07298d3383 2094 * @param EN_rtor: ECG RTOR Detection Enable <RTOR1 Register>
lucaslwl 22:5c07298d3383 2095 * @param Wndw: R to R Window Averaging (Window Width = RTOR_WNDW[3:0]*8mS) <RTOR1 Register>
lucaslwl 22:5c07298d3383 2096 * @param Gain: R to R Gain (where Gain = 2^RTOR_GAIN[3:0], plus an auto-scale option) <RTOR1 Register>
lucaslwl 22:5c07298d3383 2097 * @param Pavg: R to R Peak Averaging Weight Factor <RTOR1 Register>
lucaslwl 22:5c07298d3383 2098 * @param Ptsf: R to R Peak Threshold Scaling Factor <RTOR1 Register>
lucaslwl 22:5c07298d3383 2099 * @param Hoff: R to R minimum Hold Off <RTOR2 Register>
lucaslwl 22:5c07298d3383 2100 * @param Ravg: R to R Interval Averaging Weight Factor <RTOR2 Register>
lucaslwl 22:5c07298d3383 2101 * @param Rhsf: R to R Interval Hold Off Scaling Factor <RTOR2 Register>
lucaslwl 22:5c07298d3383 2102 * @param Clr_rrint: RTOR Detect Interrupt Clear behaviour <MNGR_INT Register>
lucaslwl 22:5c07298d3383 2103 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2104 *
lucaslwl 22:5c07298d3383 2105 */
lucaslwl 22:5c07298d3383 2106 int max30001_RtoR_InitStart(uint8_t En_rtor, uint8_t Wndw, uint8_t Gain,
lucaslwl 22:5c07298d3383 2107 uint8_t Pavg, uint8_t Ptsf, uint8_t Hoff,
lucaslwl 22:5c07298d3383 2108 uint8_t Ravg, uint8_t Rhsf, uint8_t Clr_rrint);
lucaslwl 22:5c07298d3383 2109
lucaslwl 22:5c07298d3383 2110 /**
lucaslwl 22:5c07298d3383 2111 * @brief For MAX30001/3/4 ONLY
lucaslwl 22:5c07298d3383 2112 * @brief This function disables the RtoR. Uses Register CNFG_RTOR1-0x1D
lucaslwl 22:5c07298d3383 2113 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2114 *
lucaslwl 22:5c07298d3383 2115 */
lucaslwl 22:5c07298d3383 2116 int max30001_Stop_RtoR(void);
lucaslwl 22:5c07298d3383 2117
lucaslwl 22:5c07298d3383 2118 /**
lucaslwl 22:5c07298d3383 2119 * @brief This is a function that waits for the PLL to lock; once a lock is achieved it exits out. (For convenience only)
lucaslwl 22:5c07298d3383 2120 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2121 *
lucaslwl 22:5c07298d3383 2122 */
lucaslwl 22:5c07298d3383 2123 int max30001_PLL_lock(void);
lucaslwl 22:5c07298d3383 2124
lucaslwl 22:5c07298d3383 2125 /**
lucaslwl 22:5c07298d3383 2126 * @brief This function causes the MAX30001 to reset. Uses Register SW_RST-0x08
lucaslwl 22:5c07298d3383 2127 * @return 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2128 *
lucaslwl 22:5c07298d3383 2129 */
lucaslwl 22:5c07298d3383 2130 int max30001_sw_rst(void);
lucaslwl 22:5c07298d3383 2131
lucaslwl 22:5c07298d3383 2132 /**
lucaslwl 22:5c07298d3383 2133 * @brief This function provides a SYNCH operation. Uses Register SYCNH-0x09. Please refer to the data sheet for
lucaslwl 22:5c07298d3383 2134 * @brief the details on how to use this.
lucaslwl 22:5c07298d3383 2135 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2136 *
lucaslwl 22:5c07298d3383 2137 */
lucaslwl 22:5c07298d3383 2138 int max30001_synch(void);
lucaslwl 22:5c07298d3383 2139
lucaslwl 22:5c07298d3383 2140 /**
lucaslwl 22:5c07298d3383 2141 * @brief This function performs a FIFO Reset. Uses Register FIFO_RST-0x0A. Please refer to the data sheet
lucaslwl 22:5c07298d3383 2142 * @brief for the details on how to use this.
lucaslwl 22:5c07298d3383 2143 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2144 */
lucaslwl 22:5c07298d3383 2145 int max300001_fifo_rst(void);
lucaslwl 22:5c07298d3383 2146
lucaslwl 22:5c07298d3383 2147 /**
lucaslwl 22:5c07298d3383 2148 *
lucaslwl 22:5c07298d3383 2149 * @brief This is a callback function which collects all the data from the ECG, BIOZ, PACE and RtoR. It also handles
lucaslwl 22:5c07298d3383 2150 * @brief Lead On/Off. This function is passed through the argument of max30001_COMMinit().
lucaslwl 22:5c07298d3383 2151 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2152 *
lucaslwl 22:5c07298d3383 2153 */
lucaslwl 22:5c07298d3383 2154 int max30001_int_handler(void);
lucaslwl 22:5c07298d3383 2155
lucaslwl 22:5c07298d3383 2156 /**
lucaslwl 22:5c07298d3383 2157 * @brief This is function called from the max30001_int_handler() function and processes all the ECG, BIOZ, PACE
lucaslwl 22:5c07298d3383 2158 * @brief and the RtoR data and sticks them in appropriate arrays and variables each unsigned 32 bits.
lucaslwl 22:5c07298d3383 2159 * @param ECG data will be in the array (input): max30001_ECG_FIFO_buffer[]
lucaslwl 22:5c07298d3383 2160 * @param Pace data will be in the array (input): max30001_PACE[]
lucaslwl 22:5c07298d3383 2161 * @param RtoRdata will be in the variable (input): max30001_RtoR_data
lucaslwl 22:5c07298d3383 2162 * @param BIOZ data will be in the array (input): max30001_BIOZ_FIFO_buffer[]
lucaslwl 22:5c07298d3383 2163 * @param global max30001_ECG_FIFO_buffer[]
lucaslwl 22:5c07298d3383 2164 * @param global max30001_PACE[]
lucaslwl 22:5c07298d3383 2165 * @param global max30001_BIOZ_FIFO_buffer[]
lucaslwl 22:5c07298d3383 2166 * @param global max30001_RtoR_data
lucaslwl 22:5c07298d3383 2167 * @param global max30001_DCLeadOff
lucaslwl 22:5c07298d3383 2168 * @param global max30001_ACLeadOff
lucaslwl 22:5c07298d3383 2169 * @param global max30001_LeadON
lucaslwl 22:5c07298d3383 2170 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2171 *
lucaslwl 22:5c07298d3383 2172 */
lucaslwl 22:5c07298d3383 2173 int max30001_FIFO_LeadONOff_Read(void);
lucaslwl 22:5c07298d3383 2174
lucaslwl 22:5c07298d3383 2175 /**
lucaslwl 22:5c07298d3383 2176 * @brief This function allows writing to a register.
lucaslwl 22:5c07298d3383 2177 * @param addr: Address of the register to write to
lucaslwl 22:5c07298d3383 2178 * @param data: 24-bit data read from the register.
lucaslwl 22:5c07298d3383 2179 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2180 *
lucaslwl 22:5c07298d3383 2181 */
lucaslwl 22:5c07298d3383 2182 int max30001_reg_write(MAX30001_REG_map_t addr, uint32_t data);
lucaslwl 22:5c07298d3383 2183
lucaslwl 22:5c07298d3383 2184 /**
lucaslwl 22:5c07298d3383 2185 * @brief This function allows reading from a register
lucaslwl 22:5c07298d3383 2186 * @param addr: Address of the register to read from.
lucaslwl 22:5c07298d3383 2187 * @param *return_data: pointer to the value read from the register.
lucaslwl 22:5c07298d3383 2188 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2189 *
lucaslwl 22:5c07298d3383 2190 */
lucaslwl 22:5c07298d3383 2191 int max30001_reg_read(MAX30001_REG_map_t addr, uint32_t *return_data);
lucaslwl 22:5c07298d3383 2192
lucaslwl 22:5c07298d3383 2193 /**
lucaslwl 22:5c07298d3383 2194 * @brief This function enables the DC Lead Off detection. Either ECG or BIOZ can be detected, one at a time.
lucaslwl 22:5c07298d3383 2195 * @brief Registers Used: CNFG_GEN-0x10
lucaslwl 22:5c07298d3383 2196 * @param En_dcloff: BIOZ Digital Lead Off Detection Enable
lucaslwl 22:5c07298d3383 2197 * @param Ipol: DC Lead Off Current Polarity (if current sources are enabled/connected)
lucaslwl 22:5c07298d3383 2198 * @param Imag: DC Lead off current Magnitude Selection
lucaslwl 22:5c07298d3383 2199 * @param Vth: DC Lead Off Voltage Threshold Selection
lucaslwl 22:5c07298d3383 2200 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2201 *
lucaslwl 22:5c07298d3383 2202 */
lucaslwl 22:5c07298d3383 2203 int max30001_Enable_DcLeadOFF_Init(int8_t En_dcloff, int8_t Ipol, int8_t Imag,
lucaslwl 22:5c07298d3383 2204 int8_t Vth);
lucaslwl 22:5c07298d3383 2205
lucaslwl 22:5c07298d3383 2206 /**
lucaslwl 22:5c07298d3383 2207 * @brief This function disables the DC Lead OFF feature, whichever is active.
lucaslwl 22:5c07298d3383 2208 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2209 *
lucaslwl 22:5c07298d3383 2210 */
lucaslwl 22:5c07298d3383 2211 int max30001_Disable_DcLeadOFF(void);
lucaslwl 22:5c07298d3383 2212
lucaslwl 22:5c07298d3383 2213 /**
lucaslwl 22:5c07298d3383 2214 * @brief This function sets up the BIOZ for AC Lead Off test.
lucaslwl 22:5c07298d3383 2215 * @brief Registers Used: CNFG_GEN-0x10, MNGR_DYN-0x05
lucaslwl 22:5c07298d3383 2216 * @param En_bloff: BIOZ Digital Lead Off Detection Enable <CNFG_GEN register>
lucaslwl 22:5c07298d3383 2217 * @param Bloff_hi_it: DC Lead Off Current Polarity (if current sources are enabled/connected) <MNGR_DYN register>
lucaslwl 22:5c07298d3383 2218 * @param Bloff_lo_it: DC Lead off current Magnitude Selection <MNGR_DYN register>
lucaslwl 22:5c07298d3383 2219 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2220 *
lucaslwl 22:5c07298d3383 2221 */
lucaslwl 22:5c07298d3383 2222 int max30001_BIOZ_Enable_ACLeadOFF_Init(uint8_t En_bloff, uint8_t Bloff_hi_it,
lucaslwl 22:5c07298d3383 2223 uint8_t Bloff_lo_it);
lucaslwl 22:5c07298d3383 2224
lucaslwl 22:5c07298d3383 2225 /**
lucaslwl 22:5c07298d3383 2226 * @brief This function Turns of the BIOZ AC Lead OFF feature
lucaslwl 22:5c07298d3383 2227 * @brief Registers Used: CNFG_GEN-0x10
lucaslwl 22:5c07298d3383 2228 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2229 *
lucaslwl 22:5c07298d3383 2230 */
lucaslwl 22:5c07298d3383 2231 int max30001_BIOZ_Disable_ACleadOFF(void);
lucaslwl 22:5c07298d3383 2232
lucaslwl 22:5c07298d3383 2233 /**
lucaslwl 22:5c07298d3383 2234 * @brief This function enables the Current Gnerator Monitor
lucaslwl 22:5c07298d3383 2235 * @brief Registers Used: CNFG_BIOZ-0x18
lucaslwl 22:5c07298d3383 2236 * @returns 0-if no error. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2237 *
lucaslwl 22:5c07298d3383 2238 */
lucaslwl 22:5c07298d3383 2239 int max30001_BIOZ_Enable_BCGMON(void);
lucaslwl 22:5c07298d3383 2240
lucaslwl 22:5c07298d3383 2241 /**
lucaslwl 22:5c07298d3383 2242 *
lucaslwl 22:5c07298d3383 2243 * @brief This function enables the Lead ON detection. Either ECG or BIOZ can be detected, one at a time.
lucaslwl 22:5c07298d3383 2244 * @brief Also, the en_bioz, en_ecg, en_pace setting is saved so that when this feature is disabled through the
lucaslwl 22:5c07298d3383 2245 * @brief max30001_Disable_LeadON() function (or otherwise) the enable/disable state of those features can be retrieved.
lucaslwl 22:5c07298d3383 2246 * @param Channel: ECG or BIOZ detection
lucaslwl 22:5c07298d3383 2247 * @returns 0-if everything is good. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2248 *
lucaslwl 22:5c07298d3383 2249 */
lucaslwl 22:5c07298d3383 2250 int max30001_Enable_LeadON(int8_t Channel);
lucaslwl 22:5c07298d3383 2251
lucaslwl 22:5c07298d3383 2252 /**
lucaslwl 22:5c07298d3383 2253 * @brief This function turns off the Lead ON feature, whichever one is active. Also, retrieves the en_bioz,
lucaslwl 22:5c07298d3383 2254 * @brief en_ecg, en_pace and sets it back to as it was.
lucaslwl 22:5c07298d3383 2255 * @param 0-if everything is good. A non-zero value indicates an error.
lucaslwl 22:5c07298d3383 2256 *
lucaslwl 22:5c07298d3383 2257 */
lucaslwl 22:5c07298d3383 2258 int max30001_Disable_LeadON(void);
lucaslwl 22:5c07298d3383 2259
lucaslwl 22:5c07298d3383 2260 /**
lucaslwl 22:5c07298d3383 2261 *
lucaslwl 22:5c07298d3383 2262 * @brief This function is toggled every 2 seconds to switch between ECG Lead ON and BIOZ Lead ON detect
lucaslwl 22:5c07298d3383 2263 * @brief Adjust LEADOFF_SERVICE_TIME to determine the duration between the toggles.
lucaslwl 22:5c07298d3383 2264 * @param CurrentTime - This gets fed the time by RTC_GetValue function
lucaslwl 22:5c07298d3383 2265 *
lucaslwl 22:5c07298d3383 2266 */
lucaslwl 22:5c07298d3383 2267 void max30001_ServiceLeadON(uint32_t currentTime);
lucaslwl 22:5c07298d3383 2268
lucaslwl 22:5c07298d3383 2269 /**
lucaslwl 22:5c07298d3383 2270 *
lucaslwl 22:5c07298d3383 2271 * @brief This function is toggled every 2 seconds to switch between ECG DC Lead Off and BIOZ DC Lead Off
lucaslwl 22:5c07298d3383 2272 * @brief Adjust LEADOFF_SERVICE_TIME to determine the duration between the toggles.
lucaslwl 22:5c07298d3383 2273 * @param CurrentTime - This gets fed the time by RTC_GetValue function
lucaslwl 22:5c07298d3383 2274 *
lucaslwl 22:5c07298d3383 2275 */
lucaslwl 22:5c07298d3383 2276 void max30001_ServiceLeadoff(uint32_t currentTime);
lucaslwl 22:5c07298d3383 2277
lucaslwl 22:5c07298d3383 2278 /**
lucaslwl 22:5c07298d3383 2279 *
lucaslwl 22:5c07298d3383 2280 * @brief This function sets current RtoR values and fmstr values in a pointer structure
lucaslwl 22:5c07298d3383 2281 * @param hspValMax30001 - Pointer to a structure where to store the values
lucaslwl 22:5c07298d3383 2282 *
lucaslwl 22:5c07298d3383 2283 */
lucaslwl 22:5c07298d3383 2284 void max30001_ReadHeartrateData(max30001_t *_hspValMax30001);
lucaslwl 22:5c07298d3383 2285
lucaslwl 22:5c07298d3383 2286 /**
lucaslwl 22:5c07298d3383 2287 * @brief type definition for data interrupt
lucaslwl 22:5c07298d3383 2288 */
lucaslwl 22:5c07298d3383 2289 typedef void (*PtrFunction)(uint32_t id, uint32_t *buffer, uint32_t length);
lucaslwl 22:5c07298d3383 2290
lucaslwl 22:5c07298d3383 2291 /**
lucaslwl 22:5c07298d3383 2292 * @brief Used to connect a callback for when interrupt data is available
lucaslwl 22:5c07298d3383 2293 */
lucaslwl 22:5c07298d3383 2294 void onDataAvailable(PtrFunction _onDataAvailable);
lucaslwl 22:5c07298d3383 2295
lucaslwl 22:5c07298d3383 2296 static MAX30001 *instance;
lucaslwl 22:5c07298d3383 2297
lucaslwl 22:5c07298d3383 2298 private:
lucaslwl 22:5c07298d3383 2299 void dataAvailable(uint32_t id, uint32_t *buffer, uint32_t length);
lucaslwl 22:5c07298d3383 2300 /// interrupt handler for async spi events
lucaslwl 22:5c07298d3383 2301 static void spiHandler(int events);
lucaslwl 22:5c07298d3383 2302 /// wrapper method to transmit and recieve SPI data
lucaslwl 22:5c07298d3383 2303 int SPI_Transmit(const uint8_t *tx_buf, uint32_t tx_size, uint8_t *rx_buf,
lucaslwl 22:5c07298d3383 2304 uint32_t rx_size);
lucaslwl 22:5c07298d3383 2305
lucaslwl 22:5c07298d3383 2306 /// pointer to mbed SPI object
lucaslwl 22:5c07298d3383 2307 SPI *spi;
lucaslwl 22:5c07298d3383 2308 /// is this object the owner of the spi object
lucaslwl 22:5c07298d3383 2309 bool spi_owner;
lucaslwl 22:5c07298d3383 2310 /// buffer to use for async transfers
lucaslwl 22:5c07298d3383 2311 uint8_t buffer[ASYNC_SPI_BUFFER_SIZE];
lucaslwl 22:5c07298d3383 2312 /// function pointer to the async callback
lucaslwl 22:5c07298d3383 2313 event_callback_t functionpointer;
lucaslwl 22:5c07298d3383 2314 /// callback function when interrupt data is available
lucaslwl 22:5c07298d3383 2315 PtrFunction onDataAvailableCallback;
lucaslwl 22:5c07298d3383 2316
lucaslwl 22:5c07298d3383 2317 }; // End of MAX30001 Class
lucaslwl 22:5c07298d3383 2318
lucaslwl 22:5c07298d3383 2319 /**
lucaslwl 22:5c07298d3383 2320 * @brief Preventive measure used to dismiss interrupts that fire too early during
lucaslwl 22:5c07298d3383 2321 * @brief initialization on INTB line
lucaslwl 22:5c07298d3383 2322 *
lucaslwl 22:5c07298d3383 2323 */
lucaslwl 22:5c07298d3383 2324 void MAX30001Mid_IntB_Handler(void);
lucaslwl 22:5c07298d3383 2325
lucaslwl 22:5c07298d3383 2326 /**
lucaslwl 22:5c07298d3383 2327 * @brief Preventive measure used to dismiss interrupts that fire too early during
lucaslwl 22:5c07298d3383 2328 * @brief initialization on INT2B line
lucaslwl 22:5c07298d3383 2329 *
lucaslwl 22:5c07298d3383 2330 */
lucaslwl 22:5c07298d3383 2331 void MAX30001Mid_Int2B_Handler(void);
lucaslwl 22:5c07298d3383 2332
lucaslwl 22:5c07298d3383 2333 /**
lucaslwl 22:5c07298d3383 2334 * @brief Allows Interrupts to be accepted as valid.
lucaslwl 22:5c07298d3383 2335 * @param state: 1-Allow interrupts, Any-Don't allow interrupts.
lucaslwl 22:5c07298d3383 2336 *
lucaslwl 22:5c07298d3383 2337 */
lucaslwl 22:5c07298d3383 2338 void MAX30001_AllowInterrupts(int state);
lucaslwl 22:5c07298d3383 2339
lucaslwl 22:5c07298d3383 2340 #endif /* MAX30001_H_ */
lucaslwl 22:5c07298d3383 2341
lucaslwl 22:5c07298d3383 2342