lloyd griffiths / Mbed 2 deprecated M24SR-DISCOVERY-testbed

Hardware testing for M24SR-DISCOVERY demo PCB. as help to others

Dependencies:   mbed

Set up to use MB1138 M24SR-DISCOVERY PCB http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/st25-nfc-rfid-eval-boards/st25-nfc-rfid-eval-boards/m24sr-discovery.html with MBED system. based on https://developer.mbed.org/users/hudakz/code/STM32F103C8T6_Hello/ code and https://developer.mbed.org/users/wim/notebook/m24sr64-nfcrfid-tag-with-i2c-interface/ Which lead me to look at Peter Drescher's work on ILI9341 LCD controller

https://developer.mbed.org/users/dreschpe/code/SPI_TFT_ILI9341/

mbed-STM32F103RGT6/SysClockConf.cpp@2:2033db202017, 2016-09-29 (annotated)

Committer:
lloydg
Date:
Thu Sep 29 11:07:41 2016 +0000
Revision:
2:2033db202017
Parent:
M24SR-DISCOVERY_hardware/mbed-STM32F103RGT6/SysClockConf.cpp@0:ce5a25daadce 
re jig folders

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lloydg 0:ce5a25daadce 1 /*
lloydg 0:ce5a25daadce 2 ******************************************************************************
lloydg 0:ce5a25daadce 3 * @file SysClockConf.c
lloydg 0:ce5a25daadce 4 * @author Zoltan Hudak
lloydg 0:ce5a25daadce 5 * @version
lloydg 0:ce5a25daadce 6 * @date 05-July-2016
lloydg 0:ce5a25daadce 7 * @brief System Clock configuration for STM32F103C8T6
lloydg 0:ce5a25daadce 8 ******************************************************************************
lloydg 0:ce5a25daadce 9 * @attention
lloydg 0:ce5a25daadce 10 *
lloydg 0:ce5a25daadce 11 * <h2><center>&copy; COPYRIGHT(c) 2016 Zoltan Hudak <hudakz@inbox.com>
lloydg 0:ce5a25daadce 12 *
lloydg 0:ce5a25daadce 13 * All rights reserved.
lloydg 0:ce5a25daadce 14
lloydg 0:ce5a25daadce 15 This program is free software: you can redistribute it and/or modify
lloydg 0:ce5a25daadce 16 it under the terms of the GNU General Public License as published by
lloydg 0:ce5a25daadce 17 the Free Software Foundation, either version 3 of the License, or
lloydg 0:ce5a25daadce 18 (at your option) any later version.
lloydg 0:ce5a25daadce 19
lloydg 0:ce5a25daadce 20 This program is distributed in the hope that it will be useful,
lloydg 0:ce5a25daadce 21 but WITHOUT ANY WARRANTY; without even the implied warranty of
lloydg 0:ce5a25daadce 22 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
lloydg 0:ce5a25daadce 23 GNU General Public License for more details.
lloydg 0:ce5a25daadce 24
lloydg 0:ce5a25daadce 25 You should have received a copy of the GNU General Public License
lloydg 0:ce5a25daadce 26 along with this program. If not, see <http://www.gnu.org/licenses/>.
lloydg 0:ce5a25daadce 27 */
lloydg 0:ce5a25daadce 28
lloydg 0:ce5a25daadce 29 #include "SysClockConf.h"
lloydg 0:ce5a25daadce 30 #include "mbed.h"
lloydg 0:ce5a25daadce 31
lloydg 0:ce5a25daadce 32 bool HSE_SystemClock_Config(void) {
lloydg 0:ce5a25daadce 33 RCC_OscInitTypeDef RCC_OscInitStruct;
lloydg 0:ce5a25daadce 34
lloydg 0:ce5a25daadce 35 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
lloydg 0:ce5a25daadce 36 RCC_OscInitStruct.HSEState = RCC_HSE_ON;
lloydg 0:ce5a25daadce 37 RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
lloydg 0:ce5a25daadce 38 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
lloydg 0:ce5a25daadce 39 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
lloydg 0:ce5a25daadce 40 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
lloydg 0:ce5a25daadce 41
lloydg 0:ce5a25daadce 42 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
lloydg 0:ce5a25daadce 43 return false;
lloydg 0:ce5a25daadce 44 }
lloydg 0:ce5a25daadce 45
lloydg 0:ce5a25daadce 46 RCC_ClkInitTypeDef RCC_ClkInitStruct;
lloydg 0:ce5a25daadce 47
lloydg 0:ce5a25daadce 48 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
lloydg 0:ce5a25daadce 49 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
lloydg 0:ce5a25daadce 50 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
lloydg 0:ce5a25daadce 51 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
lloydg 0:ce5a25daadce 52 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
lloydg 0:ce5a25daadce 53 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
lloydg 0:ce5a25daadce 54 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
lloydg 0:ce5a25daadce 55 return false;
lloydg 0:ce5a25daadce 56 }
lloydg 0:ce5a25daadce 57
lloydg 0:ce5a25daadce 58 RCC_PeriphCLKInitTypeDef PeriphClkInit;
lloydg 0:ce5a25daadce 59
lloydg 0:ce5a25daadce 60 PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB;
lloydg 0:ce5a25daadce 61 PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
lloydg 0:ce5a25daadce 62 PeriphClkInit.UsbClockSelection = RCC_USBPLLCLK_DIV1_5;
lloydg 0:ce5a25daadce 63 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
lloydg 0:ce5a25daadce 64 return false;
lloydg 0:ce5a25daadce 65 }
lloydg 0:ce5a25daadce 66 return true;
lloydg 0:ce5a25daadce 67 }
lloydg 0:ce5a25daadce 68
lloydg 0:ce5a25daadce 69 bool confSysClock(void) {
lloydg 0:ce5a25daadce 70 HAL_RCC_DeInit();
lloydg 0:ce5a25daadce 71 if (!HSE_SystemClock_Config()) {
lloydg 0:ce5a25daadce 72 return false;
lloydg 0:ce5a25daadce 73 }
lloydg 0:ce5a25daadce 74 SystemCoreClockUpdate();
lloydg 0:ce5a25daadce 75 return true;
lloydg 0:ce5a25daadce 76 }
lloydg 0:ce5a25daadce 77
lloydg 0:ce5a25daadce 78
lloydg 0:ce5a25daadce 79