Liangzhen Lai / Mbed 2 deprecated Orange_Ferrari_board_functional

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Dependencies:   DDRO_Farrari mbed

Fork of DDRO_Farrari by Liangzhen Lai

pinout.h@2:e94460b2149f, 2014-02-20 (annotated)

Committer:
liangzhen
Date:
Thu Feb 20 03:40:20 2014 +0000
Revision:
2:e94460b2149f
Parent:
1:6a820a0ca03b 
updated with new PLL configuration function

Who changed what in which revision?

UserRevisionLine numberNew contents of line
liangzhen 0:84a8bcfbdec9 1 #ifndef PINOUT_H
liangzhen 0:84a8bcfbdec9 2 #define PINOUT_H
liangzhen 0:84a8bcfbdec9 3
liangzhen 0:84a8bcfbdec9 4 static LocalFileSystem local("local");
liangzhen 0:84a8bcfbdec9 5 static Serial pc(USBTX, USBRX);//tx, rx => for debugging purposes
liangzhen 0:84a8bcfbdec9 6
liangzhen 0:84a8bcfbdec9 7 // TI DAC7578 interface
liangzhen 0:84a8bcfbdec9 8 //static BusOut CLR_BAR(p5, p7);
liangzhen 0:84a8bcfbdec9 9 //static BusOut LDAC_BAR(p6, p8);
liangzhen 0:84a8bcfbdec9 10 static I2C dac_i2c(p9, p10); //sda, scl
liangzhen 0:84a8bcfbdec9 11
liangzhen 0:84a8bcfbdec9 12 static I2C lcd(p9, p10);
liangzhen 0:84a8bcfbdec9 13
liangzhen 0:84a8bcfbdec9 14 // LED Indicators
liangzhen 0:84a8bcfbdec9 15 static DigitalOut power_indicator (LED1);
liangzhen 0:84a8bcfbdec9 16 static DigitalOut power_error_indicator (LED4);
liangzhen 0:84a8bcfbdec9 17 static DigitalOut wait_indicator (LED2);
liangzhen 0:84a8bcfbdec9 18
liangzhen 0:84a8bcfbdec9 19 // To Chip
liangzhen 0:84a8bcfbdec9 20 static DigitalOut PORESETn(p11);
liangzhen 0:84a8bcfbdec9 21 static DigitalOut CORERESETn(p12);
liangzhen 0:84a8bcfbdec9 22
liangzhen 0:84a8bcfbdec9 23 // From Chip
liangzhen 0:84a8bcfbdec9 24 static DigitalIn HCLK_div_down(p5);
liangzhen 0:84a8bcfbdec9 25 static DigitalIn RO_clock_out(p6);
liangzhen 0:84a8bcfbdec9 26
liangzhen 0:84a8bcfbdec9 27 // GPIO to/from Chip
liangzhen 2:e94460b2149f 28 //static BusInOut GPIO(p7, p16, p15);
liangzhen 2:e94460b2149f 29 static DigitalInOut GPIO1(p7);
liangzhen 2:e94460b2149f 30 static DigitalInOut GPIO2(p15);
liangzhen 2:e94460b2149f 31 static DigitalInOut GPIO3(p16);
liangzhen 0:84a8bcfbdec9 32
liangzhen 0:84a8bcfbdec9 33 // Analog in from amplifier (for power measurement)
liangzhen 0:84a8bcfbdec9 34 static AnalogIn meas_sen(p17);
liangzhen 0:84a8bcfbdec9 35 static AnalogIn meas_mem2(p18);
liangzhen 0:84a8bcfbdec9 36 static AnalogIn meas_mem1(p19);
liangzhen 0:84a8bcfbdec9 37 static AnalogIn meas_core(p20);
liangzhen 0:84a8bcfbdec9 38 static DigitalOut gain_ctrl(p8);
liangzhen 0:84a8bcfbdec9 39
liangzhen 0:84a8bcfbdec9 40 // Scan
liangzhen 0:84a8bcfbdec9 41 static DigitalOut scan_data_in(p30);
liangzhen 0:84a8bcfbdec9 42 static DigitalOut scan_phi(p29);
liangzhen 0:84a8bcfbdec9 43 static DigitalOut scan_phi_bar(p13);
liangzhen 0:84a8bcfbdec9 44 static DigitalOut scan_load_chain(p14);
liangzhen 0:84a8bcfbdec9 45 static DigitalOut scan_load_chip(p26);
liangzhen 0:84a8bcfbdec9 46 static DigitalIn scan_data_out(p25);
liangzhen 0:84a8bcfbdec9 47
liangzhen 0:84a8bcfbdec9 48 // JTAG
liangzhen 0:84a8bcfbdec9 49 static DigitalOut TCK(p24);
liangzhen 0:84a8bcfbdec9 50 static DigitalOut TMS(p23);
liangzhen 0:84a8bcfbdec9 51 static DigitalOut TDI(p22);
liangzhen 0:84a8bcfbdec9 52 static DigitalIn TDO(p21);
liangzhen 0:84a8bcfbdec9 53
liangzhen 0:84a8bcfbdec9 54 #endif
liangzhen 0:84a8bcfbdec9 55
liangzhen 0:84a8bcfbdec9 56
liangzhen 0:84a8bcfbdec9 57
liangzhen 0:84a8bcfbdec9 58 #define POWER_UP_TIME 0.01
liangzhen 0:84a8bcfbdec9 59
liangzhen 0:84a8bcfbdec9 60 // DAC0, ADDR=1
liangzhen 0:84a8bcfbdec9 61 #define ADVDD ADDR_1,CHAN_A
liangzhen 0:84a8bcfbdec9 62 #define PADVDD ADDR_1,CHAN_B
liangzhen 0:84a8bcfbdec9 63 #define DVDD ADDR_1,CHAN_C
liangzhen 0:84a8bcfbdec9 64 #define ADVDD2 ADDR_1,CHAN_D
liangzhen 0:84a8bcfbdec9 65 #define COREVDD ADDR_1,CHAN_E
liangzhen 0:84a8bcfbdec9 66 #define DVDD2 ADDR_1,CHAN_F
liangzhen 0:84a8bcfbdec9 67 #define SENSORVDD ADDR_1,CHAN_G
liangzhen 0:84a8bcfbdec9 68 #define SENSORLOWVDD ADDR_1,CHAN_H
liangzhen 0:84a8bcfbdec9 69
liangzhen 0:84a8bcfbdec9 70 // DAC1, ADDR=0
liangzhen 0:84a8bcfbdec9 71 #define SENSORSTRESSVDD ADDR_0,CHAN_A
liangzhen 0:84a8bcfbdec9 72 #define CLOCKVDD ADDR_0,CHAN_B
liangzhen 0:84a8bcfbdec9 73 #define MEM1VDD ADDR_0,CHAN_C
liangzhen 0:84a8bcfbdec9 74 #define MEM2VDD ADDR_0,CHAN_D
liangzhen 0:84a8bcfbdec9 75 #define PLLAVDD ADDR_0,CHAN_E
liangzhen 0:84a8bcfbdec9 76 #define RING_OSC_NBIAS ADDR_0,CHAN_F
liangzhen 0:84a8bcfbdec9 77
liangzhen 0:84a8bcfbdec9 78 // 20 MHz Crystal
liangzhen 1:6a820a0ca03b 79 #define PLL_REF 20000