Liangzhen Lai / Mbed 2 deprecated DDRO_software

Dependencies:   mbed

Committer:
liangzhen
Date:
Fri Aug 03 06:10:02 2012 +0000
Revision:
1:acf14b6dd1be
Parent:
0:c928c2d8bd02
DDRO software for the testbed;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
liangzhen 0:c928c2d8bd02 1 #include "mbed.h"
liangzhen 0:c928c2d8bd02 2
liangzhen 0:c928c2d8bd02 3 class PLL{
liangzhen 0:c928c2d8bd02 4 public:
liangzhen 0:c928c2d8bd02 5 PLL();
liangzhen 0:c928c2d8bd02 6 void setFBK_MODE(int MODE);//feedback mode, 0 for external, 1 for internal
liangzhen 0:c928c2d8bd02 7 int setPLL(int frequency);// main PLL setting function
liangzhen 0:c928c2d8bd02 8 int testPLL();// use to test PLL working
liangzhen 0:c928c2d8bd02 9 int check_lock();// check if PLL is locked
liangzhen 0:c928c2d8bd02 10 private:
liangzhen 0:c928c2d8bd02 11 unsigned int* A;//scan chain bit vector
liangzhen 0:c928c2d8bd02 12 int FB_MODE;//feedback mode, 0 for external, 1 for internal
liangzhen 0:c928c2d8bd02 13 void initScan();// initialize the scan chain
liangzhen 0:c928c2d8bd02 14 int scanIn();// write A to scan chain
liangzhen 0:c928c2d8bd02 15 int scanOut();// read scan chain value to A
liangzhen 0:c928c2d8bd02 16 void loadChip();// load the scan in value to chip
liangzhen 0:c928c2d8bd02 17 void loadChain();// load the scan chain value from chip
liangzhen 0:c928c2d8bd02 18 void scanAction();// step in the value by 1 bit
liangzhen 0:c928c2d8bd02 19 void setVector();// set bit-vector A for test
liangzhen 0:c928c2d8bd02 20 void plloutAon();// set PLLout A on and B off
liangzhen 0:c928c2d8bd02 21 void plloutBon();// set PLLout A off and B on
liangzhen 0:c928c2d8bd02 22 void setPrediv(int val);//Setting the Prediv bits A[143:138] Range 1-32
liangzhen 0:c928c2d8bd02 23 void setFbDivPreScaler(int val);//Setting the Feedback Divider Pre-scalar bits A[136:134] Range: 1-4
liangzhen 0:c928c2d8bd02 24 void setFbDiv(int val);//Setting the Feedback Divider bits A[133:126] Range: 1-255
liangzhen 0:c928c2d8bd02 25 void setFwDivPreScalerA(int val);//Setting the Forward Divider Pre-scalar bits for A A[150:149] Range: 1,2,4
liangzhen 0:c928c2d8bd02 26 void setFwDivA(int val);//Setting the Forward Divider Pre-scalar bits A[148:144] Range: 1-32
liangzhen 0:c928c2d8bd02 27 void setFwDivPreScalerB(int val);//Setting the Forward Divider Pre-scalar bits for B A[150:149] Range: 1,2,4
liangzhen 0:c928c2d8bd02 28 void setFwDivB(int val);//Setting the Forward Divider Pre-scalar bits for B A[148:144] Range: 1-32
liangzhen 0:c928c2d8bd02 29 void setLFTUNE(int interval);//Setting LFTUNE A[83:43] Range: 0(2.5-3.2) - 1(3.2-5.0)
liangzhen 1:acf14b6dd1be 30 void setFFTUNE(int interval);//Setting FFTUNE A[41:26]
liangzhen 0:c928c2d8bd02 31 void setINTFBK();//Setting feedback mode A[42]
liangzhen 1:acf14b6dd1be 32 void setROandOther();//Setting(disabling) ring_osc A[7:0]
liangzhen 0:c928c2d8bd02 33 void setINTMUX(int clk);//Setting internal clk source bits A[9:8] Range: 0: HCLK_EXT 1: ring_osc 2: PLLOUT_A 3: PLLOUT_B
liangzhen 0:c928c2d8bd02 34 void setEXTMUX(int clk);//Setting external clk source bits A[15:14] Range: 0: HCLK_EXT 1: HCLK_divider 2: PLLOUT_A 3: PLLOUT_B
liangzhen 0:c928c2d8bd02 35 void setEXTDIV(int val);//Setting clk divider bits for B A[13:10] Range: 0-15, divided by 2^val
liangzhen 0:c928c2d8bd02 36 void resetPLL(int val);//Setting PLL_RESET A[158], range: 0:unreset 1:reset
liangzhen 0:c928c2d8bd02 37 };