Liangzhen Lai / Mbed 2 deprecated DDRO_software

Dependencies:   mbed

Committer:
liangzhen
Date:
Thu Sep 20 23:45:05 2012 +0000
Revision:
3:764ccaf29ce9
Parent:
1:acf14b6dd1be
Child:
4:fc56fa8aa794
changes for speed binnning

Who changed what in which revision?

UserRevisionLine numberNew contents of line
liangzhen 0:c928c2d8bd02 1 #include "power_up.h"
liangzhen 0:c928c2d8bd02 2 using namespace std;
liangzhen 0:c928c2d8bd02 3
liangzhen 0:c928c2d8bd02 4 #define ADDR 0x98 //change to 94 or 98 if doesn't work
liangzhen 0:c928c2d8bd02 5 #define POWER_UP_TIME 1
liangzhen 0:c928c2d8bd02 6
liangzhen 0:c928c2d8bd02 7 I2C i2c(p9, p10); //sda, scl
liangzhen 0:c928c2d8bd02 8 DigitalOut ADDR0(p6); //ADDR0 in DAC
liangzhen 3:764ccaf29ce9 9 Serial power_pc(USBTX, USBRX);//tx, rx => for debugging purposes
liangzhen 0:c928c2d8bd02 10 DigitalOut power_indicator (LED1);
liangzhen 0:c928c2d8bd02 11 DigitalOut power_error_indicator (LED4);
liangzhen 0:c928c2d8bd02 12 DigitalOut LDAC_BAR(p7);
liangzhen 0:c928c2d8bd02 13 DigitalOut CLR_BAR(p5);
liangzhen 0:c928c2d8bd02 14
liangzhen 3:764ccaf29ce9 15 void power(const int A, char CA, char MSDB, char LSDB)
liangzhen 3:764ccaf29ce9 16 {
liangzhen 0:c928c2d8bd02 17 int state;
liangzhen 0:c928c2d8bd02 18 char data[3];
liangzhen 0:c928c2d8bd02 19 data[0]=CA;
liangzhen 0:c928c2d8bd02 20 data[1]=MSDB;
liangzhen 0:c928c2d8bd02 21 data[2]=LSDB;
liangzhen 0:c928c2d8bd02 22 debugPower();
liangzhen 0:c928c2d8bd02 23 power_error_indicator = 1;
liangzhen 0:c928c2d8bd02 24 //pc.printf ("%X\n", A);
liangzhen 0:c928c2d8bd02 25 while (i2c.write(A,data,3,false)) {
liangzhen 0:c928c2d8bd02 26 }
liangzhen 0:c928c2d8bd02 27 power_error_indicator = 0;
liangzhen 0:c928c2d8bd02 28 }
liangzhen 0:c928c2d8bd02 29
liangzhen 3:764ccaf29ce9 30 void powerUp(double voltage)
liangzhen 3:764ccaf29ce9 31 {
liangzhen 3:764ccaf29ce9 32 if (voltage > 1 || voltage <0.6) {
liangzhen 3:764ccaf29ce9 33 voltage = 0.9;
liangzhen 3:764ccaf29ce9 34 }
liangzhen 3:764ccaf29ce9 35 unsigned int volt = (voltage/3.3*65535);
liangzhen 3:764ccaf29ce9 36 char MSDB, LSDB;
liangzhen 3:764ccaf29ce9 37 LSDB = volt % 0x100;
liangzhen 3:764ccaf29ce9 38 MSDB = volt / 0x100;
liangzhen 3:764ccaf29ce9 39 voltage += 0.03;
liangzhen 3:764ccaf29ce9 40 if(voltage >1) {
liangzhen 3:764ccaf29ce9 41 voltage = 1;
liangzhen 3:764ccaf29ce9 42 };
liangzhen 3:764ccaf29ce9 43 unsigned int boosted_volt = (voltage/3.3*65535);
liangzhen 3:764ccaf29ce9 44 char MSDB2, LSDB2;
liangzhen 3:764ccaf29ce9 45 LSDB2 = volt % 0x100;
liangzhen 3:764ccaf29ce9 46 MSDB2 = volt / 0x100;
liangzhen 3:764ccaf29ce9 47 //power_pc.printf("%x%x\n", MSDB, LSDB);
liangzhen 0:c928c2d8bd02 48 power(ADDR,0x31,0x8B,0xA0) ; //update channel B 1.8V DVDD2
liangzhen 0:c928c2d8bd02 49 wait(POWER_UP_TIME);
liangzhen 0:c928c2d8bd02 50 power(ADDR,0x37,0x4D,0x90) ; //update channel H 1V AVDD
liangzhen 0:c928c2d8bd02 51 wait(POWER_UP_TIME);
liangzhen 0:c928c2d8bd02 52 power(ADDR,0x35,0x26,0xC0) ; //update channel F 0.5V AVDD2
liangzhen 0:c928c2d8bd02 53 wait(POWER_UP_TIME);
liangzhen 3:764ccaf29ce9 54 power(ADDR,0x34,MSDB2,LSDB2) ; //update channel E 1V WRAPPERVD
liangzhen 0:c928c2d8bd02 55 wait(POWER_UP_TIME);
liangzhen 3:764ccaf29ce9 56 power(ADDR,0x32,MSDB,LSDB) ; //update channel C 1V COREVDD
liangzhen 0:c928c2d8bd02 57 wait(POWER_UP_TIME);
liangzhen 3:764ccaf29ce9 58 power(ADDR,0x30,MSDB2,LSDB2) ; //update channel A 1V SRAMVDD
liangzhen 0:c928c2d8bd02 59 wait(POWER_UP_TIME);
liangzhen 3:764ccaf29ce9 60 power(ADDR,0x36,MSDB,LSDB) ; //update channel G 1V SENSEVDD
liangzhen 0:c928c2d8bd02 61 wait(POWER_UP_TIME);
liangzhen 0:c928c2d8bd02 62 power_indicator = 1;
liangzhen 0:c928c2d8bd02 63 power(ADDR,0x33,0xFF,0xF0) ; //update channel D 3.3V DVDD
liangzhen 0:c928c2d8bd02 64 wait(POWER_UP_TIME);
liangzhen 0:c928c2d8bd02 65 }
liangzhen 3:764ccaf29ce9 66 void powerDown()
liangzhen 3:764ccaf29ce9 67 {
liangzhen 0:c928c2d8bd02 68 power(ADDR,0x33,0x00,0x00) ; //update channel D 3.3V DVDD
liangzhen 0:c928c2d8bd02 69 wait(POWER_UP_TIME);
liangzhen 0:c928c2d8bd02 70 power_indicator = 0;
liangzhen 0:c928c2d8bd02 71 power(ADDR,0x37,0x00,0x00) ; //update channel H 1V AVDD
liangzhen 0:c928c2d8bd02 72 wait(POWER_UP_TIME);
liangzhen 0:c928c2d8bd02 73 power(ADDR,0x35,0x00,0x00) ; //update channel F 0.5V AVDD2
liangzhen 0:c928c2d8bd02 74 wait(POWER_UP_TIME);
liangzhen 0:c928c2d8bd02 75 power(ADDR,0x34,0x00,0x00) ; //update channel E 1V WRAPPERVD
liangzhen 0:c928c2d8bd02 76 wait(POWER_UP_TIME);
liangzhen 0:c928c2d8bd02 77 power(ADDR,0x32,0x00,0x00) ; //update channel C 1V COREVDD
liangzhen 0:c928c2d8bd02 78 wait(POWER_UP_TIME);
liangzhen 0:c928c2d8bd02 79 power(ADDR,0x30,0x00,0x00) ; //update channel A 1V SRAMVDD
liangzhen 0:c928c2d8bd02 80 wait(POWER_UP_TIME);
liangzhen 0:c928c2d8bd02 81 power(ADDR,0x36,0x00,0x00) ; //update channel G 1V SENSEVDD
liangzhen 0:c928c2d8bd02 82 wait(POWER_UP_TIME);
liangzhen 1:acf14b6dd1be 83 // power(ADDR,0x31,0x00,0x00) ; //update channel B 1.8V DVDD2
liangzhen 1:acf14b6dd1be 84 // wait(POWER_UP_TIME);
liangzhen 0:c928c2d8bd02 85 }
liangzhen 0:c928c2d8bd02 86
liangzhen 3:764ccaf29ce9 87 void powerReset()
liangzhen 3:764ccaf29ce9 88 {
liangzhen 0:c928c2d8bd02 89 power_indicator = 0;
liangzhen 0:c928c2d8bd02 90 CLR_BAR = 0;
liangzhen 0:c928c2d8bd02 91 ADDR0 = 0;
liangzhen 0:c928c2d8bd02 92 LDAC_BAR = 0;
liangzhen 0:c928c2d8bd02 93 CLR_BAR = 1;
liangzhen 0:c928c2d8bd02 94 }
liangzhen 0:c928c2d8bd02 95
liangzhen 3:764ccaf29ce9 96 void debugPower()
liangzhen 3:764ccaf29ce9 97 {
liangzhen 0:c928c2d8bd02 98 char data[3];
liangzhen 0:c928c2d8bd02 99 data[0]=0x31;
liangzhen 0:c928c2d8bd02 100 data[1]=0x8B;
liangzhen 0:c928c2d8bd02 101 data[2]=0xA0;
liangzhen 0:c928c2d8bd02 102 int A = 0;
liangzhen 0:c928c2d8bd02 103 for (A = 0; A<=0xFF; A++) {
liangzhen 0:c928c2d8bd02 104 if (i2c.write(A,data,3,false)==0) {
liangzhen 0:c928c2d8bd02 105 //pc.printf ("%X\n", A);
liangzhen 0:c928c2d8bd02 106 }
liangzhen 0:c928c2d8bd02 107 }
liangzhen 0:c928c2d8bd02 108 }