Liangzhen Lai / Mbed 2 deprecated DDRO_software

Dependencies:   mbed

Committer:
liangzhen
Date:
Sat Sep 29 23:33:16 2012 +0000
Revision:
5:0a3fb48e39a3
Parent:
4:fc56fa8aa794
Child:
6:a27c0fd4f210
with sample main function

Who changed what in which revision?

UserRevisionLine numberNew contents of line
liangzhen 0:c928c2d8bd02 1 #include "power_up.h"
liangzhen 0:c928c2d8bd02 2 #include "scan.h"
liangzhen 1:acf14b6dd1be 3 #include "master_i2c.h"
liangzhen 1:acf14b6dd1be 4 #include "JTAG.h"
liangzhen 0:c928c2d8bd02 5 using namespace std;
liangzhen 0:c928c2d8bd02 6
liangzhen 4:fc56fa8aa794 7 //#define FILE_OUTPUT
liangzhen 4:fc56fa8aa794 8
liangzhen 0:c928c2d8bd02 9 DigitalOut RESET (p21);
liangzhen 0:c928c2d8bd02 10
liangzhen 0:c928c2d8bd02 11 Serial s(USBTX, USBRX);
liangzhen 3:764ccaf29ce9 12 DigitalOut finish_flag (LED3);
liangzhen 1:acf14b6dd1be 13
liangzhen 5:0a3fb48e39a3 14 /*
liangzhen 5:0a3fb48e39a3 15 int main()
liangzhen 5:0a3fb48e39a3 16 {
liangzhen 5:0a3fb48e39a3 17
liangzhen 5:0a3fb48e39a3 18 PLL clk;
liangzhen 5:0a3fb48e39a3 19 JTAG jtag;
liangzhen 5:0a3fb48e39a3 20
liangzhen 5:0a3fb48e39a3 21 powerReset();
liangzhen 5:0a3fb48e39a3 22 powerUp(1);
liangzhen 5:0a3fb48e39a3 23 wait_us(10);
liangzhen 5:0a3fb48e39a3 24 RESET=1;
liangzhen 5:0a3fb48e39a3 25 wait_us(10);
liangzhen 5:0a3fb48e39a3 26 RESET=0;
liangzhen 5:0a3fb48e39a3 27 wait_us(10);
liangzhen 5:0a3fb48e39a3 28 RESET=1;
liangzhen 5:0a3fb48e39a3 29 clk.setPLL(100);
liangzhen 5:0a3fb48e39a3 30 RESET=0;
liangzhen 5:0a3fb48e39a3 31 wait_us(10);
liangzhen 5:0a3fb48e39a3 32 RESET=1;
liangzhen 5:0a3fb48e39a3 33 jtag.DAP_enable();
liangzhen 5:0a3fb48e39a3 34 unsigned int address, value;
liangzhen 5:0a3fb48e39a3 35 jtag.loadProgram();
liangzhen 5:0a3fb48e39a3 36 address = 0x44000008;
liangzhen 5:0a3fb48e39a3 37 value = 0x00000001;
liangzhen 5:0a3fb48e39a3 38 jtag.writeMemory(address, value);
liangzhen 5:0a3fb48e39a3 39
liangzhen 5:0a3fb48e39a3 40 address = 0x44000004;
liangzhen 5:0a3fb48e39a3 41 jtag.writeMemory(address, value);
liangzhen 5:0a3fb48e39a3 42 //core is running......
liangzhen 5:0a3fb48e39a3 43
liangzhen 5:0a3fb48e39a3 44 if( some GPIO != 0) {powerDown();}
liangzhen 5:0a3fb48e39a3 45 }
liangzhen 5:0a3fb48e39a3 46 */
liangzhen 5:0a3fb48e39a3 47
liangzhen 3:764ccaf29ce9 48 int main()
liangzhen 3:764ccaf29ce9 49 {
liangzhen 0:c928c2d8bd02 50 s.printf("DDRO_software starts ...\r\n");
liangzhen 3:764ccaf29ce9 51 double voltage = 1;
liangzhen 0:c928c2d8bd02 52 PLL clk;
liangzhen 3:764ccaf29ce9 53 JTAG jtag;
liangzhen 4:fc56fa8aa794 54 int* ro_readings = new int [70];
liangzhen 4:fc56fa8aa794 55 #ifdef FILE_OUTPUT
liangzhen 3:764ccaf29ce9 56 FILE *outFile = fopen("/local/test.out", "a");
liangzhen 4:fc56fa8aa794 57 #endif
liangzhen 4:fc56fa8aa794 58 for (int i=0; i<1; i++) {
liangzhen 3:764ccaf29ce9 59 voltage = 1 - 0.05*i;
liangzhen 3:764ccaf29ce9 60 powerReset();
liangzhen 3:764ccaf29ce9 61 powerUp(voltage);
liangzhen 4:fc56fa8aa794 62 #ifdef FILE_OUTPUT
liangzhen 3:764ccaf29ce9 63 fprintf(outFile, "Voltage: %f\n", voltage);
liangzhen 4:fc56fa8aa794 64 #endif
liangzhen 3:764ccaf29ce9 65 RESET = 0;
liangzhen 3:764ccaf29ce9 66 wait_us(10);
liangzhen 3:764ccaf29ce9 67 RESET = 1;
liangzhen 4:fc56fa8aa794 68 for(int iii=0; iii<1; iii++) {
liangzhen 5:0a3fb48e39a3 69 //master_write();
liangzhen 5:0a3fb48e39a3 70 //master_read(ro_readings);
liangzhen 4:fc56fa8aa794 71 for (int ii=0; ii<64; ii++) {
liangzhen 4:fc56fa8aa794 72 #ifdef FILE_OUTPUT
liangzhen 4:fc56fa8aa794 73 fprintf(outFile, "RO %d %d\n", ii, ro_readings[ii]);
liangzhen 4:fc56fa8aa794 74 #endif
liangzhen 4:fc56fa8aa794 75 s.printf("RO %d %d\n", ii, ro_readings[ii]);
liangzhen 4:fc56fa8aa794 76 }
liangzhen 4:fc56fa8aa794 77 #ifdef FILE_OUTPUT
liangzhen 4:fc56fa8aa794 78 fprintf(outFile, "CORE %X\nSRAM %X\n", ro_readings[64],ro_readings[65]);
liangzhen 4:fc56fa8aa794 79 #endif
liangzhen 4:fc56fa8aa794 80 double core_meas = 3.3*ro_readings[64]/0x10000;
liangzhen 4:fc56fa8aa794 81 double sram_meas = 3.3*ro_readings[65]/0x10000;
liangzhen 4:fc56fa8aa794 82 s.printf("CORE %X\nSRAM %X\n", ro_readings[64],ro_readings[65]);
liangzhen 4:fc56fa8aa794 83 s.printf("CORE %f\nSRAM %f\n", core_meas, sram_meas);
liangzhen 4:fc56fa8aa794 84 double rvtp_meas = 3.3*ro_readings[66]/0x10000;
liangzhen 4:fc56fa8aa794 85 double hvtp_meas = 3.3*ro_readings[67]/0x10000;
liangzhen 4:fc56fa8aa794 86 double rvtn_meas = 3.3*ro_readings[68]/0x10000;
liangzhen 4:fc56fa8aa794 87 double hvtn_meas = 3.3*ro_readings[69]/0x10000;
liangzhen 4:fc56fa8aa794 88 #ifdef FILE_OUTPUT
liangzhen 4:fc56fa8aa794 89 fprintf(outFile, "RVTP %X\nHVTP %X\nRVTN %X\nHVTN %X\n", ro_readings[66],ro_readings[67], ro_readings[68],ro_readings[69]);
liangzhen 4:fc56fa8aa794 90 fprintf(outFile, "RVTP %f\nHVTP %f\nRVTN %f\nHVTN %f\n", rvtp_meas, hvtp_meas, rvtn_meas, hvtn_meas);
liangzhen 4:fc56fa8aa794 91 #endif
liangzhen 3:764ccaf29ce9 92 }
liangzhen 3:764ccaf29ce9 93 int fmax;
liangzhen 3:764ccaf29ce9 94 int lower = 51;
liangzhen 3:764ccaf29ce9 95 int higher = 199;
liangzhen 3:764ccaf29ce9 96 int frequency = (lower+higher)/2;
liangzhen 4:fc56fa8aa794 97 clk.setPLL(frequency);
liangzhen 4:fc56fa8aa794 98 clk.setPLL(frequency);
liangzhen 3:764ccaf29ce9 99 RESET = 0;
liangzhen 3:764ccaf29ce9 100 wait_us(10);
liangzhen 3:764ccaf29ce9 101 RESET = 1;
liangzhen 4:fc56fa8aa794 102
liangzhen 4:fc56fa8aa794 103 // power characterization
liangzhen 4:fc56fa8aa794 104 frequency = 151;
liangzhen 4:fc56fa8aa794 105 clk.setPLL(frequency);
liangzhen 4:fc56fa8aa794 106 clk.setPLL(frequency);
liangzhen 4:fc56fa8aa794 107 RESET = 0;
liangzhen 4:fc56fa8aa794 108 wait_us(10);
liangzhen 4:fc56fa8aa794 109 RESET = 1;
liangzhen 4:fc56fa8aa794 110 //jtag.JTAG_test();
liangzhen 4:fc56fa8aa794 111 /*
liangzhen 4:fc56fa8aa794 112 while (higher - lower >100) {
liangzhen 4:fc56fa8aa794 113 s.printf("testing %d\n", frequency);
liangzhen 4:fc56fa8aa794 114 if(jtag.JTAG_test()) {
liangzhen 3:764ccaf29ce9 115 lower = frequency;
liangzhen 3:764ccaf29ce9 116 frequency = (lower+higher)/2;
liangzhen 3:764ccaf29ce9 117 clk.setPLL(frequency);
liangzhen 4:fc56fa8aa794 118 clk.setPLL(frequency);
liangzhen 3:764ccaf29ce9 119 RESET = 0;
liangzhen 3:764ccaf29ce9 120 wait_us(10);
liangzhen 3:764ccaf29ce9 121 RESET = 1;
liangzhen 3:764ccaf29ce9 122 } else {
liangzhen 3:764ccaf29ce9 123 higher = frequency;
liangzhen 3:764ccaf29ce9 124 frequency = (lower+higher)/2;
liangzhen 3:764ccaf29ce9 125 clk.setPLL(frequency);
liangzhen 4:fc56fa8aa794 126 clk.setPLL(frequency);
liangzhen 3:764ccaf29ce9 127 RESET = 0;
liangzhen 3:764ccaf29ce9 128 wait_us(10);
liangzhen 3:764ccaf29ce9 129 RESET = 1;
liangzhen 3:764ccaf29ce9 130 }
liangzhen 3:764ccaf29ce9 131 }
liangzhen 4:fc56fa8aa794 132 */
liangzhen 4:fc56fa8aa794 133 #ifdef FILE_OUTPUT
liangzhen 3:764ccaf29ce9 134 fprintf(outFile, "fmax %d\n", lower*5);
liangzhen 4:fc56fa8aa794 135 #endif
liangzhen 4:fc56fa8aa794 136 s.printf("fmax %d\n", lower*5);
liangzhen 3:764ccaf29ce9 137 powerDown();
liangzhen 0:c928c2d8bd02 138 }
liangzhen 4:fc56fa8aa794 139 #ifdef FILE_OUTPUT
liangzhen 3:764ccaf29ce9 140 fclose(outFile);
liangzhen 4:fc56fa8aa794 141 #endif
liangzhen 0:c928c2d8bd02 142 s.printf("DDRO_software ends.\r\n");
liangzhen 3:764ccaf29ce9 143 while(1) {
liangzhen 3:764ccaf29ce9 144 finish_flag = !finish_flag;
liangzhen 3:764ccaf29ce9 145 wait(1);
liangzhen 3:764ccaf29ce9 146 }
liangzhen 0:c928c2d8bd02 147 }