Luth Haroon / SD_modified

SD card interface

mbed-export/PeripheralNames.h@0:22612ae617a0, 2012-10-08 (annotated)

Committer:
lharoon
Date:
Mon Oct 08 11:14:07 2012 +0000
Revision:
0:22612ae617a0
1st edition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lharoon 0:22612ae617a0 1 /* mbed Microcontroller Library - PeripheralNames
lharoon 0:22612ae617a0 2 * Copyright (C) 2008-2011 ARM Limited. All rights reserved.
lharoon 0:22612ae617a0 3 *
lharoon 0:22612ae617a0 4 * Provides the mappings for peripherals
lharoon 0:22612ae617a0 5 */
lharoon 0:22612ae617a0 6
lharoon 0:22612ae617a0 7 #ifndef MBED_PERIPHERALNAMES_H
lharoon 0:22612ae617a0 8 #define MBED_PERIPHERALNAMES_H
lharoon 0:22612ae617a0 9
lharoon 0:22612ae617a0 10 #include "cmsis.h"
lharoon 0:22612ae617a0 11
lharoon 0:22612ae617a0 12 #ifdef __cplusplus
lharoon 0:22612ae617a0 13 extern "C" {
lharoon 0:22612ae617a0 14 #endif
lharoon 0:22612ae617a0 15
lharoon 0:22612ae617a0 16 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
lharoon 0:22612ae617a0 17
lharoon 0:22612ae617a0 18 enum UARTName {
lharoon 0:22612ae617a0 19 UART_0 = (int)LPC_UART0_BASE
lharoon 0:22612ae617a0 20 , UART_1 = (int)LPC_UART1_BASE
lharoon 0:22612ae617a0 21 , UART_2 = (int)LPC_UART2_BASE
lharoon 0:22612ae617a0 22 , UART_3 = (int)LPC_UART3_BASE
lharoon 0:22612ae617a0 23 };
lharoon 0:22612ae617a0 24 typedef enum UARTName UARTName;
lharoon 0:22612ae617a0 25
lharoon 0:22612ae617a0 26 enum ADCName {
lharoon 0:22612ae617a0 27 ADC0_0 = 0
lharoon 0:22612ae617a0 28 , ADC0_1
lharoon 0:22612ae617a0 29 , ADC0_2
lharoon 0:22612ae617a0 30 , ADC0_3
lharoon 0:22612ae617a0 31 , ADC0_4
lharoon 0:22612ae617a0 32 , ADC0_5
lharoon 0:22612ae617a0 33 , ADC0_6
lharoon 0:22612ae617a0 34 , ADC0_7
lharoon 0:22612ae617a0 35 };
lharoon 0:22612ae617a0 36 typedef enum ADCName ADCName;
lharoon 0:22612ae617a0 37
lharoon 0:22612ae617a0 38 enum DACName {
lharoon 0:22612ae617a0 39 DAC_0 = 0
lharoon 0:22612ae617a0 40 };
lharoon 0:22612ae617a0 41 typedef enum DACName DACName;
lharoon 0:22612ae617a0 42
lharoon 0:22612ae617a0 43 enum SPIName {
lharoon 0:22612ae617a0 44 SPI_0 = (int)LPC_SSP0_BASE
lharoon 0:22612ae617a0 45 , SPI_1 = (int)LPC_SSP1_BASE
lharoon 0:22612ae617a0 46 };
lharoon 0:22612ae617a0 47 typedef enum SPIName SPIName;
lharoon 0:22612ae617a0 48
lharoon 0:22612ae617a0 49 enum I2CName {
lharoon 0:22612ae617a0 50 I2C_0 = (int)LPC_I2C0_BASE
lharoon 0:22612ae617a0 51 , I2C_1 = (int)LPC_I2C1_BASE
lharoon 0:22612ae617a0 52 , I2C_2 = (int)LPC_I2C2_BASE
lharoon 0:22612ae617a0 53 };
lharoon 0:22612ae617a0 54 typedef enum I2CName I2CName;
lharoon 0:22612ae617a0 55
lharoon 0:22612ae617a0 56 enum PWMName {
lharoon 0:22612ae617a0 57 PWM_1 = 1
lharoon 0:22612ae617a0 58 , PWM_2
lharoon 0:22612ae617a0 59 , PWM_3
lharoon 0:22612ae617a0 60 , PWM_4
lharoon 0:22612ae617a0 61 , PWM_5
lharoon 0:22612ae617a0 62 , PWM_6
lharoon 0:22612ae617a0 63 };
lharoon 0:22612ae617a0 64 typedef enum PWMName PWMName;
lharoon 0:22612ae617a0 65
lharoon 0:22612ae617a0 66 enum TimerName {
lharoon 0:22612ae617a0 67 TIMER_0 = (int)LPC_TIM0_BASE
lharoon 0:22612ae617a0 68 , TIMER_1 = (int)LPC_TIM1_BASE
lharoon 0:22612ae617a0 69 , TIMER_2 = (int)LPC_TIM2_BASE
lharoon 0:22612ae617a0 70 , TIMER_3 = (int)LPC_TIM3_BASE
lharoon 0:22612ae617a0 71 };
lharoon 0:22612ae617a0 72 typedef enum TimerName TimerName;
lharoon 0:22612ae617a0 73
lharoon 0:22612ae617a0 74 enum CANName {
lharoon 0:22612ae617a0 75 CAN_1 = (int)LPC_CAN1_BASE,
lharoon 0:22612ae617a0 76 CAN_2 = (int)LPC_CAN2_BASE
lharoon 0:22612ae617a0 77 };
lharoon 0:22612ae617a0 78 typedef enum CANName CANName;
lharoon 0:22612ae617a0 79
lharoon 0:22612ae617a0 80 #define US_TICKER_TIMER TIMER_3
lharoon 0:22612ae617a0 81 #define US_TICKER_TIMER_IRQn TIMER3_IRQn
lharoon 0:22612ae617a0 82
lharoon 0:22612ae617a0 83 #elif defined(TARGET_LPC11U24)
lharoon 0:22612ae617a0 84
lharoon 0:22612ae617a0 85 enum UARTName {
lharoon 0:22612ae617a0 86 UART_0 = (int)LPC_USART_BASE
lharoon 0:22612ae617a0 87 };
lharoon 0:22612ae617a0 88 typedef enum UARTName UARTName;
lharoon 0:22612ae617a0 89
lharoon 0:22612ae617a0 90 enum I2CName {
lharoon 0:22612ae617a0 91 I2C_0 = (int)LPC_I2C_BASE
lharoon 0:22612ae617a0 92 };
lharoon 0:22612ae617a0 93 typedef enum I2CName I2CName;
lharoon 0:22612ae617a0 94
lharoon 0:22612ae617a0 95 enum TimerName {
lharoon 0:22612ae617a0 96 TIMER_0 = (int)LPC_CT32B0_BASE
lharoon 0:22612ae617a0 97 , TIMER_1 = (int)LPC_CT32B1_BASE
lharoon 0:22612ae617a0 98 };
lharoon 0:22612ae617a0 99 typedef enum TimerName TimerName;
lharoon 0:22612ae617a0 100
lharoon 0:22612ae617a0 101 enum ADCName {
lharoon 0:22612ae617a0 102 ADC0_0 = 0
lharoon 0:22612ae617a0 103 , ADC0_1
lharoon 0:22612ae617a0 104 , ADC0_2
lharoon 0:22612ae617a0 105 , ADC0_3
lharoon 0:22612ae617a0 106 , ADC0_4
lharoon 0:22612ae617a0 107 , ADC0_5
lharoon 0:22612ae617a0 108 , ADC0_6
lharoon 0:22612ae617a0 109 , ADC0_7
lharoon 0:22612ae617a0 110 };
lharoon 0:22612ae617a0 111 typedef enum ADCName ADCName;
lharoon 0:22612ae617a0 112
lharoon 0:22612ae617a0 113 enum SPIName {
lharoon 0:22612ae617a0 114 SPI_0 = (int)LPC_SSP0_BASE
lharoon 0:22612ae617a0 115 , SPI_1 = (int)LPC_SSP1_BASE
lharoon 0:22612ae617a0 116 };
lharoon 0:22612ae617a0 117 typedef enum SPIName SPIName;
lharoon 0:22612ae617a0 118
lharoon 0:22612ae617a0 119 #define US_TICKER_TIMER TIMER_1
lharoon 0:22612ae617a0 120 #define US_TICKER_TIMER_IRQn TIMER_32_1_IRQn
lharoon 0:22612ae617a0 121
lharoon 0:22612ae617a0 122 typedef enum PWMName {
lharoon 0:22612ae617a0 123 PWM_1 = 0
lharoon 0:22612ae617a0 124 , PWM_2
lharoon 0:22612ae617a0 125 , PWM_3
lharoon 0:22612ae617a0 126 , PWM_4
lharoon 0:22612ae617a0 127 , PWM_5
lharoon 0:22612ae617a0 128 , PWM_6
lharoon 0:22612ae617a0 129 , PWM_7
lharoon 0:22612ae617a0 130 , PWM_8
lharoon 0:22612ae617a0 131 , PWM_9
lharoon 0:22612ae617a0 132 , PWM_10
lharoon 0:22612ae617a0 133 , PWM_11
lharoon 0:22612ae617a0 134 } PWMName;
lharoon 0:22612ae617a0 135
lharoon 0:22612ae617a0 136 #endif
lharoon 0:22612ae617a0 137
lharoon 0:22612ae617a0 138 #define STDIO_UART_TX USBTX
lharoon 0:22612ae617a0 139 #define STDIO_UART_RX USBRX
lharoon 0:22612ae617a0 140 #define STDIO_UART UART_0
lharoon 0:22612ae617a0 141
lharoon 0:22612ae617a0 142 #ifdef __cplusplus
lharoon 0:22612ae617a0 143 }
lharoon 0:22612ae617a0 144 #endif
lharoon 0:22612ae617a0 145
lharoon 0:22612ae617a0 146 #endif