Luth Haroon / SD_modified

SD card interface

mbed-export/LPC1768/uARM/system_LPC17xx.h@0:22612ae617a0, 2012-10-08 (annotated)

Committer:
lharoon
Date:
Mon Oct 08 11:14:07 2012 +0000
Revision:
0:22612ae617a0
1st edition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lharoon 0:22612ae617a0 1 /******************************************************************************
lharoon 0:22612ae617a0 2 * @file: system_LPC17xx.h
lharoon 0:22612ae617a0 3 * @purpose: CMSIS Cortex-M3 Device Peripheral Access Layer Header File
lharoon 0:22612ae617a0 4 * for the NXP LPC17xx Device Series
lharoon 0:22612ae617a0 5 * @version: V1.02
lharoon 0:22612ae617a0 6 * @date: 27. July 2009
lharoon 0:22612ae617a0 7 *----------------------------------------------------------------------------
lharoon 0:22612ae617a0 8 *
lharoon 0:22612ae617a0 9 * Copyright (C) 2009 ARM Limited. All rights reserved.
lharoon 0:22612ae617a0 10 *
lharoon 0:22612ae617a0 11 * ARM Limited (ARM) is supplying this software for use with Cortex-M3
lharoon 0:22612ae617a0 12 * processor based microcontrollers. This file can be freely distributed
lharoon 0:22612ae617a0 13 * within development tools that are supporting such ARM based processors.
lharoon 0:22612ae617a0 14 *
lharoon 0:22612ae617a0 15 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
lharoon 0:22612ae617a0 16 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
lharoon 0:22612ae617a0 17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
lharoon 0:22612ae617a0 18 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
lharoon 0:22612ae617a0 19 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
lharoon 0:22612ae617a0 20 *
lharoon 0:22612ae617a0 21 ******************************************************************************/
lharoon 0:22612ae617a0 22
lharoon 0:22612ae617a0 23
lharoon 0:22612ae617a0 24 #ifndef __SYSTEM_LPC17xx_H
lharoon 0:22612ae617a0 25 #define __SYSTEM_LPC17xx_H
lharoon 0:22612ae617a0 26
lharoon 0:22612ae617a0 27 #ifdef __cplusplus
lharoon 0:22612ae617a0 28 extern "C" {
lharoon 0:22612ae617a0 29 #endif
lharoon 0:22612ae617a0 30
lharoon 0:22612ae617a0 31 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
lharoon 0:22612ae617a0 32
lharoon 0:22612ae617a0 33
lharoon 0:22612ae617a0 34 /**
lharoon 0:22612ae617a0 35 * Initialize the system
lharoon 0:22612ae617a0 36 *
lharoon 0:22612ae617a0 37 * @param none
lharoon 0:22612ae617a0 38 * @return none
lharoon 0:22612ae617a0 39 *
lharoon 0:22612ae617a0 40 * @brief Setup the microcontroller system.
lharoon 0:22612ae617a0 41 * Initialize the System and update the SystemCoreClock variable.
lharoon 0:22612ae617a0 42 */
lharoon 0:22612ae617a0 43 extern void SystemInit (void);
lharoon 0:22612ae617a0 44
lharoon 0:22612ae617a0 45 /**
lharoon 0:22612ae617a0 46 * Update SystemCoreClock variable
lharoon 0:22612ae617a0 47 *
lharoon 0:22612ae617a0 48 * @param none
lharoon 0:22612ae617a0 49 * @return none
lharoon 0:22612ae617a0 50 *
lharoon 0:22612ae617a0 51 * @brief Updates the SystemCoreClock with current core Clock
lharoon 0:22612ae617a0 52 * retrieved from cpu registers.
lharoon 0:22612ae617a0 53 */
lharoon 0:22612ae617a0 54 extern void SystemCoreClockUpdate (void);
lharoon 0:22612ae617a0 55
lharoon 0:22612ae617a0 56 #ifdef __cplusplus
lharoon 0:22612ae617a0 57 }
lharoon 0:22612ae617a0 58 #endif
lharoon 0:22612ae617a0 59
lharoon 0:22612ae617a0 60 #endif /* __SYSTEM_LPC17xx_H */