SD card interface

Committer:
lharoon
Date:
Mon Oct 08 11:14:07 2012 +0000
Revision:
0:22612ae617a0
1st edition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lharoon 0:22612ae617a0 1 /**************************************************************************//**
lharoon 0:22612ae617a0 2 * @file system_LPC11Uxx.h
lharoon 0:22612ae617a0 3 * @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File
lharoon 0:22612ae617a0 4 * for the NXP LPC11Uxx Device Series
lharoon 0:22612ae617a0 5 * @version V1.10
lharoon 0:22612ae617a0 6 * @date 24. November 2010
lharoon 0:22612ae617a0 7 *
lharoon 0:22612ae617a0 8 * @note
lharoon 0:22612ae617a0 9 * Copyright (C) 2009-2010 ARM Limited. All rights reserved.
lharoon 0:22612ae617a0 10 *
lharoon 0:22612ae617a0 11 * @par
lharoon 0:22612ae617a0 12 * ARM Limited (ARM) is supplying this software for use with Cortex-M
lharoon 0:22612ae617a0 13 * processor based microcontrollers. This file can be freely distributed
lharoon 0:22612ae617a0 14 * within development tools that are supporting such ARM based processors.
lharoon 0:22612ae617a0 15 *
lharoon 0:22612ae617a0 16 * @par
lharoon 0:22612ae617a0 17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
lharoon 0:22612ae617a0 18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
lharoon 0:22612ae617a0 19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
lharoon 0:22612ae617a0 20 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
lharoon 0:22612ae617a0 21 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
lharoon 0:22612ae617a0 22 *
lharoon 0:22612ae617a0 23 ******************************************************************************/
lharoon 0:22612ae617a0 24
lharoon 0:22612ae617a0 25
lharoon 0:22612ae617a0 26 #ifndef __SYSTEM_LPC11Uxx_H
lharoon 0:22612ae617a0 27 #define __SYSTEM_LPC11Uxx_H
lharoon 0:22612ae617a0 28
lharoon 0:22612ae617a0 29 #ifdef __cplusplus
lharoon 0:22612ae617a0 30 extern "C" {
lharoon 0:22612ae617a0 31 #endif
lharoon 0:22612ae617a0 32
lharoon 0:22612ae617a0 33 #include <stdint.h>
lharoon 0:22612ae617a0 34
lharoon 0:22612ae617a0 35 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
lharoon 0:22612ae617a0 36
lharoon 0:22612ae617a0 37
lharoon 0:22612ae617a0 38 /**
lharoon 0:22612ae617a0 39 * Initialize the system
lharoon 0:22612ae617a0 40 *
lharoon 0:22612ae617a0 41 * @param none
lharoon 0:22612ae617a0 42 * @return none
lharoon 0:22612ae617a0 43 *
lharoon 0:22612ae617a0 44 * @brief Setup the microcontroller system.
lharoon 0:22612ae617a0 45 * Initialize the System and update the SystemCoreClock variable.
lharoon 0:22612ae617a0 46 */
lharoon 0:22612ae617a0 47 extern void SystemInit (void);
lharoon 0:22612ae617a0 48
lharoon 0:22612ae617a0 49 /**
lharoon 0:22612ae617a0 50 * Update SystemCoreClock variable
lharoon 0:22612ae617a0 51 *
lharoon 0:22612ae617a0 52 * @param none
lharoon 0:22612ae617a0 53 * @return none
lharoon 0:22612ae617a0 54 *
lharoon 0:22612ae617a0 55 * @brief Updates the SystemCoreClock with current core Clock
lharoon 0:22612ae617a0 56 * retrieved from cpu registers.
lharoon 0:22612ae617a0 57 */
lharoon 0:22612ae617a0 58 extern void SystemCoreClockUpdate (void);
lharoon 0:22612ae617a0 59
lharoon 0:22612ae617a0 60 #ifdef __cplusplus
lharoon 0:22612ae617a0 61 }
lharoon 0:22612ae617a0 62 #endif
lharoon 0:22612ae617a0 63
lharoon 0:22612ae617a0 64 #endif /* __SYSTEM_LPC11Uxx_H */