Luth Haroon / SD_modified

SD card interface

mbed-export/LPC11U24/uARM/power_api.h@0:22612ae617a0, 2012-10-08 (annotated)

Committer:
lharoon
Date:
Mon Oct 08 11:14:07 2012 +0000
Revision:
0:22612ae617a0
1st edition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lharoon 0:22612ae617a0 1 /****************************************************************************
lharoon 0:22612ae617a0 2 * $Id:: power_api.h 6249 2011-01-25 19:23:47Z usb01267 $
lharoon 0:22612ae617a0 3 * Project: NXP LPC11Uxx software example
lharoon 0:22612ae617a0 4 *
lharoon 0:22612ae617a0 5 * Description:
lharoon 0:22612ae617a0 6 * Power API Header File for NXP LPC11Uxx Device Series
lharoon 0:22612ae617a0 7 *
lharoon 0:22612ae617a0 8 ****************************************************************************
lharoon 0:22612ae617a0 9 * Software that is described herein is for illustrative purposes only
lharoon 0:22612ae617a0 10 * which provides customers with programming information regarding the
lharoon 0:22612ae617a0 11 * products. This software is supplied "AS IS" without any warranties.
lharoon 0:22612ae617a0 12 * NXP Semiconductors assumes no responsibility or liability for the
lharoon 0:22612ae617a0 13 * use of the software, conveys no license or title under any patent,
lharoon 0:22612ae617a0 14 * copyright, or mask work right to the product. NXP Semiconductors
lharoon 0:22612ae617a0 15 * reserves the right to make changes in the software without
lharoon 0:22612ae617a0 16 * notification. NXP Semiconductors also make no representation or
lharoon 0:22612ae617a0 17 * warranty that such application will be suitable for the specified
lharoon 0:22612ae617a0 18 * use without further testing or modification.
lharoon 0:22612ae617a0 19 ****************************************************************************/
lharoon 0:22612ae617a0 20 #ifndef __LPC11UXX_POWER_API_H__
lharoon 0:22612ae617a0 21 #define __LPC11UXX_POWER_API_H__
lharoon 0:22612ae617a0 22
lharoon 0:22612ae617a0 23 #ifdef __cplusplus
lharoon 0:22612ae617a0 24 extern "C" {
lharoon 0:22612ae617a0 25 #endif
lharoon 0:22612ae617a0 26
lharoon 0:22612ae617a0 27 #define PWRROMD_PRESENT
lharoon 0:22612ae617a0 28
lharoon 0:22612ae617a0 29 typedef struct _PWRD {
lharoon 0:22612ae617a0 30 void (*set_pll)(unsigned int cmd[], unsigned int resp[]);
lharoon 0:22612ae617a0 31 void (*set_power)(unsigned int cmd[], unsigned int resp[]);
lharoon 0:22612ae617a0 32 } PWRD;
lharoon 0:22612ae617a0 33
lharoon 0:22612ae617a0 34 typedef struct _ROM {
lharoon 0:22612ae617a0 35 #ifdef USBROMD_PRESENT
lharoon 0:22612ae617a0 36 const USB * pUSBD;
lharoon 0:22612ae617a0 37 #else
lharoon 0:22612ae617a0 38 const unsigned p_usbd;
lharoon 0:22612ae617a0 39 #endif /* USBROMD_PRESENT */
lharoon 0:22612ae617a0 40 const unsigned p_clib;
lharoon 0:22612ae617a0 41 const unsigned p_cand;
lharoon 0:22612ae617a0 42 #ifdef PWRROMD_PRESENT
lharoon 0:22612ae617a0 43 const PWRD * pPWRD;
lharoon 0:22612ae617a0 44 #else
lharoon 0:22612ae617a0 45 const unsigned p_pwrd;
lharoon 0:22612ae617a0 46 #endif /* PWRROMD_PRESENT */
lharoon 0:22612ae617a0 47 const unsigned p_dev1;
lharoon 0:22612ae617a0 48 const unsigned p_dev2;
lharoon 0:22612ae617a0 49 const unsigned p_dev3;
lharoon 0:22612ae617a0 50 const unsigned p_dev4;
lharoon 0:22612ae617a0 51 } ROM;
lharoon 0:22612ae617a0 52
lharoon 0:22612ae617a0 53 //PLL setup related definitions
lharoon 0:22612ae617a0 54 #define CPU_FREQ_EQU 0 //main PLL freq must be equal to the specified
lharoon 0:22612ae617a0 55 #define CPU_FREQ_LTE 1 //main PLL freq must be less than or equal the specified
lharoon 0:22612ae617a0 56 #define CPU_FREQ_GTE 2 //main PLL freq must be greater than or equal the specified
lharoon 0:22612ae617a0 57 #define CPU_FREQ_APPROX 3 //main PLL freq must be as close as possible the specified
lharoon 0:22612ae617a0 58
lharoon 0:22612ae617a0 59 #define PLL_CMD_SUCCESS 0 //PLL setup successfully found
lharoon 0:22612ae617a0 60 #define PLL_INVALID_FREQ 1 //specified freq out of range (either input or output)
lharoon 0:22612ae617a0 61 #define PLL_INVALID_MODE 2 //invalid mode (see above for valid) specified
lharoon 0:22612ae617a0 62 #define PLL_FREQ_NOT_FOUND 3 //specified freq not found under specified conditions
lharoon 0:22612ae617a0 63 #define PLL_NOT_LOCKED 4 //PLL not locked => no changes to the PLL setup
lharoon 0:22612ae617a0 64
lharoon 0:22612ae617a0 65 //power setup elated definitions
lharoon 0:22612ae617a0 66 #define PARAM_DEFAULT 0 //default power settings (voltage regulator, flash interface)
lharoon 0:22612ae617a0 67 #define PARAM_CPU_PERFORMANCE 1 //setup for maximum CPU performance (higher current, more computation)
lharoon 0:22612ae617a0 68 #define PARAM_EFFICIENCY 2 //balanced setting (power vs CPU performance)
lharoon 0:22612ae617a0 69 #define PARAM_LOW_CURRENT 3 //lowest active current, lowest CPU performance
lharoon 0:22612ae617a0 70
lharoon 0:22612ae617a0 71 #define PARAM_CMD_SUCCESS 0 //power setting successfully found
lharoon 0:22612ae617a0 72 #define PARAM_INVALID_FREQ 1 //specified freq out of range (=0 or > 50 MHz)
lharoon 0:22612ae617a0 73 #define PARAM_INVALID_MODE 2 //specified mode not valid (see above for valid)
lharoon 0:22612ae617a0 74
lharoon 0:22612ae617a0 75 #define MAX_CLOCK_KHZ_PARAM 50000
lharoon 0:22612ae617a0 76
lharoon 0:22612ae617a0 77 #ifdef __cplusplus
lharoon 0:22612ae617a0 78 }
lharoon 0:22612ae617a0 79 #endif
lharoon 0:22612ae617a0 80
lharoon 0:22612ae617a0 81 #endif /* __LPC11UXX_POWER_API_H__ */
lharoon 0:22612ae617a0 82