Luke Fink / Mbed 2 deprecated final_mp3_player

ECE 4180 Final Project MP3 player code

Dependencies:   mbed mbed-rtos wave_player_appbd 4DGL-uLCD-SE SDFileSystem PinDetect

LSM9DS1_Registers.h@3:8fd82fb378d5, 2021-12-10 (annotated)

Committer:
lfink6
Date:
Fri Dec 10 17:59:57 2021 +0000
Revision:
3:8fd82fb378d5
Parent:
0:57a32b7102e8 
test again;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lfink6 0:57a32b7102e8 1 /******************************************************************************
lfink6 0:57a32b7102e8 2 LSM9DS1_Registers.h
lfink6 0:57a32b7102e8 3 SFE_LSM9DS1 Library - LSM9DS1 Register Map
lfink6 0:57a32b7102e8 4 Jim Lindblom @ SparkFun Electronics
lfink6 0:57a32b7102e8 5 Original Creation Date: April 21, 2015
lfink6 0:57a32b7102e8 6 https://github.com/sparkfun/LSM9DS1_Breakout
lfink6 0:57a32b7102e8 7
lfink6 0:57a32b7102e8 8 This file defines all registers internal to the gyro/accel and magnetometer
lfink6 0:57a32b7102e8 9 devices in the LSM9DS1.
lfink6 0:57a32b7102e8 10
lfink6 0:57a32b7102e8 11 Development environment specifics:
lfink6 0:57a32b7102e8 12 IDE: Arduino 1.6.0
lfink6 0:57a32b7102e8 13 Hardware Platform: Arduino Uno
lfink6 0:57a32b7102e8 14 LSM9DS1 Breakout Version: 1.0
lfink6 0:57a32b7102e8 15
lfink6 0:57a32b7102e8 16 This code is beerware; if you see me (or any other SparkFun employee) at the
lfink6 0:57a32b7102e8 17 local, and you've found our code helpful, please buy us a round!
lfink6 0:57a32b7102e8 18
lfink6 0:57a32b7102e8 19 Distributed as-is; no warranty is given.
lfink6 0:57a32b7102e8 20 ******************************************************************************/
lfink6 0:57a32b7102e8 21
lfink6 0:57a32b7102e8 22 #ifndef __LSM9DS1_Registers_H__
lfink6 0:57a32b7102e8 23 #define __LSM9DS1_Registers_H__
lfink6 0:57a32b7102e8 24
lfink6 0:57a32b7102e8 25 /////////////////////////////////////////
lfink6 0:57a32b7102e8 26 // LSM9DS1 Accel/Gyro (XL/G) Registers //
lfink6 0:57a32b7102e8 27 /////////////////////////////////////////
lfink6 0:57a32b7102e8 28 #define ACT_THS 0x04
lfink6 0:57a32b7102e8 29 #define ACT_DUR 0x05
lfink6 0:57a32b7102e8 30 #define INT_GEN_CFG_XL 0x06
lfink6 0:57a32b7102e8 31 #define INT_GEN_THS_X_XL 0x07
lfink6 0:57a32b7102e8 32 #define INT_GEN_THS_Y_XL 0x08
lfink6 0:57a32b7102e8 33 #define INT_GEN_THS_Z_XL 0x09
lfink6 0:57a32b7102e8 34 #define INT_GEN_DUR_XL 0x0A
lfink6 0:57a32b7102e8 35 #define REFERENCE_G 0x0B
lfink6 0:57a32b7102e8 36 #define INT1_CTRL 0x0C
lfink6 0:57a32b7102e8 37 #define INT2_CTRL 0x0D
lfink6 0:57a32b7102e8 38 #define WHO_AM_I_XG 0x0F
lfink6 0:57a32b7102e8 39 #define CTRL_REG1_G 0x10
lfink6 0:57a32b7102e8 40 #define CTRL_REG2_G 0x11
lfink6 0:57a32b7102e8 41 #define CTRL_REG3_G 0x12
lfink6 0:57a32b7102e8 42 #define ORIENT_CFG_G 0x13
lfink6 0:57a32b7102e8 43 #define INT_GEN_SRC_G 0x14
lfink6 0:57a32b7102e8 44 #define OUT_TEMP_L 0x15
lfink6 0:57a32b7102e8 45 #define OUT_TEMP_H 0x16
lfink6 0:57a32b7102e8 46 #define STATUS_REG_0 0x17
lfink6 0:57a32b7102e8 47 #define OUT_X_L_G 0x18
lfink6 0:57a32b7102e8 48 #define OUT_X_H_G 0x19
lfink6 0:57a32b7102e8 49 #define OUT_Y_L_G 0x1A
lfink6 0:57a32b7102e8 50 #define OUT_Y_H_G 0x1B
lfink6 0:57a32b7102e8 51 #define OUT_Z_L_G 0x1C
lfink6 0:57a32b7102e8 52 #define OUT_Z_H_G 0x1D
lfink6 0:57a32b7102e8 53 #define CTRL_REG4 0x1E
lfink6 0:57a32b7102e8 54 #define CTRL_REG5_XL 0x1F
lfink6 0:57a32b7102e8 55 #define CTRL_REG6_XL 0x20
lfink6 0:57a32b7102e8 56 #define CTRL_REG7_XL 0x21
lfink6 0:57a32b7102e8 57 #define CTRL_REG8 0x22
lfink6 0:57a32b7102e8 58 #define CTRL_REG9 0x23
lfink6 0:57a32b7102e8 59 #define CTRL_REG10 0x24
lfink6 0:57a32b7102e8 60 #define INT_GEN_SRC_XL 0x26
lfink6 0:57a32b7102e8 61 #define STATUS_REG_1 0x27
lfink6 0:57a32b7102e8 62 #define OUT_X_L_XL 0x28
lfink6 0:57a32b7102e8 63 #define OUT_X_H_XL 0x29
lfink6 0:57a32b7102e8 64 #define OUT_Y_L_XL 0x2A
lfink6 0:57a32b7102e8 65 #define OUT_Y_H_XL 0x2B
lfink6 0:57a32b7102e8 66 #define OUT_Z_L_XL 0x2C
lfink6 0:57a32b7102e8 67 #define OUT_Z_H_XL 0x2D
lfink6 0:57a32b7102e8 68 #define FIFO_CTRL 0x2E
lfink6 0:57a32b7102e8 69 #define FIFO_SRC 0x2F
lfink6 0:57a32b7102e8 70 #define INT_GEN_CFG_G 0x30
lfink6 0:57a32b7102e8 71 #define INT_GEN_THS_XH_G 0x31
lfink6 0:57a32b7102e8 72 #define INT_GEN_THS_XL_G 0x32
lfink6 0:57a32b7102e8 73 #define INT_GEN_THS_YH_G 0x33
lfink6 0:57a32b7102e8 74 #define INT_GEN_THS_YL_G 0x34
lfink6 0:57a32b7102e8 75 #define INT_GEN_THS_ZH_G 0x35
lfink6 0:57a32b7102e8 76 #define INT_GEN_THS_ZL_G 0x36
lfink6 0:57a32b7102e8 77 #define INT_GEN_DUR_G 0x37
lfink6 0:57a32b7102e8 78
lfink6 0:57a32b7102e8 79 ///////////////////////////////
lfink6 0:57a32b7102e8 80 // LSM9DS1 Magneto Registers //
lfink6 0:57a32b7102e8 81 ///////////////////////////////
lfink6 0:57a32b7102e8 82 #define OFFSET_X_REG_L_M 0x05
lfink6 0:57a32b7102e8 83 #define OFFSET_X_REG_H_M 0x06
lfink6 0:57a32b7102e8 84 #define OFFSET_Y_REG_L_M 0x07
lfink6 0:57a32b7102e8 85 #define OFFSET_Y_REG_H_M 0x08
lfink6 0:57a32b7102e8 86 #define OFFSET_Z_REG_L_M 0x09
lfink6 0:57a32b7102e8 87 #define OFFSET_Z_REG_H_M 0x0A
lfink6 0:57a32b7102e8 88 #define WHO_AM_I_M 0x0F
lfink6 0:57a32b7102e8 89 #define CTRL_REG1_M 0x20
lfink6 0:57a32b7102e8 90 #define CTRL_REG2_M 0x21
lfink6 0:57a32b7102e8 91 #define CTRL_REG3_M 0x22
lfink6 0:57a32b7102e8 92 #define CTRL_REG4_M 0x23
lfink6 0:57a32b7102e8 93 #define CTRL_REG5_M 0x24
lfink6 0:57a32b7102e8 94 #define STATUS_REG_M 0x27
lfink6 0:57a32b7102e8 95 #define OUT_X_L_M 0x28
lfink6 0:57a32b7102e8 96 #define OUT_X_H_M 0x29
lfink6 0:57a32b7102e8 97 #define OUT_Y_L_M 0x2A
lfink6 0:57a32b7102e8 98 #define OUT_Y_H_M 0x2B
lfink6 0:57a32b7102e8 99 #define OUT_Z_L_M 0x2C
lfink6 0:57a32b7102e8 100 #define OUT_Z_H_M 0x2D
lfink6 0:57a32b7102e8 101 #define INT_CFG_M 0x30
lfink6 0:57a32b7102e8 102 #define INT_SRC_M 0x30
lfink6 0:57a32b7102e8 103 #define INT_THS_L_M 0x32
lfink6 0:57a32b7102e8 104 #define INT_THS_H_M 0x33
lfink6 0:57a32b7102e8 105
lfink6 0:57a32b7102e8 106 ////////////////////////////////
lfink6 0:57a32b7102e8 107 // LSM9DS1 WHO_AM_I Responses //
lfink6 0:57a32b7102e8 108 ////////////////////////////////
lfink6 0:57a32b7102e8 109 #define WHO_AM_I_AG_RSP 0x68
lfink6 0:57a32b7102e8 110 #define WHO_AM_I_M_RSP 0x3D
lfink6 0:57a32b7102e8 111
lfink6 0:57a32b7102e8 112 #endif