Tatsuki Fukuda / L3GD20

秋月販売のL3GD20使用8pinDIPジャイロセンサーモジュールのライブラリです。　　　 FIFOを使って等間隔データの読み込みができます。　　　 構造体のポインタをreadメソッドに渡すと値が入ります。　　　 <今後の予定> ・レジスタへのアクセスの整理整頓　　　 ・データレート/HighLowのフィルター/分解能の設定メソッド　　　 ・mbedピン変化割り込みによるデータ取得(おそらく関数ポインタを割り込み処理のメソッドに渡してもらう)　　　 ・読み取りデータにフィルターをかける。　　　 ・データ取得の高速化　　　

L3GD20.h@0:a07d3c1c7d2d, 2014-04-03 (annotated)

Committer:
lelect
Date:
Thu Apr 03 12:26:20 2014 +0000
Revision:
0:a07d3c1c7d2d
<L3GD20 SPI class(unused interrupt)>; you can use normal mode and FIFO mode(only change fifo configration,cannot change other configration); I'm going to use the interrupt other class.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lelect 0:a07d3c1c7d2d 1 #ifndef MBED_SPI
lelect 0:a07d3c1c7d2d 2 #define MBED_SPI
lelect 0:a07d3c1c7d2d 3 #include "mbed.h"
lelect 0:a07d3c1c7d2d 4 #include "L3GD20_Resister.h"
lelect 0:a07d3c1c7d2d 5 typedef struct {
lelect 0:a07d3c1c7d2d 6 int16_t X;
lelect 0:a07d3c1c7d2d 7 int16_t Y;
lelect 0:a07d3c1c7d2d 8 int16_t Z;
lelect 0:a07d3c1c7d2d 9 float x;
lelect 0:a07d3c1c7d2d 10 float y;
lelect 0:a07d3c1c7d2d 11 float z;
lelect 0:a07d3c1c7d2d 12 } anglerrates;
lelect 0:a07d3c1c7d2d 13 class L3GD20
lelect 0:a07d3c1c7d2d 14 {
lelect 0:a07d3c1c7d2d 15 public:
lelect 0:a07d3c1c7d2d 16 L3GD20(PinName miso, PinName mosi, PinName scl, PinName cs/*, PinName interrupt1=NC, PinName interrupt2=NC*/);
lelect 0:a07d3c1c7d2d 17 typedef enum {
lelect 0:a07d3c1c7d2d 18 null=0x00
lelect 0:a07d3c1c7d2d 19 ,WhoAmI=0x0F
lelect 0:a07d3c1c7d2d 20 ,CtrlReg1=0x20
lelect 0:a07d3c1c7d2d 21 ,CtrlReg2=0x21
lelect 0:a07d3c1c7d2d 22 ,CtrlReg3=0x22
lelect 0:a07d3c1c7d2d 23 ,CtrlReg4=0x23
lelect 0:a07d3c1c7d2d 24 ,CtrlReg5=0x24
lelect 0:a07d3c1c7d2d 25 ,Reference=0x25
lelect 0:a07d3c1c7d2d 26 ,OutTemp=0x26
lelect 0:a07d3c1c7d2d 27 ,StatusReg=0x27
lelect 0:a07d3c1c7d2d 28 ,OutXL=0x28
lelect 0:a07d3c1c7d2d 29 ,OutXH=0x29
lelect 0:a07d3c1c7d2d 30 ,OutYL=0x2A
lelect 0:a07d3c1c7d2d 31 ,OutYH=0x2B
lelect 0:a07d3c1c7d2d 32 ,OutZL=0x2C
lelect 0:a07d3c1c7d2d 33 ,OutZH=0x2D
lelect 0:a07d3c1c7d2d 34 ,FIFOCtrlReg=0x2E
lelect 0:a07d3c1c7d2d 35 ,FIFOSrcReg=0x2F
lelect 0:a07d3c1c7d2d 36 ,INT1Cfg=0x30
lelect 0:a07d3c1c7d2d 37 ,INT1Src=0x31
lelect 0:a07d3c1c7d2d 38 ,INT1ThsXH=0x32
lelect 0:a07d3c1c7d2d 39 ,INT1ThsXL=0x33
lelect 0:a07d3c1c7d2d 40 ,INT1ThsYH=0x34
lelect 0:a07d3c1c7d2d 41 ,INT1ThsYL=0x35
lelect 0:a07d3c1c7d2d 42 ,INT1ThsZH=0x36
lelect 0:a07d3c1c7d2d 43 ,INT1ThsZL=0x37
lelect 0:a07d3c1c7d2d 44 ,INT1Duration=0x38
lelect 0:a07d3c1c7d2d 45 ,READ=0x80
lelect 0:a07d3c1c7d2d 46 } RESISTER;
lelect 0:a07d3c1c7d2d 47 typedef enum {
lelect 0:a07d3c1c7d2d 48 Y=0x1
lelect 0:a07d3c1c7d2d 49 ,X=0x1<<1
lelect 0:a07d3c1c7d2d 50 ,Z=0x1<<2
lelect 0:a07d3c1c7d2d 51 ,XY=X|Y
lelect 0:a07d3c1c7d2d 52 ,XZ=X|Z
lelect 0:a07d3c1c7d2d 53 ,YZ=Y|Z
lelect 0:a07d3c1c7d2d 54 ,XYZ=X|Y|Z
lelect 0:a07d3c1c7d2d 55 } DIRECTION;
lelect 0:a07d3c1c7d2d 56
lelect 0:a07d3c1c7d2d 57
lelect 0:a07d3c1c7d2d 58 void start(DIRECTION enable);
lelect 0:a07d3c1c7d2d 59 void stop();
lelect 0:a07d3c1c7d2d 60 void sleep();
lelect 0:a07d3c1c7d2d 61 void read(anglerrates* val,DIRECTION direction);
lelect 0:a07d3c1c7d2d 62 int readTemperature();
lelect 0:a07d3c1c7d2d 63 typedef enum {
lelect 0:a07d3c1c7d2d 64 BYPASSmode=0x0
lelect 0:a07d3c1c7d2d 65 ,FIFOmode
lelect 0:a07d3c1c7d2d 66 ,STREAMmode
lelect 0:a07d3c1c7d2d 67 ,STREAMtoFIFOmode
lelect 0:a07d3c1c7d2d 68 ,BYPASStoSTREAMmode
lelect 0:a07d3c1c7d2d 69 } FIFO_mode;
lelect 0:a07d3c1c7d2d 70 typedef enum {
lelect 0:a07d3c1c7d2d 71 none=0
lelect 0:a07d3c1c7d2d 72 ,empty
lelect 0:a07d3c1c7d2d 73 ,watermark
lelect 0:a07d3c1c7d2d 74 ,overrun
lelect 0:a07d3c1c7d2d 75 } FIFOstatus;
lelect 0:a07d3c1c7d2d 76 struct tagFIFO {
lelect 0:a07d3c1c7d2d 77 FIFOstatus status;
lelect 0:a07d3c1c7d2d 78 int level;
lelect 0:a07d3c1c7d2d 79 } FIFO;
lelect 0:a07d3c1c7d2d 80 void enableFIFO(FIFO_mode mode,FIFOstatus interrupt,const int threshold);
lelect 0:a07d3c1c7d2d 81 void updateFIFO(void);
lelect 0:a07d3c1c7d2d 82 struct config {
lelect 0:a07d3c1c7d2d 83 //read and write resister
lelect 0:a07d3c1c7d2d 84 union CTRL_REG1 CTRL_REG1;
lelect 0:a07d3c1c7d2d 85 union CTRL_REG2 CTRL_REG2;
lelect 0:a07d3c1c7d2d 86 union CTRL_REG3 CTRL_REG3;
lelect 0:a07d3c1c7d2d 87 union CTRL_REG4 CTRL_REG4;
lelect 0:a07d3c1c7d2d 88 union CTRL_REG5 CTRL_REG5;
lelect 0:a07d3c1c7d2d 89 union REF_DATACAP REF_DATACAP;
lelect 0:a07d3c1c7d2d 90 union OUT_TEMP OUT_TEMP;
lelect 0:a07d3c1c7d2d 91 union STATUS_REG STATUS_REG;
lelect 0:a07d3c1c7d2d 92 union FIFO_CTRL_REG FIFO_CTRL_REG;
lelect 0:a07d3c1c7d2d 93 union INT1_CFG INT1_CFG;
lelect 0:a07d3c1c7d2d 94 union INT1_TSH_XH INT1_TSH_XH;
lelect 0:a07d3c1c7d2d 95 union INT1_TSH_XL INT1_TSH_XL;
lelect 0:a07d3c1c7d2d 96 union INT1_TSH_YH INT1_TSH_YH;
lelect 0:a07d3c1c7d2d 97 union INT1_TSH_YL INT1_TSH_YL;
lelect 0:a07d3c1c7d2d 98 union INT1_TSH_ZH INT1_TSH_ZH;
lelect 0:a07d3c1c7d2d 99 union INT1_TSH_ZL INT1_TSH_ZL;
lelect 0:a07d3c1c7d2d 100 union INT1_DURATION INT1_DURATION;
lelect 0:a07d3c1c7d2d 101 } _config;
lelect 0:a07d3c1c7d2d 102 struct status {
lelect 0:a07d3c1c7d2d 103 //read only resister
lelect 0:a07d3c1c7d2d 104 int OUT_TEMP;
lelect 0:a07d3c1c7d2d 105 int STATUS_REG;
lelect 0:a07d3c1c7d2d 106 union FIFO_SRC_REG FIFO_SRC_REG;
lelect 0:a07d3c1c7d2d 107 int INT1_SRC;
lelect 0:a07d3c1c7d2d 108 } _status;
lelect 0:a07d3c1c7d2d 109 void configReadOut(void);
lelect 0:a07d3c1c7d2d 110 void statusReadOut(void);
lelect 0:a07d3c1c7d2d 111 protected:
lelect 0:a07d3c1c7d2d 112 void write(RESISTER reg,int val);
lelect 0:a07d3c1c7d2d 113 void read(RESISTER reg,int* val);
lelect 0:a07d3c1c7d2d 114 /*
lelect 0:a07d3c1c7d2d 115 void datarate(uint8_t rate,uint8_t bandwidth);
lelect 0:a07d3c1c7d2d 116 void setDataFormat();
lelect 0:a07d3c1c7d2d 117 void filter(uint8_t mode,uint8_t frequency);
lelect 0:a07d3c1c7d2d 118 void channelSource(uint8_t channnel,uint8_t dataSelection,uint8_t interruptSelection);
lelect 0:a07d3c1c7d2d 119 void FIFO(uint8_t mode,uint8_t watermark);
lelect 0:a07d3c1c7d2d 120 void interrupt(uint8_t source,uint8_t threthold,uint8_t duration,uint8_t Wait);
lelect 0:a07d3c1c7d2d 121 */
lelect 0:a07d3c1c7d2d 122 SPI _spi;
lelect 0:a07d3c1c7d2d 123 DigitalOut _cs;
lelect 0:a07d3c1c7d2d 124 };
lelect 0:a07d3c1c7d2d 125
lelect 0:a07d3c1c7d2d 126 #endif